Class 257/E21.546 - Using trench refilling with dielectric materials (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E21.545. This subclass
No. of patents: 856
Last issue date: 10/28/2008

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Number	Title	Issue Date
7442621	Semiconductor process for forming stress absorbent shallow trench isolation structures A semiconductor fabrication process includes patterning a hard mask over a semiconductor substrate to expose an isolation region and forming a trench in the isolation region. A flowable dielectric is deposited in the trench to partially fill the trench and a capping...	10/28/2008
7439602	Semiconductor device and its manufacturing method A semiconductor device including memory cells isolated by a trench that may be self aligned with a stacked film pattern (7) has been disclosed. The memory cells may be flash memory cells having an active gate film (2) that may be thinner than a gate ox...	10/21/2008
7435684	Resolving of fluorine loading effect in the vacuum chamber This invention relates to electronic device fabrication processes for making devices such as semiconductor wafers and resolves the fluorine loading effect in the reaction chamber of a HDP CVD apparatus used for forming dielectric layers in high aspect ratio, narrow ...	10/14/2008
7435656	Semiconductor device of transistor structure having strained semiconductor layer The semiconductor device comprises a p type Si substrate 10; a SiGe buffer layer 12 formed on the p type Si substrate 10 and having element isolation grooves 16 formed in the surface, which define an active region 18; a SiGe regrow...	10/14/2008
7435661	Polish stop and sealing layer for manufacture of semiconductor devices with deep trench isolation A method and resulting device that eliminates vertical steps or gaps in a deep trench isolation region and, thus, eliminates or drastically reduces a possibility of polysilicon stringers. Additionally, the invention allows an inexpensive dielectric material, for exa...	10/14/2008
7432150	Method of manufacturing a magnetoelectronic device A method of manufacturing a magnetoelectronic device includes providing an electrically conducting material and an electrically insulating material adjacent to at least a portion of the electrically conducting material, and implanting a magnetic material into the el...	10/07/2008
7432148	Shallow trench isolation by atomic-level silicon reconstruction Methods of forming an improved shallow trench isolation (STI) region are disclosed. Several exemplary techniques are proposed for treating STI sidewalls to improve the silicon (Si) surface at the atomic level. Each of the exemplary methods creates a smooth STI sidew...	10/07/2008
7429520	Methods for forming trench isolation A method of forming an isolation film in a semiconductor device is disclosed. The disclosed method includes performing a patterning process on a predetermined region of a semiconductor substrate in which a patterned pad film is formed, forming a trench defining an i...	09/30/2008
7425489	Self-aligned shallow trench isolation A method of making a semiconductor structure includes etching an isolation oxide. The isolation oxide is in a substrate, a gate layer is on the substrate, a patterned metallic layer is on the gate layer, and a first patterned etch-stop layer is on the metallic layer...	09/16/2008
7425751	Method to reduce junction leakage current in strained silicon on silicon-germanium devices A MOSFET device in strained silicon-on-SiGe and a method of forming the device are described. The said device achieves reduced junction leakage due to the lower band-gap values of SiGe. The method consists of forming isolation trenches in a composite strained-Si/SiG...	09/16/2008
7422959	Method for forming isolation trench in a semiconductor substrate A method for forming an isolation region in a semiconductor device such as a photodiode forms depletion layers at boundary regions between N-type regions of the photodiode and an ion injection layer in which P-type impurity ions are injected. Depletion layers are al...	09/09/2008
7419866	Process of forming an electronic device including a semiconductor island over an insulating layer A process of forming an electronic device can include forming a patterned oxidation-resistant layer over a semiconductor layer that overlies a substrate, and patterning the semiconductor layer to form a semiconductor island. The semiconductor island includes a first...	09/02/2008
7416955	Method of manufacturing a semiconductor device A method of manufacturing a semiconductor device, includes forming a first insulating film containing silicon oxide as a main ingredient, on an underlying region, adhering water to the first insulating film, forming a polymer solution layer containing a silicon-cont...	08/26/2008
7407897	Capacitor of analog semiconductor device having multi-layer dielectric film and method of manufacturing the same In a capacitor of an analog semiconductor device having a multi-layer dielectric film and a method of manufacturing the same, the multi-layer dielectric film can be readily manufactured, has weak reactivity with corresponding electrodes and offers excellent leakage ...	08/05/2008
7402473	Semiconductor device and process for producing the same A process of producing a semiconductor device having a highly reliable groove isolation structure with a desired radius of curvature formed at the groove upper edge and without formation of any step. The device is produced by reducing the stress generation around th...	07/22/2008
7399679	Narrow width effect improvement with photoresist plug process and STI corner ion implantation A method to reduce the inverse narrow width effect in NMOS transistors is described. An oxide liner is deposited in a shallow trench that is formed to isolate active areas in a substrate. A photoresist plug is formed in the shallow trench and is recessed below the t...	07/15/2008
7400010	Semiconductor device and method of manufacturing the same A semiconductor device including a semiconductor substrate having trenches oriented in a predetermined direction; a gate insulating film overlaying the semiconductor substrate interposed between the trenches; and floating gate electrodes formed on the gate insulatin...	07/15/2008
7397104	Semiconductor integrated circuit device and a method of manufacturing the same A semiconductor integrated circuit device is provided which includes an active region, a shallow groove isolation adjacent to the active region, and a semiconductor element formed in the active region and having a gate. The sum of a width of the active region and a ...	07/08/2008
7396729	Methods of forming semiconductor devices having a trench with beveled corners A semiconductor device is formed by providing a substrate. A trench is formed in the substrate. Beveled surfaces are formed at upper portions of sidewalls of the trench opposite a bottom surface of the trench, respectively. An oxide layer is formed in the trench suc...	07/08/2008
7397105	Apparatus to passivate inductively or capacitively coupled surface currents under capacitor structures A deep n-well is formed beneath the area of a capacitor structure. The use of a deep n-well lessens the parasitic capacitance by placing a diode in series with the interlayer dielectric cap. The deep n-well also reduces substrate noise. Once the n-well is implanted ...	07/08/2008
7396737	Method of forming shallow trench isolation A method of manufacturing a semiconductor device including forming a pad oxide layer on a semiconductor substrate, forming a spacer oxide layer pattern on sidewalls of the pad oxide layer, and forming a nitride layer on the pad oxide layer. The method further includ...	07/08/2008
7396728	Methods of improving drive currents by employing strain inducing STI liners A method forms a semiconductor device comprising isolation structures that selectively induce strain into active regions of NMOS and PMOS devices. Form a hard mask layer over a semiconductor body. A resist layer is formed on the hard mask layer that exposes and defi...	07/08/2008
7393750	Method for manufacturing a semiconductor device Embodiments relate to a method of manufacturing a semiconductor device. According to embodiments, the method may include forming a first and a second insulating layer on a semiconductor substrate of which an active area and an isolation region are defined, forming a...	07/01/2008
7393789	Protective coating for planarization Various pattern transfer and etching steps can be used to create features. Conventional photolithography steps can be used in combination with pitch-reduction techniques to form superimposed, pitch-reduced patterns of crossing elongate features that can be consolida...	07/01/2008
7390717	Trench power MOSFET fabrication using inside/outside spacers A fabrication process for a trench type power semiconductor device includes forming inside spacers over a semiconductor surface. Using the spacers as masks, trenches with gates are formed in the semiconductor body. After removing the spacers, source implants are for...	06/24/2008
7374999	Semiconductor device A semiconductor device includes a substrate including a high-voltage transistor area provided with a high-voltage transistor and a low-voltage transistor area provided with a low-voltage transistor; a LOCOS layer provided as a device isolation layer of the high-volt...	05/20/2008
7371657	Method for forming an isolating trench with a dielectric material The present invention relates to a method of forming an isolating trench of a semiconductor device with a dielectric material, and to a method of forming an isolating trench in a memory device. ...	05/13/2008
7371656	Method for forming STI of semiconductor device A method for forming a STI of a semiconductor device includes steps of sequentially forming a pad oxide film and a pad nitride film on the semiconductor device and carrying out a pattern process PR; etching the pad oxide film and the nitride film and carrying out a ...	05/13/2008
7371654	Manufacturing method of semiconductor device with filling insulating film into trench Forming of a first silicon oxide film is started on an internal surface of a trench formed on a surface or upwardly of a semiconductor substrate according to an HDP technique. Then, deposition of the first silicon oxide film stops before an opening of the trench clo...	05/13/2008
7368353	Trench power MOSFET with reduced gate resistance A method for manufacturing a trench type power semiconductor device which includes process steps for forming proud gate electrodes in order to decrease the resistivity thereof. ...	05/06/2008
7368364	Method for manufacturing element isolation structural section A plurality of element forming regions and an element isolation structural section forming region which separates the plurality of element forming regions from one another, are set to a substrate. A first thermal oxide film is formed. An HfSiON film is formed. Heati...	05/06/2008
7364975	Semiconductor device fabrication methods Methods of fabricating semiconductor devices are disclosed. In a preferred embodiment, a method of fabricating a semiconductor device includes providing a workpiece including a plurality of active area regions defined therein, and forming at least one trench in the ...	04/29/2008
7361571	Method for fabricating a trench isolation with spacers A method for forming a shallow trench isolation (STI) in a semiconductor device, is presented. In one embodiment, the method includes successively forming a pad oxide and a pad nitride on a silicon substrate, successively etching the pad nitride, the pad oxide, and ...	04/22/2008
7348639	Method for providing a deep connection to substrate or buried layer in a semiconductor device A system and method is disclosed for providing a deep connection to a substrate or buried layer of a semiconductor device. Three shallow trenches are etched halfway through a layer of epitaxial silicon that is located on a substrate. A second doped layer is created ...	03/25/2008
7348254	Method of fabricating fin field-effect transistors A method of fabricating a fin field-effect transistor that may enable a reduction in the number of process steps, by forming the fin structure by etching away a predetermined thickness of an element isolation layer. The method includes steps of sequentially forming ...	03/25/2008
7348256	Methods of forming reduced electric field DMOS using self-aligned trench isolation A method of fabricating an electronic device and the resulting electronic device. The method includes forming a gate oxide on an uppermost side of a silicon-on-insulator substrate; forming a first polysilicon layer over the gate oxide; and forming a first silicon di...	03/25/2008
7335609	Gap-fill depositions introducing hydroxyl-containing precursors in the formation of silicon containing dielectric materials A chemical vapor deposition method for forming a dielectric material in a trench formed on a substrate. The method includes flowing a silicon-containing precursor into a process chamber housing the substrate, flowing an oxidizing gas into the chamber, and providing ...	02/26/2008
7335564	Method for forming device isolation layer of semiconductor device A method for forming a device isolation device of a semiconductor device is disclosed. The method includes the steps of forming a moat pattern for forming a trench on a semiconductor substrate, forming a trench by etching the semiconductor substrate to a predetermin...	02/26/2008
7332407	Method and apparatus for a semiconductor device with a high-k gate dielectric A process and apparatus for a high-k gate dielectric MOS transistor is described. A substrate is provided, a high-k gate dielectric material is deposited over the substrate, a gate electrode layer is deposited over the dielectric material and a patterning step is pe...	02/19/2008
7326627	Method of fabricating a semiconductor device with a trench isolation structure and resulting semiconductor device The present fabrication method includes the steps of: providing a nitride film in a main surface of a semiconductor substrate; providing an upper trench, with the nitride film used as a mask; filling the upper trench with an oxide film introduced therein; removing t...	02/05/2008

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Class 257/E21.546 - Using trench refilling with dielectric materials (EPO)