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| Number | Title | Issue Date |
| 7423288 | Technique for evaluating a fabrication of a die and wafer The fabrication of the wafer may be analyzed starting from when the wafer is in a partially fabricated state. The value of a specified performance parameter may be determined at a plurality of locations on an active area of a die of the wafer. The specified performa... | 09/09/2008 |
| 7405088 | Method for analyzing fail bit maps of waters and apparatus therefor A failure analysis method according to the invention includes inputting the positions of failures in multiple wafers of an input device; preparing multiple sections in the multiple wafers; calculating feature amounts, which are represented by at least one numerical ... | 07/29/2008 |
| 7381576 | Method and apparatus for monitoring precision of water placement alignment A method for monitoring precision of placement of semiconductor wafers in a semiconductor processing apparatus includes measuring thickness of an insulating film on a surface of a semiconductor substrate before etching a portion of the insulating film from the surfa... | 06/03/2008 |
| 7378288 | Systems and methods for producing light emitting diode array Systems and methods are disclosed for producing vertical LED array on a metal substrate; evaluating said array of LEDs for defects; destroying one or more defective LEDs; forming good LEDs only LED array suitable for wafer level package. ... | 05/27/2008 |
| 7355266 | Semiconductor wafer test system A semiconductor wafer test system for carrying out a burn-in test on a semiconductor wafer including multiple semiconductor devices thereon. A metal interconnect is connected to the gate electrode of each of those devices. A power supply applies an ac voltage of pre... | 04/08/2008 |
| 7348186 | Method for improving a semiconductor substrate having SiGe film and semiconductor device manufactured by using this method A method of improving a semiconductor substrate including a SiGe film on a Si or SOI substrate is provided. The method includes determining a relationship between a film condition of the SiGe film and a hydrogen ion implantation condition used in making the SiGe fil... | 03/25/2008 |
| 7314808 | Method for sequencing substrates Methods for transferring substrates in a system with a factory interface robot between at least one FOUP, a buffer coupled to a parasitic device and an inbound and outbound transfer station coupled to a processing tool are provided. In one embodiment, a method for t... | 01/01/2008 |
| 7294853 | Substrate for mounting a semiconductor A substrate (1) is formed from a non-electrically conducting material and is for mounting a semiconductor chip (10). The substrate has a semiconductor chip mounting portion (6). A number of first electrically conducting contact portions (5 | 11/13/2007 |
| 7282374 | Method and apparatus for comparing device and non-device structures The present invention provides a method and apparatus for comparing device and non-device structures. The method includes determining at least one characteristic parameter associated with at least one non-device structure on at least one workpiece and determining at... | 10/16/2007 |
| 7256055 | System and apparatus for using test structures inside of a chip during the fabrication of the chip The fabrication of the wafer may be analyzed starting from when the wafer is in a partially fabricated state. The value of a specified performance parameter may be determined at a plurality of locations on an active area of a die of the wafer. The specified performa... | 08/14/2007 |
| 7250313 | Method of detecting un-annealed ion implants A current-voltage response of at least one site of a semiconductor wafer where ions have been implanted in the semiconducting material of the semiconductor wafer is measured prior to annealing the semiconductor wafer. From the measured response, a determination is m... | 07/31/2007 |
| 7241635 | Binning for semi-custom ASICs A binning method is disclosed for measuring semiconductor devices for certain parameters and placing specific devices into different categories or “bins” according to the measured parameters. Measurable parameters include performance/speed-grading, power consump... | 07/10/2007 |
| 7242100 | Method for manufacturing semiconductor device with plural semiconductor chips A method for manufacturing a semiconductor device with plural semiconductor chips is provided. The method includes the step of attaching a second semiconductor chip to a first surface of a supporting member in a manner such that a third set of electrodes are wireles... | 07/10/2007 |
| 7241636 | Method and apparatus for providing structural support for interconnect pad while allowing signal conductance A method provides an interconnect structure having enhanced structural support when underlying functional metal layers are insulated with a low modulus dielectric. A first metal layer having a plurality of openings overlies the substrate. A first electrically insula... | 07/10/2007 |
| 7235411 | Method for aligning a wafer and apparatus for performing the same In a method of aligning a wafer, which is capable of precisely and rapidly aligning the wafer, and a wafer alignment apparatus using the method of aligning the wafer, a first wafer is aligned to form a first template pattern corresponding to an image of the first wa... | 06/26/2007 |
| 7229845 | Automated sourcing of substrate microfabrication defects using defects signatures Automated defect sourcing system identifies root-causes of yield excursion due to contamination, process faults, equipment failure and/or handling in timely manner and provides accurate timely feedback to address and contain the sources of yield excursion. A signatu... | 06/12/2007 |
| 7220604 | Method and apparatus for repairing shape, and method for manufacturing semiconductor device using those The invention relates to a method for enabling repair of a defect in a substrate, particularly the invention provides a method and apparatus for enabling repair of a pattern shape in a semiconductor device, which has not been able to be practiced because of lack of ... | 05/22/2007 |
| 7211451 | Process for producing a component module A process for producing a component module comprising a module carrier and a plurality of components with which contact is made on the latter, comprising the following steps: arranging separated components on a surface-adhesive fil... | 05/01/2007 |
| 7208331 | Methods and structures for critical dimension and profile measurement Methods and structures for critical dimension or profile measurement are disclosed. The method provides a substrate having periodic openings therein. Material layers are formed in the openings, substantially planarizing a surface of the substrate. A scattering metho... | 04/24/2007 |
| 7198963 | Methodologies for efficient inspection of test structures using electron beam scanning and step and repeat systems Disclosed are techniques for efficiently inspecting defects on voltage contrast test. In one embodiment, methodologies and test structures allow inspection to occur entirely within a charged particle system. In a specific embodiment, a method of localizing and imagi... | 04/03/2007 |
| 7195935 | Selective packaging of tested semiconductor devices A method for manufacturing a semiconductor device includes, (a) mounting a plurality of first semiconductor chips in a manner not to overlap with one another on a substrate having a plurality of wiring patterns formed thereon, and electrically connecting each of the... | 03/27/2007 |
| 7148074 | Method and apparatus for using a capacitor array to measure alignment between system components One embodiment of the present invention provides a system that measures alignment between a first semiconductor die and a second semiconductor die. The system operates by applying a pattern of voltage signals to a two-dimensional array of conductive transmitter elem... | 12/12/2006 |
| 7132302 | Method of increasing cell retention capacity of silicon nitride read-only-memory cell A method of increasing the cell retention capacity of a silicon nitride read-only-memory on a wafer. The method includes carrying out a baking process after performing the last plasma treatment of the wafer but before a wafer sort test. ... | 11/07/2006 |
| 7115425 | Integrated circuit process monitoring and metrology system A method for monitoring polishing process parameters for an integrated circuit structure on a substrate. A first metrology site is constructed on the substrate. The first metrology site represents a design extreme of a high density integrated circuit structure. The ... | 10/03/2006 |
| 7099729 | Semiconductor process and yield analysis integrated real-time management method A semiconductor process and yield analysis integrated real-time management method comprises inspecting a plurality of semiconductor products with a plurality of items to generate and record a plurality of inspecting results during semiconductor process, classifying ... | 08/29/2006 |
| 7062346 | Method for manufacturing multi-kind and small quantity semiconductor products in a mass-production line and system thereof A method for manufacturing multi-kind and small-quantity semiconductor products in a mass-production line and a system thereof are provided. In the method for manufacturing a semiconductor device through a plurality of fabrication processing steps, each of the chips... | 06/13/2006 |
| 6937914 | Method and apparatus for controlling process target values based on manufacturing metrics A method for controlling a tool adapted to process workpieces in accordance with an operating recipe based on a process target value is provided. The method includes collecting manufacturing characteristic data associated with the workpieces; correlating the manufac... | 08/30/2005 |
| 6927078 | Method of measuring contact resistance of probe and method of testing semiconductor device A measuring method of the contact resistance of a probe includes bringing a plurality of probes including a first and second probes into contact with a plurality of electrode pads that is disposed on a semiconductor device to be electrically tested and connected eac... | 08/09/2005 |
| 6704691 | Method and system for in-line monitoring process performance using measurable equipment signals A method and system for in-line monitoring process performance during wafer fabrication. First signals generated by a fabrication tool are collected and filtered to exclude abnormal signals while a model wafer is processed. The filtered first signals are ... | 03/09/2004 |
| 6704920 | Process control for micro-lithography A method is presented for controlling a process to be applied to a patterned structure in a production run. Reference data is provided being representative of diffraction signatures corresponding to a group of different fields in a structure similar to th... | 03/09/2004 |
| 6701259 | Defect source identifier A method and associated apparatus of analyzing defects on semiconductor wafers. The method includes identifying defects on the semiconductor wafer. Defect inspection information is created within a defect source identifier client. The defect inspection in... | 03/02/2004 |
| 6701204 | System and method for finding defective tools in a semiconductor fabrication facility A system and method for finding a defective tool in a semiconductor fabrication facility is disclosed. When the tools process the wafers, data representing the time period during which each wafer passes through each tool is sent to a database. The wafers ... | 03/02/2004 |
| 6699727 | Method for prioritizing production lots based on grade estimates and output requirements A method for prioritizing production flow includes processing a plurality of manufactured items in a process flow; measuring characteristics of a plurality of manufactured items in the process flow; estimating performance grades for the plurality of manuf... | 03/02/2004 |
| 6695947 | Device for manufacturing semiconductor device and method of manufacturing the same There is provided a clustered device for manufacturing a semiconductor device in which a cleaning chamber, a rapid thermal processing chamber, an optical measurement chamber, and the like are arranged around a load-lock room. In an optical measurement sys... | 02/24/2004 |
| 6698009 | Method and apparatus for modeling of batch dynamics based upon integrated metrology A method and an apparatus for performing modeling of batch dynamics in processing of semiconductor wafers. The method includes performing the process on the first semiconductor wafer in a lot, the process being controlled by a tool model, and acquiring in... | 02/24/2004 |
| 6697153 | Method and apparatus for analyzing line structures A method and an apparatus for analyzing line structures during semiconductor wafer processing. At least one semiconductor wafer is processed. Metrology data from the processed semiconductor wafer is acquired. Film property data from the semiconductor wafe... | 02/24/2004 |
| 6697691 | Method and apparatus for fault model analysis in manufacturing tools The present invention provides for a method and an apparatus for fault model analysis in manufacturing tools. A sequence of semiconductor devices is processed through a manufacturing process. Production data resulting from the processing of the semiconduc... | 02/24/2004 |
| 6697771 | Semiconductor device manufacturing system and the method thereof The semiconductor device manufacturing system of the present invention comprises: insulating film determination unit for determining whether an insulating film is present on the substrate surface or not; in-insulating-film impurity concentration extractio... | 02/24/2004 |
| 6697697 | Effective channel length control using ion implant feed forward The present invention discloses the use of ion implant recipe changes to control the effective channel length by compensating for any variation in the gate electrode width. The invention provides a method for controlling the effective channel length in FE... | 02/24/2004 |
| 6694275 | Profiler business model A quality control system implemented by a service provider for a user via the utilization of sophisticated software algorithms in creating a library of profiles based on product specification. These libraries of profiles are compared with profiles of manu... | 02/17/2004 |
