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| Number | Title | Issue Date |
| 7352054 | Semiconductor device having conducting portion of upper and lower conductive layers A semiconductor device includes a base plate, at least one first conductive layer carried by the base plate, and a semiconductor constructing body formed on or above the base plate, and having a semiconductor substrate and a plurality of external connecting electrod... | 04/01/2008 |
| 7285856 | Package for semiconductor devices To prevent the occurrence of stress in the junction portion between the semiconductor element and the semiconductor package mounting the semiconductor element, so that cracks will not occur even when there is mounted a semiconductor element having a small strength. ... | 10/23/2007 |
| 7282395 | Method of making exposed pad ball grid array package A method of making an exposed-pad ball-grid array package (11) includes applying a conductive sheet (16) to an adhesive tape (18). Stamping the conductive sheet (16) to form a die pad (24) and separating the remainder (26) o... | 10/16/2007 |
| 7256496 | Semiconductor device having adhesion increasing film to prevent peeling A semiconductor device includes at least one semiconductor constructing body provided on one side of a base member, and having a semiconductor substrate and a plurality of external connecting electrodes provided on the semiconductor substrate. An insulating layer is... | 08/14/2007 |
| 7244635 | Semiconductor device and method of manufacturing the same There are included a semiconductor substrate provided with a desirable element region, an electrode pad formed to come in contact with a surface of the semiconductor substrate or a wiring layer provided on the surface of the semiconductor substrate, a bonding pad fo... | 07/17/2007 |
| 7199459 | Semiconductor package without bonding wires and fabrication method thereof A semiconductor package without bonding wires and a fabrication method are provided. The semiconductor package includes a substrate having a front surface and a back surface, two chips formed on the front surface, two dielectric layers formed on the chips respective... | 04/03/2007 |
| 6689637 | Method of manufacturing a multi-chip semiconductor package A method of fabricating a semiconductor package capable of realizing a smaller and more compact size and improving reliability of package product and a fabrication method thereof. A main semiconductor chip operates as a lead frame or a substrate and havin... | 02/10/2004 |
| 6685817 | Method and apparatus for controlling plating over a face of a substrate According to aspect of the invention, a plating system is provided which includes a tank for containing a plating solution, a shaft extending into the tank, and a substrate holder mounted to the shaft. The shaft and the tank are rotatable relative to one ... | 02/03/2004 |
| 6673698 | Thin film semiconductor package utilizing a glass substrate with composite polymer/metal interconnect layers A thin film semiconductor die circuit package is provided utilizing low dielectric constant (k) polymer material for the insulating layers of the metal interconnect structure. Five embodiments include utilizing glass, glass-metal composite, and glass/glas... | 01/06/2004 |
| 6669489 | Interposer, socket and assembly for socketing an electronic component and method of making and using same Surface-mount, solder-down sockets permit electronic components such as semiconductor packages to be releasably mounted to a circuit board or other electronic component. In an embodiment, resilient contact structures extend through a support substrate, an... | 12/30/2003 |
| 6667546 | Ball grid array semiconductor package and substrate without power ring or ground ring A ball grid array semiconductor package is proposed, wherein at least a chip is mounted on a substrate, and signal pads on the chip are electrically connected to signal fingers on the substrate by bonding wires. A power plate and a ground plate are each a... | 12/23/2003 |
| 6667556 | Flip chip adaptor package for bare die A board for connecting a bare semiconductor die with a bond pad arrangement which does not conform to a master printed circuit board with a specific or standardized pin out, connector pad, or lead placement arrangement. The board comprises a printed circu... | 12/23/2003 |
| 6664648 | Apparatus for applying a semiconductor chip to a carrier element with a compensating layer A method and an apparatus are described for applying an integrated circuit to a carrier element. In which a curable compensating layer of initially paste-like consistency is coated substantially with full coverage onto a lower contact area of the integrat... | 12/16/2003 |
| 6660626 | Semiconductor chip assembly with simultaneously electrolessly plated contact terminal and connection joint A semiconductor chip assembly includes a semiconductor chip attached to a support circuit. The support circuit includes an insulative base and a conductive trace. The conductive trace includes a pillar and a routing line. An electrolessly plated contact t... | 12/09/2003 |
| 6661102 | Semiconductor packaging apparatus for controlling die attach fillet height to reduce die shear stress A semiconductor packaging apparatus for preventing cracking and delamination in a packaged semiconductor chip by controlling the die attach fillet height. Specifically, the present invention controls the die attach material height, thereby controlling the... | 12/09/2003 |
| 6655023 | Method and apparatus for burning-in semiconductor devices in wafer form Resilient contact structures are mounted directly to bond pads on semiconductor dies, prior to the dies being singulated (separated) from a semiconductor wafer. This enables the semiconductor dies to be exercised (e.g., tested and/or burned-in) by connect... | 12/02/2003 |
| 6653168 | LSI package and internal connecting method used therefor The present invention is provides an LSI package without employing steps for forming solder bumps on a bare chip and soldering to an interposer. In the present invention, a bare chip is mounted on the LSI package by forming wiring patterns which connect t... | 11/25/2003 |
| 6650013 | Method of manufacturing wire bonded microelectronic device assemblies Aspects of the invention provide microelectronic device assemblies including microelectronic components wire bonded to substrates, and methods of forming such assemblies. In one embodiment of the invention, a microelectronic component includes a plurality... | 11/18/2003 |
| 6635510 | Method of making a parylene coating for soldermask A method for making an HDI circuit including backside connections uses parylene as a protective coating. The method includes the steps of: procuring an insulating substrate including an active chip which has exposed electrical or thermal connection(s) on ... | 10/21/2003 |
| 6632732 | Stereolithographically fabricated conductive elements, semiconductor device components and assemblies including such conductive elements, and methods Stereolithographically fabricated conductive elements and semiconductor device components and assemblies including these conductive elements. The conductive elements may include multiple superimposed, contiguous, mutually adhered layers of a conductive ma... | 10/14/2003 |
| 6624648 | Probe card assembly A probe card assembly includes a probe card, a space transformer, and an interposer disposed between the space transformer and the probe card. Suitable mechanisms for adjusting the orientation of the space transformer without changing the orientation of t... | 09/23/2003 |
| 6615485 | Probe card assembly and kit, and methods of making same A probe card assembly includes a probe card, a space transformer having resilient contact structures (probe elements) mounted directly to (i.e., without the need for additional connecting wires or the like) and extending from terminals on a surface thereo... | 09/09/2003 |
| 6617684 | Packaged die on PCB with heat sink encapsulant An apparatus and a method for providing a heat sink on an upper surface of a semiconductor chip by placing a heat-dissipating material thereon which forms a portion of a glob top. The apparatus comprises a semiconductor chip attached to and in electrical ... | 09/09/2003 |
| 6613608 | Semiconductor wafer with anisotropic conductor film, and method of manufacture thereof An anisotropic conductive film 2 is superimposed on a circuit face 1a of a semiconductor wafer 1, and sandwiched and depressurizably surrounded with a flexible film 3 and a rigid plate 4 (or two flexible films) in the laminating direction, followed by dep... | 09/02/2003 |
| 6593647 | Semiconductor device This invention provides a semiconductor device and its manufacturing method capable of mounting a plurality of semiconductor elements without reducing the reliability of the semiconductor device. More specifically, this invention provides a semiconductor ... | 07/15/2003 |
| 6589859 | Method of manufacturing an electronic power component, and an electronic power component obtained thereby In the method, the following are placed in succession on a substrate: at least one conductive layer and at least one semiconductor power circuit, and metal connection tabs are fitted to the face of the semiconductor circuit facing away from the conductive... | 07/08/2003 |
| 6590291 | Semiconductor device and manufacturing method therefor Semiconductor chips having a thickness of 50 μm or so are imbedded and mounted inside a package, such that multi-level stacking is facilitated by providing external connection terminals on both surfaces of the package, or, alternatively, exposing the ter... | 07/08/2003 |
| 6586280 | Method of manufacturing a semiconductor chip array with two-sided cooling A method of manufacturing a semiconductor device including a substrate and a die supported thereon. The substrate has at least one electrical connection region on a first portion of a surface of the substrate. The die has a bottom surface portion supporte... | 07/01/2003 |
| 6580162 | Ball grid array (BGA) semiconductor package improving solder joint reliability A BGA semiconductor package including: a semiconductor chip on which a chip pad is formed; a flexible member formed on the semiconductor chip; a metal pattern formed on one surface of the flexible member; a connection member for electrically connecting th... | 06/17/2003 |
| 6566749 | Semiconductor die package with improved thermal and electrical performance A semiconductor die package is disclosed. In one embodiment, the package includes a semiconductor die comprising a vertical power transistor. A source electrode and a gate contact region are at the first surface of the semiconductor die. A drain electrode... | 05/20/2003 |
| 6555900 | Package, semiconductor device and method for fabricating the semiconductor device A package according to the present invention includes: a support for mounting a semiconductor component on the upper surface thereof; a positioning control plate, which is secured to the support and includes an opening or a notch; and a lead provided on t... | 04/29/2003 |
| 6548891 | Semiconductor device and production process thereof In the production of semiconductor devices, a surface of the portion corresponding to the chip packaging area of the glass substrate is treated with plasma in a vacuum, a silicon chip is bonded-through its surface opposed to an electrode-bearing surface o... | 04/15/2003 |
| 6538310 | LSI package with internal wire patterns to connect and mount bare chip to substrate The present invention is provides an LSI package without employing steps for forming solder bumps on a bare chip and soldering to an interposer. In the present invention, a bare chip is mounted on the LSI package by forming wiring patterns which connect t... | 03/25/2003 |
| 6534858 | Assembly and methods for packaged die on pcb with heat sink encapsulant An apparatus and a method for providing a heat sink on an upper surface of a semiconductor chip by placing a heat-dissipating material thereon which forms a portion of a glob top. The apparatus comprises a semiconductor chip attached to and in electrical ... | 03/18/2003 |
| 6535012 | Universal wafer carrier for wafer level die burn-in A reusable burn-in/test fixture for testing unsingulated dice on a semiconductor wafer consists of two halves. The first half of the test fixture is a wafer cavity plate for receiving the wafer, and the second half establishes electrical communication bet... | 03/18/2003 |
| 6528351 | Integrated package and methods for making same One or more integrated circuit chips each containing conductive pads on one surface, are embedded in a substrate such that the conductive pads are exposed and the one surface of each chip is substantially coplanar with a top surface of the substrate. Elec... | 03/04/2003 |
| 6521979 | Member for semiconductor package and semiconductor package using the same, and fabrication method thereof A member for a semiconductor package and a semiconductor package using the member, and a method for fabricating the semiconductor package are provided to simply connect chip pads provided on a semiconductor chip to external terminals. With the member for ... | 02/18/2003 |
| 6519161 | Molded electronic package, method of preparation and method of shielding-II A packaged electronic circuit using molded plastics, Thick Film, and Polymer Thick Film technology, and achieving shielding of the circuitry and components of the package. In this invention at least one of electronic devices in the package is supported in... | 02/11/2003 |
| 6511865 | Method for forming a ball bond connection joint on a conductive trace and conductive pad in a semiconductor chip assembly A semiconductor chip assembly includes a semiconductor chip attached to a support circuit. The support circuit includes a conductive trace. A ball bond contacts and electrically connects the conductive trace and the pad. A method of manufacturing the asse... | 01/28/2003 |
| 6509205 | Apparatus and method for providing mechanically pre-formed conductive leads The present invention is directed toward an apparatus and method for providing mechanically pre-formed conductive leads. In one embodiment of the invention, an apparatus includes a forming chuck engageable with a first surface of a conductive sheet, and a... | 01/21/2003 |
