Safety System For Remove a Rider From a Vehicle by Deploying a Parachute
Methods and apparatus for reducing the velocity of a rider in or on an open cockpit vehicle when the rider is thrown from the vehicle.
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7427558 | Method of forming solder ball, and fabricating method and structure of semiconductor package using the same A method of forming solder balls may involve forming bumps through wire boding on land patterns of a circuit substrate. Solder cream may be applied to the bumps through screen printing. The solder cream may be melted via reflow to form solder balls in which the bump... | 09/23/2008 |
| 7427557 | Methods of forming bumps using barrier layers as etch masks Forming an electronic structure may include forming a seed layer on a substrate, and forming a mask on the seed layer. The mask may include an aperture therein exposing a portion of the seed layer, and a barrier layer may be formed on the exposed portion of the seed... | 09/23/2008 |
| 7422973 | Method for forming multi-layer bumps on a substrate A method for forming multi-layer bumps on a substrate includes depositing an adhesive or a flux on the substrate, depositing a first metal powder on the adhesive, and melting or reflowing the adhesive and first metal powder to form first bumps. An adhesive or a flux... | 09/09/2008 |
| 7420280 | Reduced stress under bump metallization structure An improved under bump structure for use in semiconductor devices is described. The under bump structure includes a passivation layer having a plurality of vias. The vias are positioned such that a plurality of vias are associated with (i.e., located over) each cont... | 09/02/2008 |
| 7416980 | Forming a barrier layer in interconnect joints and structures formed thereby Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a barrier layer on a substrate, wherein the barrier layer comprises molybdenum; and forming a lead free interconnect structure on the barrier layer. ... | 08/26/2008 |
| 7411210 | Semiconductor probe with resistive tip having metal shield thereon A semiconductor probe with a resistive tip and a method of fabricating the semiconductor probe. The resistive tip doped with a first impurity includes a resistive region formed at a peak thereof and lightly doped with a second impurity opposite in polarity to the fi... | 08/12/2008 |
| 7408261 | BGA package board and method for manufacturing the same Disclosed herein is a Ball Grid Array (BGA) package board. The BGA package board includes a first external layer on which a pattern comprising a circuit pattern and a wire bonding pad pattern is formed, a second external layer on which a pattern comprising a circuit... | 08/05/2008 |
| 7405144 | Method for manufacturing probe card A method for manufacturing a probe card is provided. A first inactive layer, a first patterned photoresist layer and a first metal layer are sequentially formed on a substrate. The first metal layer has first through holes exposing a portion of the first patterned p... | 07/29/2008 |
| 7399695 | Integrated die bumping process An integrated die bumping process includes providing a load board, defining a plurality of die regions on a surface of the load board for placing dice of a plurality of die specifications, affixing a plurality of dice respectively on the die regions according to the... | 07/15/2008 |
| 7396752 | Method and apparatus for reducing cold joint defects in flip chip products An electronic device is disclosed with solder bumps treated to improve coplanarity and reduce the effects of poor solder bump surface quality, and a method of constructing same. An electronic device is placed against a flat plate and a controlled amount of force is ... | 07/08/2008 |
| 7391112 | Capping copper bumps A structure including a substrate, a copper bump formed over the substrate, and a barrier layer comprising an alloy of at least one of iron and nickel, formed over the copper bump, and methods to make such a structure. ... | 06/24/2008 |
| 7390697 | Enhanced adhesion strength between mold resin and polyimide A new method is provided for the interface between a stress relieve interface layer of polyimide and a thereover created layer of mold compound. The invention provides for creating a pattern in the stress relieve layer of polyimide before the layer of mold compound ... | 06/24/2008 |
| 7388288 | Flip chip metallization method and devices Interconnect metallization schemes and devices for flip chip bonding are disclosed and described. Metallization schemes include an adhesion layer, a diffusion barrier layer, a wetable layer, and a wetting stop layer. Various thicknesses and materials for use in the ... | 06/17/2008 |
| 7375020 | Method of forming bumps The present invention provides a method of forming a plurality of bumps over a wafer. The wafer has a plurality of contact pads and a passivation layer thereon and the passivation layer exposes the contact pads. An adhesion layer is formed over the active surface of... | 05/20/2008 |
| 7375021 | Method and structure for eliminating aluminum terminal pad material in semiconductor devices A method for far back end of line (FBEOL) semiconductor device formation includes forming a terminal copper pad in an upper level of a semiconductor wafer, forming an insulating stack over the terminal copper pad, and patterning and opening a terminal via within a p... | 05/20/2008 |
| 7372153 | Integrated circuit package bond pad having plurality of conductive members An integrated circuit package bond pad includes an insulating layer and an electrode located over the insulating layer. The electrode has a first surface configured to be bonded to external circuitry and a second surface opposite the first surface. A plurality of co... | 05/13/2008 |
| 7364998 | Method for forming high reliability bump structure Methods for forming a bump on a semiconductor substrate, the substrate having a contact pad thereon, is provided. In one embodiment, the method comprises depositing a passivation layer over the substrate and the contact pad. The passivation layer is patterned and et... | 04/29/2008 |
| 7358177 | Fabrication method of under bump metallurgy structure A fabrication method of under bump metallurgy (UBM) structure is provided. A blocking layer is applied over a surface of a semiconductor element formed with at least one bond pad and a passivation layer thereon. The passivation layer covers the semiconductor element... | 04/15/2008 |
| 7355280 | Method for forming a bump, semiconductor device and method of fabricating same, semiconductor chip, circuit board, and electronic instrument A method for forming a bump includes the steps of forming a resist layer so that a through-hole formed therein is located on a pad; and forming a metal layer to be electrically connected to the pad conforming to the shape of the through-hole. The metal layer is form... | 04/08/2008 |
| 7355285 | Structure of mounting electronic component The structure of mounting an electronic component on a circuit board is capable of securely flip-chip-bonding the electronic component having bumps, whose separations are very short, to the circuit board without displacement. The structure of mounting an electronic ... | 04/08/2008 |
| 7344971 | Manufacturing method of semiconductor device A manufacturing method of a semiconductor device comprises: (a) setting up a paste including a resin on an electrical connection part which is electrically connected to a semiconductor substrate; (b) setting up a soldering material above the electrical connection pa... | 03/18/2008 |
| 7332424 | Fluxless solder transfer and reflow process Disclosed is a new process that permits the transfer and reflow of solder features produced by Injection Molded Solder (IMS) from a mold plate to a solder receiving substrate without the use of flux. Several embodiments produce solder transfer and reflow separately ... | 02/19/2008 |
| 7329563 | Method for fabrication of wafer level package incorporating dual compliant layers A method is provided for forming wafer level package that incorporates dual compliant layers and a metal cap layer on top of I/O pads. The wafer level package includes a plurality of metal cap layers formed on top of a plurality of I/O pads to function as stress buf... | 02/12/2008 |
| 7329562 | Process of producing semiconductor chip with surface interconnection at bump A semiconductor chip including a bump projecting from a surface protective film thereof and a surface interconnection having a smaller height than the bump. The surface interconnection may project from the surface protective film or may be flush with the surface pro... | 02/12/2008 |
| 7326638 | Method for manufacturing semiconductor device An electronic circuit is formed on a semiconductor substrate and electrode pads are formed, which are formed by disposing electrode terminals of the electronic circuit through interconnections on a surface of the semiconductor substrate. After grinding a back surfac... | 02/05/2008 |
| 7323405 | Fine pitch low cost flip chip substrate A method of forming a package is disclosed, which includes steps of forming a substrate, a solder masker, and a first aperture through the solder mask. The substrate has a surface on which metal traces are formed. The solder mask covers at least a portion of the sur... | 01/29/2008 |
| 7323780 | Electrical interconnection structure formation An electrical interconnection structure and method for forming. The electrical structure comprises a substrate comprising electrically conductive pads and a first dielectric layer over the substrate and the electrically conductive pads. The first dielectric layer co... | 01/29/2008 |
| 7319341 | Method of maintaining signal integrity across a capacitive coupled solder bump The present invention is a novel method and computer program product which utilizes an interface capacitor formed by the metal of the probe tip, a dielectric layer, such as an oxide, formed by a contaminant on a solder bump and the metal of the solder bump. The inte... | 01/15/2008 |
| 7314818 | Semiconductor device and method of manufacturing the same, circuit board, and electronic equipment A tip of a first wire is bonded to a first electrode. The first wire is drawn from the first electrode to a bump on a second electrode. A part of the first wire is deformed and bonded to the bump. A tip of a second wire formed in the shape of a ball is bonded to the... | 01/01/2008 |
| 7312142 | Method for making cable with a conductive bump array, and method for connecting the cable to a task object A cable with conductive bumps is fabricated by forming a photoresist layer with multiple openings on a cable substrate, coating a conductive layer on the photoresist layer whereby the conductive layer in the openings forms the bumps at circuits on the cable substrat... | 12/25/2007 |
| 7309647 | Method of mounting an electroless nickel immersion gold flip chip package A flip chip package, apparatus and technique in which a ball grid array composed of a doped eutectic Pb/Sn solder composition is used. The dopant in the Pb/Sn solder forms a compound or complex with the phosphorous residue from the electroless nickel plating process... | 12/18/2007 |
| 7307001 | Wafer repair method using direct-writing A method of wafer repairing comprises identifying locations and patterns of defective regions in a semiconductor wafer; communicating the locations and patterns of defective regions to a direct-writing tool; forming a photoresist layer on the semiconductor wafer; lo... | 12/11/2007 |
| 7304391 | Modified chip attach process and apparatus A method of packaging a die includes reflowing the solder to electrically connect the die to a substrate at a first temperature, cooling the die and substrate to a second temperature, and placing a heated epoxy in contact with the die and the substrate. The method a... | 12/04/2007 |
| 7303947 | Source bridge for cooling and/or external connection A FET includes elongated, mutually parallel source regions separated by gate and drain regions. Conductive bridges extend over the gate and drain regions and not in electrical contact therewith to electrically and thermally interconnect the sources. A layer of diele... | 12/04/2007 |
| 7301244 | Semiconductor device A semiconductor device should have a structure that allows locating electronic components in a region under a bonding pad. The semiconductor device includes a bonding pad constituting the external connection terminal; a region under the bonding pad including at leas... | 11/27/2007 |
| 7300819 | Semiconductor device, method for mounting the same, and method for repairing the same A method for mounting a semiconductor device, which can decrease the occurrence rate of failures, a method for repairing a semiconductor device, which can easily repair defective solder joints, and a semiconductor device which makes those methods feasible. A ... | 11/27/2007 |
| 7294929 | Solder ball pad structure An interconnect structure a substrate, a contact pad disposed over a surface of the substrate, and an insulative mask disposed over the contact pad. The insulative mask can include an opening that is aligned over and exposes an inner portion of the contact pad. The ... | 11/13/2007 |
| 7285486 | Ball transferring method and apparatus Balls are sucked onto a carrier board so as to be temporarily arranged in a ball arrangement region of the board, and then the balls are transferred and bonded onto an objective substance with their positions being adjusted. Gas blow is applied to the temporarily ar... | 10/23/2007 |
| 7282432 | Semiconductor device, manufacturing method and apparatus for the same A highly reliable semiconductor chip electrode structure allowing control of interface reaction of bonding sections even in the case of using two- or three-element solder used conventionally is disclosed. A solder alloy making layer for preventing dissolving and dif... | 10/16/2007 |
| 7279411 | Process for forming a redundant structure Device and method of fabricating device. The device includes a dual damascene line having a metal line and a via, and a redundant liner arranged to divide the metal line. The method includes forming a trench in a metal stripe of a dual damascene line, depositing a b... | 10/09/2007 |