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| Number | Title | Issue Date |
| 7432179 | Controlling gate formation by removing dummy gate structures A method of forming semiconductor structures comprises following steps. A gate dielectric layer is formed over a substrate in an active region. A gate electrode layer is formed over the gate dielectric layer. A first photo resist is formed over the gate electrode la... | 10/07/2008 |
| 7419894 | Gate electrode and manufacturing method thereof, and semiconductor device and manufacturing method thereof The present invention provides a method of manufacturing a gate electrode in which a fine gate electrode can effectively be manufactured by thickening a resist opening for gate electrodes formed by ordinary electron beam lithography so as to reduce opening dimension... | 09/02/2008 |
| 7364924 | Silicon phosphor electroluminescence device with nanotip electrode An electroluminescence (EL) device and a method are provided for fabricating said device with a nanotip electrode. The method comprises: forming a bottom electrode with nanotips; forming a Si phosphor layer adjacent the nanotips; and, forming a transparent top elect... | 04/29/2008 |
| 7259075 | Method for manufacturing field effect transistor The manufacturing stability can be improved while effectively inhibiting the short-channel effect in the transistor according to the present invention. A halo impurity having a conductivity type opposite to a first conductivity type of a first impurity is ion-implan... | 08/21/2007 |
| 7217644 | Method of manufacturing MOS devices with reduced fringing capacitance An embodiment of the present invention includes a gate dielectric layer, a polysilicon layer, and a gate electrode. The gate dielectric layer is on a substrate. The substrate has a gate area, a source area, and a drain area. The polysilicon layer is on the gate diel... | 05/15/2007 |
| 7157378 | Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode A method for making a semiconductor device is described. That method comprises forming a dielectric layer on a substrate, forming a trench within the dielectric layer, and forming a high-k gate dielectric layer within the trench. After forming a first metal layer on... | 01/02/2007 |
| 7129152 | Method for fabricating a short channel field-effect transistor A method for fabricating a short channel field-effect transistor is presented. A sublithographic gate sacrificial layer is formed, as are spacers at the side walls of the gate sacrificial layer. The gate sacrificial layer is removed to form a gate recess and a gate ... | 10/31/2006 |
| 6703678 | Schottky barrier field effect transistor large in withstanding voltage and small in distortion and return-loss A Schottky barrier field effect transistor has a gate electrode formed with a field plate in order to achieve a high withstanding voltage, where the thickness of the dielectric layer between the channel layer and the field plate, the distance between the ... | 03/09/2004 |
| 6617660 | Field effect transistor semiconductor and method for manufacturing the same This invention has an objective to provide a field effect transistor semiconductor which has great adhesiveness between a gate metal and an insulating film defining a gate electrode end and to improve production yield thereof. The field effect transistor ... | 09/09/2003 |
| 6521961 | Semiconductor device using a barrier layer between the gate electrode and substrate and method therefor An enhancement mode semiconductor device has a barrier layer disposed between the gate electrode of the device and the semiconductor substrate underlying the gate electrode. The barrier layer increases the Schottky barrier height of the gate electrode-bar... | 02/18/2003 |
| 6476427 | Microwave monolithic integrated circuit and fabrication process thereof A microwave monolithic integrated circuit comprises a T-shaped gate electrode including a Schottky gate electrode formed on a first region of a compound semiconductor substrate, a pair of ohmic electrodes making an ohmic contact with a surface of the subs... | 11/05/2002 |
| 6458640 | GaAs MESFET having LDD and non-uniform P-well doping profiles A MESFET has a conduction channel provided with a first doping profile in a first portion which extends between the source and the gate, and a second doping profile in a second portion which extends between the gate and the drain. A background p-type regi... | 10/01/2002 |
| 6455361 | Semiconductor device and manufacturing method of the same A gate electrode rectangular in section is formed by patterning on a GaAs substrate as a compound substrate having a channel layer. Subsequently, a specific metal, e.g., Ti is deposited. A solid-phase reaction layer to serve as source/drain is formed in a... | 09/24/2002 |
| 6429471 | Compound semiconductor field effect transistor and method for the fabrication thereof Disclosed is a compound semiconductor field effect transistor. The compound semiconductor field effect transistor has a charge absorption layer and a semiconductor laminated structure. The charge absorption layer includes a compound semiconductor layer of... | 08/06/2002 |
| 6383853 | Method of fabricating semiconductor device A method of fabricating a semiconductor device, capable of forming a pattern more finely and more variously without depending on the performance of an exposing device. Aluminum is vapor deposited on a spacer film from an oblique direction to form a metal ... | 05/07/2002 |
| 6329230 | High-speed compound semiconductor device having an improved gate structure A semiconductor device includes a gate structure formed on a substrate in which an LDD structure is formed, wherein gate structure includes a Schottky electrode making a Schottky contact with a channel region in the substrate, a low-resistance layer provi... | 12/11/2001 |
| 6278144 | Field-effect transistor and method for manufacturing the field effect transistor A high power FET has a first conductivity epitaxial layer overlying a semi-insulating substrate, a second conductivity epitaxial layer, a gate being in Schottky contact with the second conductivity layer, and source and drain regions being in ohmic contac... | 08/21/2001 |
| 6262444 | Field-effect semiconductor device with a recess profile By using the InGaAs layer in which the In composition is graded or varied by stages for the contact resistance reducing cap layer of the recess type compound semiconductor FET as well as using the selective etching to InAs and GaAs at the time of recess e... | 07/17/2001 |
| 6255679 | Field effect transistor which can operate stably in millimeter wave band In order to achieve an aspect of the present invention, in a field effect transistor, a compound semiconductor substrate has an active region, and a gate finger electrode is formed on the active region. Source and drain stripe electrodes are formed on the... | 07/03/2001 |
| 6198116 | Complementary heterostructure integrated single metal transistor fabrication method A method for fabricating a periodic table group III-IV metal semiconductor metal field-effect enhancement mode complementary transistor pair device is described, a device typically made of gallium arsenide materials. The disclosed fabrication uses initial... | 03/06/2001 |
| 6078071 | High-speed compound semiconductor device having an improved gate structure A semiconductor device includes a gate structure formed on a substrate in which an LDD structure is formed, wherein gate structure includes a Schottky electrode making a Schottky contact with a channel region in the substrate, a low-resistance layer provi... | 06/20/2000 |
| 6025614 | Amplifier semiconductor element, method for fabricating the same, and amplifier semiconductor device The amplifier semiconductor element of this invention includes a field effect transistor of which a threshold voltage Vth has a predetermined relationship with an operating voltage.... | 02/15/2000 |
| 5982023 | Semiconductor device and field effect transistor A dummy gate is removed together with an SiO2 film thereon by lift-off to form a reverse dummy-gate pattern with the SiO2 film. A photoresist pattern is formed to cover the reverse dummy-gate pattern and an SiN protection film thereb... | 11/09/1999 |
| 5888890 | Method of manufacturing field effect transistor A method of manufacturing a field effect transistor according to the present invention is disclosed including the steps of preparing a semiconductor substrate; forming an insulating film for use as high concentration on the semiconductor substrate; formin... | 03/30/1999 |
| 5733806 | Method for forming a self-aligned semiconductor device A method for forming a self-aligned semiconductor device (10) having sidewall spacers (16,17) used to align the formation of a source region (23) and a drain region (24) along with the formation of a gate structure (35). Spacers (16,17) can be formed usin... | 03/31/1998 |
| 5686325 | Method for forming MESFET having T-shaped gate electrode A compound semiconductor transistor has a structure in which a first insulating film is formed only under a overhang of a gate electrode an upper part of which is formed widely, and a second insulating film for threshold voltage adjustment is formed on th... | 11/11/1997 |
| 5640026 | Compound semiconductor device including implanted isolation regions A method of performing element separation by ion implantation for a compound semiconductor device includes performing first ion implantation into the entire contour of the device periphery region to produce a first insulating region having a region of the... | 06/17/1997 |
| 5619064 | III-V semiconductor gate structure and method of manufacture A manufacturable III-V semiconductor gate structure having small geometries is fabricated. A silicon nitride layer is formed on a III-V semiconductor material and a dielectric layer comprised of aluminum is formed on the silicon nitride layer. Another die... | 04/08/1997 |
| 5585289 | Method of producing metal semiconductor field effect transistor A field effect transistor includes a semi-insulating GaAs substrate; source, gate, and drain electrodes disposed on a surface of the GaAs substrate; a low carrier concentration active region disposed in the GaAs substrate lying beneath the gate electrode;... | 12/17/1996 |
| 5580803 | Production method for ion-implanted MESFET having self-aligned lightly doped drain structure and T-type gate A production method for ion-implanted MESFET having self-aligned LDD structure and T-type gate, that the reverse mesa portion is formed at a predetermined part of the channel region which the source and drain regions are formed at both side by using caps ... | 12/03/1996 |
| 5556797 | Method of fabricating a self-aligned double recess gate profile A method of fabricating a self-aligned double gate recess profile in a semiconductor substrate is disclosed in which a first mask layer is formed over the substrate. A second mask layer having an opening is formed over the first mask layer. An opening at ... | 09/17/1996 |
| 5557141 | Method of doping, semiconductor device, and method of fabricating semiconductor device A group III-V compound semiconductor doped with an impurity, having an undoped film of SiOx and a film for preventing the diffusion of Group V atoms (e.g., an SiN film) are formed on a crystal of Group III-V compound semiconductor in which the silicon in ... | 09/17/1996 |
| 5508210 | Element isolating method for compound semiconductor device A method of element isolation includes implanting ions in a compound semiconductor substrate at the periphery of a semiconductor device in the substrate to produce a first insulating region having a region of maximum implanted ion concentration within a b... | 04/16/1996 |
| 5497024 | GaAs MIS device A combination of a semiconductor region essentially consisting of Alx Ga1-x As (0ࣘxࣘ1), an insulating film formed on the surface of the semiconductor region and essentially consisting of GaAsx Py Oz | 03/05/1996 |
| 5493136 | Field effect transistor and method of manufacturing the same This invention provides a high-speed FET with a sufficiently high output current, and an FET having a high mobility of channel electrons and a high electron saturation rate. For this purpose, in this invention, a buffer layer, a first channel layer, a fir... | 02/20/1996 |
| 5486710 | Field effect transistor A field effect transistor includes a semi-insulating GaAs substrate; source, gate, and drain electrodes disposed on a surface of the GaAs substrate; a low carrier concentration active region disposed in the GaAs substrate lying beneath the gate electrode;... | 01/23/1996 |
| 5484740 | Method of manufacturing a III-V semiconductor gate structure A manufacturable III-V semiconductor gate structure having small geometries is fabricated. A silicon nitride layer is formed on a III-V semiconductor material and a dielectric layer comprised of aluminum is formed on the silicon nitride layer. Another die... | 01/16/1996 |
| 5448085 | Limited current density field effect transistor with buried source and drain A buried source and drain microwave field effect transistor which provides reduced current density and reduced electric field intensity near the transistor's surface region is disclosed. Operating life and reliability of the transistor are improved by the... | 09/05/1995 |
| 5445977 | Method of fabricating a Schottky field effect transistor A field effect transistor structure is disclosed. A SiN insulating layer is deposited on a semi-insulating GaAs substrate. A slit window is formed to determine the effective gate length formed after pattern forming a high density n-type region by ion impl... | 08/29/1995 |
| 5408111 | Field-effect transistor having a double pulse-doped structure A buffer layer, a first undoped layer, a first active layer and second undoped layer, a second active layer, a third undoped layer, a cap layer and contact layers are epitaxially grown on a semiconductor substrate in the stated order. A gate electrode is ... | 04/18/1995 |
