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| Number | Title | Issue Date |
| 7439108 | Coplanar silicon-on-insulator (SOI) regions of different crystal orientations and methods of making the same In a first aspect, a first method is provided for semiconductor device manufacturing. The first method includes the steps of (1) providing a substrate; and (2) forming a first silicon-on-insulator (SOI) region having a first crystal orientation, a second SOI region ... | 10/21/2008 |
| 7413966 | Method of fabricating polysilicon thin film transistor with catalyst A method of forming a polycrystalline silicon active layer for use in a thin film transistor is provided. The method includes forming a buffer layer over a substrate, forming an amorphous silicon layer over the buffer layer, applying a catalytic metal to a surface o... | 08/19/2008 |
| 7410854 | Method of making FUSI gate and resulting structure Generally disclosed is a method of a device comprising forming a polysilicon stack including a first and a second polysilicon layer with an intervening etch stop layer, wherein the first polysilicon layer height is at least one third a height of the polysilicon stac... | 08/12/2008 |
| 7382021 | Insulated gate field-effect transistor having III-VI source/drain layer(s) A transistor includes one or more channel taps containing a stack consisting at least in part of a semiconductor an interfacial III-VI layered compound and a conductor. The III-VI compound consists primarily of atoms from Groups IIIA-B and from Group VIA of the Peri... | 06/03/2008 |
| 7259047 | Method for manufacturing organic thin-film transistor with plastic substrate A method for manufacturing an organic thin-film transistor with a plastic substrate, comprising steps of: providing a mold and a plastic substrate, said mold being provided with a relief printing structure; imprinting said plastic substrate by said mold so as to def... | 08/21/2007 |
| 6521525 | Electro-optic device, drive substrate for electro-optic device and method of manufacturing the same An electro-optic device, such as an LCD, includes a display unit and a peripheral drive circuit unit on a single substrate. A gate comprising a gate electrode and gate insulation film is formed on a surface of the substrate. A layer of a substance having ... | 02/18/2003 |
| 6399429 | Method of forming monocrystalline silicon layer, method for manufacturing semiconductor device, and semiconductor device Single-crystal silicon is deposited on an insulating substrate (1) with a crystalline sapphire layer (50) formed thereon as a seed, to form a silicon epitaxial layer (7). P-type impurity ions are implanted into a single-crystal silicon layer, and then N-t... | 06/04/2002 |
| 6372592 | Self-aligned MOSFET with electrically active mask A method for making a self-aligned FET with an electrically active mask comprises the steps of forming a semiconductor layer on an insulating substrate, forming an electrically nonconductive oxide layer on the semiconductor layer, forming an electrically ... | 04/16/2002 |
| 6372558 | Electrooptic device, driving substrate for electrooptic device, and method of manufacturing the device and substrate The present invention provides an active matrix substrate having a built-in high-performance driver, in which a single crystal silicon thin film having high electron/hole mobility is uniformly deposited at a relatively low temperature, and an electrooptic... | 04/16/2002 |
| 6365936 | Ultra-high resolution liquid crystal display on silicon-on-sapphire A liquid crystal array and associated drive circuitry are monolithically formed on a silicon-on-sapphire structure, and are fabricated by a method comprising the steps of: a) forming an epitaxial silicon layer on a sapphire substrate to create a silicon-o... | 04/02/2002 |
| 6346718 | Electro-optic device, drive substrate for electro-optic device and method of manufacturing the same An electro-optic device, such as an LCD, includes a display unit and a peripheral drive circuit unit on a single substrate. A gate comprising a gate electrode and gate insulation film is formed on a surface of the substrate. A layer of a substance having ... | 02/12/2002 |
| 5834793 | Semiconductor devices A semiconductor device has a semiconductor substrate, a source and a drain region, each formed at the surface of said semiconductor substrate, and each having a potential barrier with respect to the semiconductor substrate. A gate electrode is formed on t... | 11/10/1998 |
| 5410172 | Thin film transistor and preparation thereof A thin film transistor is provided with a semiconductor layer disposed on an insulating layer region having a channel region and a plurality of main electrode regions having an impurity concentration higher than an impurity concentration of the channel re... | 04/25/1995 |
| 5391903 | Selective recrystallization to reduce P-channel transistor leakage in silicon-on-sapphire CMOS radiation hardened integrated circuits A silicon layer formed atop a sapphire substrate is selectively recrystallized such that the original degraded quality of the crystallinity of an N-well region where a P-channel device is to be formed is enhanced, so that leakage in the P-channel device i... | 02/21/1995 |
| 5298434 | Selective recrystallization to reduce P-channel transistor leakage in silicon-on-sapphire CMOS radiation hardened integrated circuits A preamorphized silicon layer formed atop a sapphire substrate is selectively recrystallized such that the original degraded quality of the crystallinity of an N-well region where a P-channel device is to be formed is enhanced, so that leakage in the P-ch... | 03/29/1994 |
| 4433469 | Method of forming a self aligned aluminum polycrystalline silicon line An improved self-aligned conductive gate member formed by suppressing or decreasing the size of the as-deposited grains of polysilicon and by suppressing further grain growth which may occur during a subsequent annealing or processing step. By maintaining... | 02/28/1984 |
| 4394182 | Microelectronic shadow masking process for reducing punchthrough A process for forming a doped region in a substrate which is in alignment with a circuit member by forming a masking member on a layer, the masking member defining the outline on the circuit member; and etching the layer employing the masking member as a ... | 07/19/1983 |
| 4380773 | Self aligned aluminum polycrystalline silicon contact An improved self-aligned conductive gate member formed by suppressing or decreasing the size of the as-deposited grains of polysilicon and by suppressing further grain growth which may occur during a subsequent annealing or processing step. By maintaining... | 04/19/1983 |
| 4348804 | Method of fabricating an integrated circuit device utilizing electron beam irradiation and selective oxidation Dielectric isolation through electron beam irradiation is applied to a method of fabricating a semiconductor device. Upon forming an insulated gate field effect semiconductor device (FET) in a semiconductor layer on an insulation substrate, the insulated ... | 09/14/1982 |
| 4271422 | CMOS SOS With narrow ring shaped P silicon gate common to both devices A layer of polycrystalline silicon is coated with a masking layer leaving at least one edge of the silicon layer exposed. A P-type dopant is diffused into the exposed edge of the silicon layer so that the dopant diffuses laterally along the silicon layer ... | 06/02/1981 |
| 4263709 | Planar semiconductor devices and method of making the same A semiconductor device includes a region of polycrystalline silicon on a portion of the surface of a body of semiconductor material. A layer of oxidized polycrystalline silicon is also on the semiconductor material body and extends to the polycrystalline ... | 04/28/1981 |
| 4263057 | Method of manufacturing short channel MOS devices A short channel MOS transistor and the method for fabricating same is described wherein the dopant concentrations of the source and drain regions are maintained at different levels of conductivity modifiers. The method described teaches first doping the s... | 04/21/1981 |
| 4252574 | Low leakage N-channel SOS transistors and method of making them A method for making low leakage N-channel silicon-on-sapphire (SOS) transistor is described. The transistor has reduced edge leakage as a result of acceptor ion impurities introduced into the edges of the silicon islands on which the transistor is formed.... | 02/24/1981 |
| 4225875 | Short channel MOS devices and the method of manufacturing same A short channel MOS transistor and the method for fabricating same is described wherein the dopant concentrations of the source and drain regions are maintained at different levels of conductivity modifiers. The method described teaches first doping the s... | 09/30/1980 |
| 4201603 | Method of fabricating improved short channel MOS devices utilizing selective etching and counterdoping of polycrystalline silicon A method for fabricating a short channel MOS device is described wherein the conductivity of the gate member is increased by a factor of about 2.5 by counterdoping a P-type doped polycrystalline line with an N-type dopant.... | 05/06/1980 |
