Did You Know...
...that the Slinky toy was the result of a failed attempt by engineer Richard James to produce an antivibration device for ship instruments? His goal was to develop a spring that would instantaneously counterbalance the wave motion that rocks a ship at sea. Instead, he developed the Slinky.
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| Number | Title | Issue Date |
| 7429534 | Etching a nitride-based heterostructure An improved solution for producing nitride-based heterostructure(s), heterostructure device(s), integrated circuit(s) and/or Micro-Electro-Mechanical System(s) is provided. A nitride-based etch stop layer that includes Indium (In) is included in a heterostructure. A... | 09/30/2008 |
| 7408182 | Surface passivation of GaN devices in epitaxial growth chamber The present invention relates to passivation of a gallium nitride (GaN) structure before the GaN structure is removed from an epitaxial growth chamber. The GaN structure includes one or more structural epitaxial layers deposited on a substrate, and the passivation l... | 08/05/2008 |
| 7291873 | High electron mobility epitaxial substrate A compound semiconductor epitaxial substrate for use in a strain channel high electron mobility field effect transistor, comprising an InGaAs layer as a strain channel layer 6 and AlGaAs layers containing n-type impurities as back side and front side electron... | 11/06/2007 |
| 7276747 | Semiconductor device having screening electrode and method In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes a screening electrode spaced apart from a channel region. ... | 10/02/2007 |
| 7262446 | Semiconductor device and process for production thereof A semiconductor device which is capable of operating with a single positive power supply and has a low gate resistance, and a process for production thereof. The semiconductor device includes a channel layer (which constitutes a current channel), a first semi... | 08/28/2007 |
| 7187014 | Semiconductor device and method for fabricating the same A semiconductor device has a sapphire substrate, a semiconductor layer made of GaN provided on the sapphire substrate, a multilayer film provided on the semiconductor layer, and an electrode in ohmic contact with the multilayer film. The multilayer film has been for... | 03/06/2007 |
| 7161179 | Semiconductor device and method of manufacturing the same In a semiconductor device and a method of manufacturing the semiconductor device, the source wires 126 of a pixel portion 205 are formed of material having low resistance (representatively, aluminum, silver, copper). The source wires of a driving circu... | 01/09/2007 |
| 7144765 | Semiconductor device with Schottky electrode including lanthanum and boron, and manufacturing method thereof A semiconductor device and its manufacturing method. The semiconductor device has a semi-insulating GaAs substrate 310, a GaAs buffer layer 321 that is formed on the semi-insulating GaAs substrate 310, AlGaAs buffer layer 322, a channel l... | 12/05/2006 |
| 7141465 | Method of manufacturing a semiconductor device having a channel layer, a first semiconductor layer and a second semiconductor layer with a conductive impurity region A semiconductor device which is capable of operating with a single positive power supply and has a low gate resistance, and a process for production thereof. The semiconductor device includes a channel layer (which constitutes a current channel), a first semi... | 11/28/2006 |
| 6703639 | Nanofabrication for InAs/AlSb heterostructures A heterostructure comprising: a buffer layer; a bottom barrier layer formed on the buffer layer; a quantum well layer formed on the bottom barrier layer; a top barrier layer formed on the quantum well layer; and a p-doped cap layer formed on the top barri... | 03/09/2004 |
| 6696306 | Methods of fabricating layered structure and semiconductor device A method of fabricating a layered structure including a substrate, a first semiconductor layer with a first thermal expansion coefficient 댚, and a second semiconductor layer with a second thermal expansion coefficient 댛... | 02/24/2004 |
| 6656802 | Process of manufacturing a semiconductor device including a buried channel field effect transistor A process of manufacturing a semiconductor device including a buried channel field effect transistor comprising, for realizing said field effect transistor, steps of forming a stacked arrangement of semiconductor layers on a substrate including an active ... | 12/02/2003 |
| 6646293 | Structure for fabricating high electron mobility transistors utilizing the formation of complaint substrates High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a la... | 11/11/2003 |
| 6642099 | Method of manufacturing compound semiconductor device There is provided a compound semiconductor device having a capacitor, to prevent a leakage current flowing between an upper electrode and a lower electrode of the capacitor via an insulating protective film. The compound semiconductor device comprises a f... | 11/04/2003 |
| 6635404 | Structure and process method of gamma gate for HEMT A method of fabricating a resist pattern for a gamma gate of high electron mobility transistors of gallium arsenide (GaAs) elements for high-speed data communication with low noise is disclosed. The method of fabricating the gamma gate according to the pr... | 10/21/2003 |
| 6624452 | Gallium nitride-based HFET and a method for fabricating a gallium nitride-based HFET A GaN-based HFET includes a set of layers all having a common face polarity, i.e., all being either Ga-face or N-face. One of the layers is a thin barrier layer having a first face with a positive charge and a second face with a negative charge thereby ca... | 09/23/2003 |
| 6624440 | Field effect transistor An FET (Field Effect Transistor) has an epitaxial wafer including an Al0.2 Ga0.8 As gate contact layer. A GaAs gate buried layer doped with Si, Al0.2 Ga0.8 As wide-recess stopper layer doped with Si, an undoped ... | 09/23/2003 |
| 6620716 | Method for making semiconductor device A method for making a semiconductor device includes forming a resist pattern having a multi-layered structure by performing a plurality of development steps, the resist pattern including a first opening corresponding to a fine gate section of a gate elect... | 09/16/2003 |
| 6620662 | Double recessed transistor A transistor structure is provided. This structure has a source electrode and a drain electrode. A doped cap layer of Gax In1-x As is disposed below the source electrode and the drain electrode and provides a cap layer opening. An un... | 09/16/2003 |
| 6593193 | Semiconductor device and method for fabricating the same An insulating-gate semiconductor device has a first nitride semiconductor layer formed over a substrate and an insulating oxidation layer obtained by oxidizing a second nitride semiconductor layer formed on the first nitride semiconductor layer. A gate el... | 07/15/2003 |
| 6586319 | High-speed compound semiconductor device having a minimized parasitic capacitance and resistance A method of fabricating a semiconductor device includes the steps of forming an insulation film on a compound semiconductor layer, forming an opening in the insulation film so as to expose a part of the compound semiconductor layer, forming a gate electro... | 07/01/2003 |
| 6586781 | Group III nitride based FETs and HEMTs with reduced trapping and method for producing the same New Group III nitride based field effect transistors and high electron mobility transistors are disclosed that provide enhanced high frequency response characteristics. The preferred transistors are made from GaN/AlGaN and have a dielectric layer on the s... | 07/01/2003 |
| 6583468 | Semiconductor element An AlN film as an underlayer is epitaxially grown on a substrate having a dislocation density of 1011 /cm2 or below and a crystallinity of 90 seconds or below in full width at half maximum (FWHM) of an X-ray rocking curve at (002) re... | 06/24/2003 |
| 6569693 | Method for fabricating epitaxial substrate Provided is a method for fabricating a compound semiconductor multilayer epitaxial substrate comprising a plurality of epitaxial layers, comprising the steps of determining at least one of the thickness, impurity concentration, and composition of an epita... | 05/27/2003 |
| 6534790 | Compound semiconductor field effect transistor The present invention provides a field effect transistor (FET) having, on a semi-insulating compound semiconductor substrate, a buffer layer; an active layer that includes a channel layer made of a first conductive-type epitaxial growth layer (e.g. InGaAs... | 03/18/2003 |
| 6528405 | Enhancement mode RF device and fabrication method An enhancement mode RF device and method of fabrication includes a stack of compound semiconductor layers, including a central layer defining a device channel, a doped cap layer, and a buffer epitaxially grown on a substrate. Source and drain implant area... | 03/04/2003 |
| 6524899 | Process for forming a large area, high gate current HEMT diode A method of manufacturing a HEMT IC using a citric acid etchant. In order that gates of different sizes may be formed with a single etching step, a citric acid etchant is used which includes potassium citrate, citric acid and hydrogen peroxide. The wafer ... | 02/25/2003 |
| 6521961 | Semiconductor device using a barrier layer between the gate electrode and substrate and method therefor An enhancement mode semiconductor device has a barrier layer disposed between the gate electrode of the device and the semiconductor substrate underlying the gate electrode. The barrier layer increases the Schottky barrier height of the gate electrode-bar... | 02/18/2003 |
| 6507051 | Semiconductor integrated circuit device A semiconductor device includes a semiconductor layer structure, and gate, drain and source electrodes provided on the semiconductor layer structure, the gate electrode being located between the drain and source electrodes. A depletion modulating part is ... | 01/14/2003 |
| 6492669 | Semiconductor device with schottky electrode having high schottky barrier A carrier travel layer is formed on the substrate of a semiconductor device with a buffer layer interposed, and a spacer layer and carrier supply layer are then formed on this carrier travel layer. On the carrier supply layer are provided a source electro... | 12/10/2002 |
| 6489639 | High electron mobility transistor A semiconductor structure, e.g., a high electron mobility transistor structure, is formed by using metamorphic growth and strain compensation. The structure includes a substrate, a graded layer over the substrate, a first donor/barrier layer over the grad... | 12/03/2002 |
| 6482720 | Method for manufacturing compound semiconductor device In manufacturing compound semiconductor device, a plasma treatment is carried out by exposing surface of compound semiconductor material including AlAs or InAs exposing in atmosphere at manufacturing process in plasma of gas including any of P, N, H, and ... | 11/19/2002 |
| 6465816 | Semiconductor device and manufacturing method of the same A semiconductor device is a hetero-junction bipolar transistor structured by having a gallium arsenide film among laminated films, which has an indium gallium phosphide (InGaP) film which is connected to the gallium arsenide film and functions as an emitt... | 10/15/2002 |
| 6462361 | GaInP epitaxial stacking structure and fabrication method thereof, and a FET transistor using this structure A GaInP epitaxial stacking structure and fabrication method thereof, and a FET transistor using this structure are provided wherein, stacked upon a GaAs single-crystal substrate are at least a buffer layer, a GaZ In1-Z As (0 | 10/08/2002 |
| 6448648 | Metalization of electronic semiconductor devices An electronic semiconductor device comprising a semiconductor base deposited on a semiconductor substrate by means of molecular beam epitaxy and source, drain and gate disposed on the base in a spaced relationghip to each other, the source and the drain c... | 09/10/2002 |
| 6444552 | Method of reducing the conductivity of a semiconductor and devices made thereby Disclosed is a method of reducing the conductivity/charge of a layer of group III-V semiconductor doped with Sn. The method includes the steps of: forming an region of SiO2 on the semiconductor layer; annealing at least the semiconductor layer ... | 09/03/2002 |
| 6426523 | Heterojunction field effect transistor Using a mask opening a gate region, an undoped GaAs layer is selectively etched with respect to an undoped Al0.2 Ga0.8 As layer by dry etching with introducing a mixture gas of a chloride gas containing only chlorine and a fluoride g... | 07/30/2002 |
| 6417519 | Field effect transistor with suppressed threshold change A carrier transit layer made of group III-V compound semiconductor is formed on a semiconductor substrate. A carrier supply layer is formed on the carrier transit layer. The carrier supply layer supplies carriers for generating two-dimensional carrier gas... | 07/09/2002 |
| 6417035 | Method for manufacturing a field effect transistor It is an object of the invention to solve a problem that a gate breakdown voltage and RF characteristics of a field effect transistor, which is provided with a double recess composed of a wide recess and a narrow recess, is not satisfactory. This problem ... | 07/09/2002 |
| 6414340 | Field effect transistor and method for making the same The field effect device consisting of a substrate, a conducting backplane formed in the substrate, a source and a drain disposed above the conductive backplane, a gate insultatively disposed above the substrate between the source and drain, and a backgate... | 07/02/2002 |
