Self Containing Enclosure for Protection from Killer Bees
A self contained protective enclosure with an opening for entry and egress and a screen for ventilation and viewing.
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| Number | Title | Issue Date |
| 7432150 | Method of manufacturing a magnetoelectronic device A method of manufacturing a magnetoelectronic device includes providing an electrically conducting material and an electrically insulating material adjacent to at least a portion of the electrically conducting material, and implanting a magnetic material into the el... | 10/07/2008 |
| 7405464 | Array substrate, method of manufacturing the same and method of crystallizing silicon An array substrate includes a base substrate, a switching element, and a pixel electrode. The switching element is on the base substrate. The switching element includes a poly silicon pattern having at least one block. Grains are formed in each of the at least one b... | 07/29/2008 |
| 7399664 | Formation of spacers for FinFETs (Field Effect Transistors) A structure and a method for forming the same. The structure includes (a) a substrate, (b) a semiconductor fin region on top of the substrate, (c) a gate dielectric region on side walls of the semiconductor fin region, and (d) a gate electrode region on top and on s... | 07/15/2008 |
| 7394116 | Semiconductor device including a multi-channel fin field effect transistor including protruding active portions and method of fabricating the same In a semiconductor device, and a method of fabricating the same, the semiconductor device includes a semiconductor substrate having a cell region and a peripheral circuit region, a portion of the semiconductor substrate in the cell region and in the peripheral circu... | 07/01/2008 |
| 7378744 | Plasma treatment at film layer to reduce sheet resistance and to improve via contact resistance A method of manufacturing a semiconductor device contact including forming an insulating layer over a substrate and forming an agglutinating layer over the insulating layer. The agglutinating layer is then exposed to a plasma treatment. A barrier layer is formed ove... | 05/27/2008 |
| 7374980 | Field effect transistor with thin gate electrode and method of fabricating same A field effect transistor and a method of fabricating the field effect transistor. The field effect transistor includes: a silicon body, a perimeter of the silicon body abutting a dielectric isolation; a source and a drain formed in the body and on opposite sides of... | 05/20/2008 |
| 7368776 | Semiconductor device comprising a highly-reliable, constant capacitance capacitor A semiconductor device, having a memory cell region and a peripheral circuit region, includes an insulating film, having an upper surface, formed on a major surface of a semiconductor substrate to extend from the memory cell region to the peripheral circuit region. ... | 05/06/2008 |
| 7341902 | Finfet/trigate stress-memorization method Disclosed are embodiments a technique for inducing strain into the polysilicon gate of a non-planar FET (e.g., a finFET or trigate FET) in order to impart a similar strain on the FET channel region, while simultaneously protecting the source/drain regions of the sem... | 03/11/2008 |
| 7309634 | Non-volatile semiconductor memory devices using prominences and trenches A semiconductor substrate is patterned to form a depression and prominence. A floating gate is formed so as to cover at least both sidewalls of the prominence of the depression and prominence, and is then etched to form a trench for a device isolation self-aligned w... | 12/18/2007 |
| 7205227 | Methods of forming CMOS constructions The invention includes methods for forming electrical connections associated with semiconductor constructions. A semiconductor substrate is provided which has a conductive line thereover, and which has at least two diffusion regions adjacent the conductive line. A p... | 04/17/2007 |
| 7179701 | Transistor with high dielectric constant gate and method for forming the same A semiconductor device provides a gate structure that includes a conductive portion and a high-k dielectric material formed beneath and along sides of the conductive material. An additional gate dielectric material such as a gate oxide may be used in addition to the... | 02/20/2007 |
| 7164162 | Method for forming potassium/sodium ion sensing device applying extended-gate field effect transistor A potassium/sodium ion sensing device applying an extended-gate field effect transistor, which using an extended-gate ion sensitive field effect transistor (EGFET) as base to fabricate a potassium/sodium ion sensing device, using the extended gate of the extended-ga... | 01/16/2007 |
| 7135401 | Methods of forming electrical connections for semiconductor constructions The invention includes methods for forming electrical connections associated with semiconductor constructions. A semiconductor substrate is provided which has a conductive line thereover, and which has at least two diffusion regions adjacent the conductive line. A p... | 11/14/2006 |
| 7118971 | Method for fabricating trench power device Embodiments of the invention relate to a fabrication method of an electronic device, more particularly to a fabrication method of a power device in which an oxide layer at the bottom of the trench is provided to reduce Miller capacitance and further reduce RC delay.... | 10/10/2006 |
| 7094625 | Field effect transistor and method of producing the same A field effect transistor having a high field effect mobility is provided which can be obtained by a simple method. The field effect transistor includes an organic semiconductor layer composed of a crystallized film of a naphthoporphyrin compound represented by form... | 08/22/2006 |