A forehead support apparatus for resting a standing users forehead against a wall above a bathroom commode or urinal or beneath a showerhead.
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| Number | Title | Issue Date |
| 7388255 | Semiconductor device having separation region A semiconductor device includes: a semiconductor substrate; a separation region in the substrate; an embedded layer; a channel forming region; a source region; a drain region; a first electrode for the source region; a second electrode for the channel forming region... | 06/17/2008 |
| 7385250 | Semiconductor device A semiconductor device comprises a semiconductor portion including first semiconductor layers of a first conduction type and second semiconductor layers of a second conduction type alternately arranged on the surface of a semiconductor substrate to form a striped sh... | 06/10/2008 |
| 7374980 | Field effect transistor with thin gate electrode and method of fabricating same A field effect transistor and a method of fabricating the field effect transistor. The field effect transistor includes: a silicon body, a perimeter of the silicon body abutting a dielectric isolation; a source and a drain formed in the body and on opposite sides of... | 05/20/2008 |
| 7262100 | Semiconductor device and manufacturing method thereof A semiconductor device has a MOS gate side surface structure, including a gate electrode filling a trench formed in a semiconductor substrate with an insulator film between the trench and the gate electrode, a gate insulator film covering the surface of the gate ele... | 08/28/2007 |
| 6703684 | Semiconductor device and method of forming a semiconductor device A power semiconductor device (10) has an active region that includes a drift region (20). At least a portion of the drift region (20) is provided in a membrane (16) which has opposed top and bottom surfaces (15,17). In one embodiment, the top surface (15)... | 03/09/2004 |
| 6677622 | Semiconductor device having insulated gate bipolar transistor with dielectric isolation structure A semiconductor substrate is of first-conductivity-type and has a principal surface. A first semiconductor region and a second semiconductor region are of second-conductivity-type and formed apart from each other in the principal surface of the semiconduc... | 01/13/2004 |
| 6638807 | Technique for gated lateral bipolar transistors An improved structure and method for gated lateral bipolar transistors are provided. Embodiments of the present invention capitalize on opposing sidewalls and adjacent conductive sidewall members to conserve available surface space on the semiconductor ch... | 10/28/2003 |
| 6365448 | Structure and method for gated lateral bipolar transistors An improved structure and method for gated lateral bipolar transistors is provided. The present invention capitalizes on opposing sidewall structures and adjacent conductive sidewall members to conserve available surface space on the semiconductor chips. ... | 04/02/2002 |
| 6339243 | High voltage device and method for fabricating the same The disclosed high voltage device includes a semiconductor substrate, and a first semiconductor layer formed between an underlying first insulating layer and an overlying second insulating layer buried within the semiconductor substrate. The high voltage ... | 01/15/2002 |
| 6307235 | Another technique for gated lateral bipolar transistors An improved structure and method for gated lateral bipolar transistors are provided. Embodiments of the present invention capitalize on opposing sidewalls and adjacent conductive sidewall members to conserve available surface space on the semiconductor ch... | 10/23/2001 |
| 6262451 | Electrode structure for transistors, non-volatile memories and the like An electrode structure for semiconductor devices includes first electrode material positioned in overlying relationship to the surface of a substrate so as to define a first side wall perpendicular thereto. A nonconductive side wall spacer is formed on th... | 07/17/2001 |
| 6246101 | Isolation structure and semiconductor device including the isolation structure An isolation structure capable of preventing deterioration of breakdown voltage of a semiconductor device is obtained. The isolation structure, positioned between first and second conductive regions formed on a major surface of a semiconductor substrate f... | 06/12/2001 |
| 6165828 | Structure and method for gated lateral bipolar transistors An improved structure and method for gated lateral bipolar transistors is provided. The present invention capitalizes on opposing sidewall structures and adjacent conductive sidewall members to conserve available surface space on the semiconductor chips. ... | 12/26/2000 |
| 6163051 | High breakdown voltage semiconductor device A high breakdown voltage semiconductor device comprising a first base region of a first conductivity type, a second base region of a second conductivity type, which is formed in a surface region of the first base region, a first gate insulation film forme... | 12/19/2000 |
| 6118152 | Semiconductor device and method of manufacturing the same A silicon layer provided in a silicon substrate through a buried oxide film includes a silicon island partitioned by a trench. A surface of the silicon island in the trench is covered with a side wall oxide film, and LDMOS transistors are formed in the tr... | 09/12/2000 |
| 6117734 | Method of forming a trench MOS gate on a power semiconductor device A method of fabricating a semiconductor device which includes the steps of forming a trench (4), and repeating the formation and removal of an oxide film (a sacrificial oxide film) twice to provide a rounded configuration (5b) of an opening portion of the... | 09/12/2000 |
| 6075272 | Structure for gated lateral bipolar transistors An improved structure and method for gated lateral bipolar transistors is provided. The present invention capitalizes on opposing sidewall structures and adjacent conductive sidewall members to conserve available surface space on the semiconductor chips. ... | 06/13/2000 |
| 6072215 | Semiconductor device including lateral MOS element Disclosed is a semiconductor device including a lateral MOS element which comprises a p-type silicon substrate; a first semiconductor layer of an n-type constituting a drift region; a second semiconductor layer of the p-type selectively provided in the fi... | 06/06/2000 |
| 6064086 | Semiconductor device having lateral IGBT An n-type buffer layer and a p-type base layer are formed in the surface of the n- -type drift layer. A p+ -type drain layer is formed in the surface of the n-type buffer layer. An n+ -type source layer and a p+... | 05/16/2000 |
| 6037634 | Semiconductor device with first and second elements formed on first and second portions An SOI semiconductor substrate of a semiconductor device includes an SOI layer, an embedded oxide film, a semiconductor substrate, an insulating layer, and a protective coat. The protective coat protects the insulating layer from an oxide film etchant in ... | 03/14/2000 |
| 5920087 | Lateral IGBT A sub-gate electrode is arranged to face, through a gate insulating film, a surface of a first p-type base layer which is interposed between a first n-type source layer and an n-type drift layer, and a surface of a second p-type base layer which is interp... | 07/06/1999 |
| 5891776 | Methods of forming insulated-gate semiconductor devices using self-aligned trench sidewall diffusion techniques A method of forming an insulated gate semiconductor device includes the steps of patterning an insulated gate electrode on a face of a substrate containing a first conductivity type region and forming a trench at the face using the gate electrode as a mas... | 04/06/1999 |
| 5869850 | Lateral insulated gate bipolar transistor A lateral insulated gate bipolar transistor has an emitter region that is displaced from a main path for passing carriers from a collector region to a base region through a first semiconductor layer. This arrangement suppresses the operation of a parasiti... | 02/09/1999 |
| 5783491 | Method of forming a truck MOS gate or a power semiconductor device A method of fabricating a semiconductor device which includes the steps of forming a trench (4), and repeating the formation and removal of an oxide film (a sacrificial oxide film) twice to provide a rounded configuration (5b) of an opening portion of the... | 07/21/1998 |
| 5731603 | Lateral IGBT A sub-gate electrode is arranged to face, through a gate insulating film, a surface of a first p-type base layer which is interposed between a first n-type source layer and an n-type drift layer, and a surface of a second p-type base layer which is interp... | 03/24/1998 |
| 5670396 | Method of forming a DMOS-controlled lateral bipolar transistor DMOS-controlled lateral bipolar transistor comprises a first region of a first conductivity type for providing a collector, a second region of a second conductivity type opposite the first conductivity type for providing a base, a third region of the firs... | 09/23/1997 |
| 5624855 | Process of producing insulated-gate bipolar transistor An insulated-gate bipolar transistor includes a semiconductor region of a first conductive type; a base layer of a second conductive type diffused from a surface of the semiconductor region; a source layer of the first conductive type diffused in a surfac... | 04/29/1997 |
| 5572055 | Insulated-gate bipolar transistor with reduced latch-up An insulated-gate bipolar transistor includes a semiconductor region of a first conductive type; a base layer of a second conductive type diffused from a surface of the semiconductor region; a source layer of the first conductive type diffused in a surfac... | 11/05/1996 |
| 5349224 | Integrable MOS and IGBT devices having trench gate structure A power semiconductor device which is integrable in an integrated circuit includes a semiconductor body having first and second major opposing surfaces with a first doped region of a first conductivity type therebetween, second and third doped regions of ... | 09/20/1994 |
| 4717679 | Minimal mask process for fabricating a lateral insulated gate semiconductor device An eight mask process for forming a lateral insulated gate semiconductor device is disclosed. The gate structure can be used as a mask to align the third and fifth regions of the device and a third protective layer aligns the fourth and sixth regions of t... | 01/05/1988 |