Celebrity Inventors
Glam girl Heddy Lamar may have used her good looks to good effect on the silver screen, but she put her smarts to better use as an inventor. During World War II, she co-patented a frequency-switching system for torpedo guidance that was considered years ahead of its time.
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| Number | Title | Issue Date |
| 7439185 | Method for fabricating semiconductor device and semiconductor device A method of fabricating a semiconductor device having an air-gapped multilayer interconnect wiring structure is disclosed. After having formed a first thin film on or above a substrate, define a first opening in the first thin film. Then, deposit a conductive materi... | 10/21/2008 |
| 7439118 | Method of manufacturing semiconductor integrated circuit A method of manufacturing a semiconductor integrated circuit including a logic part and a memory array part, the logic part having N-type and P-type FETs, and the memory array part having N-type and P-type FETs, includes the steps of forming N-type and P-type FETs c... | 10/21/2008 |
| 7435675 | Method of providing a pre-patterned high-k dielectric film A method of forming a pre-patterned high-k dielectric film onto a support layer. The method includes: providing a support layer; providing a template defining template openings therein exhibiting a pattern that is a mirror image of a pattern of the pre-patterned hig... | 10/14/2008 |
| 7432137 | Method of manufacturing thin film transistor A method of manufacturing a thin film transistor includes forming a gate electrode on a substrate; forming a gate insulating film on the gate electrode; forming a semiconductor layer on the gate insulating film; forming a bank including a first bank portion and a se... | 10/07/2008 |
| 7432200 | Filling narrow and high aspect ratio openings using electroless deposition Methods of fabricating an interconnect utilizing an electroless deposition technique, which fundamentally consists of providing a dielectric material layer having an opening extending into the dielectric material from a first surface thereof, and electrolessly depos... | 10/07/2008 |
| 7432208 | Method of manufacturing suspension structure A method of manufacturing a suspension structure including providing a substrate, forming a first photoresist pattern on the substrate, heating the first photoresist pattern to harden it as a sacrificial layer, forming a second photoresist pattern on the substrate a... | 10/07/2008 |
| 7422969 | Multi-step process for patterning a metal gate electrode The present invention provides a method for patterning a metal gate electrode and a method for manufacturing an integrated circuit including the same. The method for patterning the metal gate electrode, among other steps, includes forming a metal gate electrode laye... | 09/09/2008 |
| 7419906 | Method for manufacturing a through conductor A method of manufacturing a through conductor that penetrates from an upper surface of a silicon substrate to its lower surface. The through conductor is manufactured in steps which provide a first conductor which extends in the direction of thickness of the silicon... | 09/02/2008 |
| 7416987 | Semiconductor device and method of fabricating the same According to the present invention, there is a provided a semiconductor device fabrication method having, forming a mask material in a surface portion of a semiconductor substrate, and forming a step having a projection by using the mask material; forming a dielectr... | 08/26/2008 |
| 7397074 | RF field heated diodes for providing thermally assisted switching to magnetic memory elements An exemplary array of thermally-assisted magnetic memory structures includes a plurality of magnetic memory elements, each magnetic memory element being near a diode. A diode near a selected magnetic memory element can be heated by absorbing energy from a radio freq... | 07/08/2008 |
| 7384833 | Stress liner for integrated circuits In one embodiment, a self-aligned contact (SAC) trench structure is formed through a dielectric layer to expose an active region of a MOS transistor. The SAC trench structure not only exposes the active region for electrical connection but also removes portions of a... | 06/10/2008 |
| 7384869 | Protection of silicon from phosphoric acid using thick chemical oxide A method for protecting exposed silicon from attack by phosphoric acid during wet etching and stripping processes is provided. According to various embodiments of the method, a thick chemical oxide layer can be formed on the exposed silicon to protect the exposed po... | 06/10/2008 |
| 7378692 | Integrated electronic circuit comprising superposed components An integrated electronic circuit with at least at least one passive electronic component and at least one active electronic component. The passive electronic component is formed within an insulating material disposed on a substrate. The active component is formed wi... | 05/27/2008 |
| 7365009 | Structure of metal interconnect and fabrication method thereof A process and structure for a metal interconnect includes providing a substrate with a first electric conductor, forming a first dielectric layer and a first patterned hard mask, using the first patterned hard mask to form a first opening and a second electric condu... | 04/29/2008 |
| 7361539 | Dual stress liner A semiconductor device structure is provided which includes a first field effect transistor (“FET”) having a first channel region, a first source region, a first drain region and a first gate conductor overlying the first channel region. A second FET is included... | 04/22/2008 |
| 7348231 | Methods of fabricating semiconductor devices having insulating layers with differing compressive stresses Methods of fabricating semiconductor devices are provided. An NMOS transistor and a PMOS transistor are provided on a substrate. The NMOS transistor is positioned on an NMOS region of the substrate and the PMOS transistor is positioned on a PMOS region of the substr... | 03/25/2008 |
| 7344954 | Method of manufacturing a capacitor deep trench and of etching a deep trench opening A substrate is provided having an oxide layer, a first nitride-silicon, a STI, and a second nitride-silicon. A pattern poly-silicon layer on the second nitride-silicon layer is etched to form a deep trench opening. Etching the pattern poly-silicon layer also deepens... | 03/18/2008 |
| 7323403 | Multi-step process for patterning a metal gate electrode The present invention provides a method for patterning a metal gate electrode and a method for manufacturing an integrated circuit including the same. The method for patterning the metal gate electrode, among other steps, includes forming a metal gate electrode laye... | 01/29/2008 |
| 7314813 | Methods of forming planarized multilevel metallization in an integrated circuit A method is provided for forming a semiconductor device that reduces metal-stress-induced photo misalignment by incorporating a multi-layered anti-reflective coating over a metal layer. The method includes providing a substrate with a conductive layer formed over th... | 01/01/2008 |
| 7306955 | Method of performing a double-sided process A method of performing a double-sided process is provided. First, a wafer having a structural pattern disposed on the front surface is provided. Following that, a plurality of front scribe lines are defined on the structural pattern, and a filling layer is filled in... | 12/11/2007 |
| 7300827 | Method of manufacturing a thin film transistor substrate and stripping composition A method of manufacturing a thin film transistor substrate includes forming a transistor thin layer pattern, forming a protecting layer, forming a photoresist film, forming a pixel electrode and a conductive layer that are separated from each other, stripping a phot... | 11/27/2007 |
| 7294577 | Method of manufacturing a silicide layer There is provided a method of manufacturing semiconductor device comprising removing an organic substance from a semiconductor surface having an oxide film thereon, the semiconductor surface being formed to have a line width of 50 nm or less; removing the oxide film... | 11/13/2007 |
| 7294552 | Electrical contact for a MEMS device and method of making A method for making a subsurface electrical contact on a micro-electrical-mechanical-systems (MEMS) device. The contact is formed by depositing a layer of polycrystalline silicon onto a surface within a cavity buried under a device silicon layer. The polycrystalline... | 11/13/2007 |
| 7285494 | Multiple stage electroless deposition of a metal layer A multiple stage method of electrolessly depositing a metal layer is presented. This method may have the two main stages of first forming a thin metal layer on a metal surface using an electroless plating solution containing activating agents that are highly reactiv... | 10/23/2007 |
| 7256107 | Damascene process for use in fabricating semiconductor structures having micro/nano gaps In fabricating a microelectromechanical structure (MEMS), a method of forming a narrow gap in the MEMS includes a) depositing a layer of sacrificial material on the surface of a supporting substrate, b) photoresist masking and at least partially etching the sacrific... | 08/14/2007 |
| 7256111 | Pretreatment for electroless deposition Embodiments of the present invention relate to an apparatus and method of annealing substrates in a thermal anneal chamber and/or a plasma anneal chamber before electroless deposition thereover. In one embodiment, annealing in a thermal anneal chamber includes heati... | 08/14/2007 |
| 7232740 | Method for bumping a thin wafer Method of making a bumped thinned circuit wafer includes providing a silicon circuit wafer, and providing a conductive layer on it. Then, a first temporary support, such as a handle wafer, may be attached by an acrylic bond. The circuit wafer may then be thinned to ... | 06/19/2007 |
| 7192878 | Method for removing post-etch residue from wafer surface A low-k dielectric film is deposited on the wafer. A metal layer is then deposited over the low-k dielectric film. A resist pattern is formed over the metal layer. The resist pattern is then transferred to the underlying metal layer to form a metal pattern. The resi... | 03/20/2007 |
| 7183226 | Method of forming a trench for use in manufacturing a semiconductor device A method for use in manufacturing a semiconductor device includes forming a photoresist pattern on a substrate, performing first etching process in which an initial trench is formed using the photoresist pattern as a mask, and performing second distinct etching proc... | 02/27/2007 |
| 7132372 | Method for preparing a semiconductor substrate surface for semiconductor device fabrication A method for preparing a semiconductor substrate surface (28) for semiconductor device fabrication, includes providing a semiconductor substrate (20) having a pure Ge surface layer (28) or a Ge-containing surface layer (12), such as SiGe.... | 11/07/2006 |
| 6601594 | Apparatus and method for delivering a treatment liquid and ozone to treat the surface of a workpiece An apparatus for supplying a mixture of a treatment liquid and ozone for treatment of a surface of a workpiece, and a corresponding method are set forth. The preferred embodiment of the apparatus comprises a liquid supply line that is used to provide flui... | 08/05/2003 |
| 6591845 | Apparatus and method for processing the surface of a workpiece with ozone An apparatus for supplying a mixture of a treatment liquid and ozone for treatment of a surface of a workpiece, and a corresponding method are set forth. The preferred embodiment of the apparatus comprises a liquid supply line that is used to provide flui... | 07/15/2003 |
| 6582525 | Methods for processing a workpiece using steam and ozone In a method for processing a workpiece to remove material from a first surface of the workpiece, steam is introduced onto the first surface under conditions so that at least some of the steam condenses and forms a liquid boundary layer on the first surfac... | 06/24/2003 |
| 6575178 | Cleaning and drying method and apparatus An enclosure 23A that defines a drying chamber 23 is configured of a pair of enclosing elements 23c and 23d and a base element 23b. When wafers enter or leave the drying chamber 23, the enclosing elements 23c and 23d are lifted upward by vertical air cyli... | 06/10/2003 |
| 6513538 | Method of removing contaminants from integrated circuit substrates using cleaning solutions A method for removing contaminants from an integrated circuit substrate include treating the substrate with a hydrogen peroxide cleaning solution containing a chelating agent, and treating the substrate with hydrogen gas and fluorine-containing gas, and a... | 02/04/2003 |
| 6497768 | Process for treating a workpiece with hydrofluoric acid and ozone A workpiece or substrate is placed in a support in a reaction chamber. A heated process liquid is sprayed onto the substrate. The thickness of the layer of process liquid formed on the substrate is controlled, e.g., by spinning the substrate. Ozone is int... | 12/24/2002 |
| 6498132 | Method for treating surface of substrate and surface treatment composition used for the same A method for treating the surface of a substrate with a surface treatment composition, wherein the surface treatment composition comprises a liquid medium containing a complexing agent as a metal deposition preventive, the complexing agent comprising at l... | 12/24/2002 |
| 6475893 | Method for improved fabrication of salicide structures A method for preparing a semiconductor material for formation of a silicide layer on selected areas thereupon is disclosed. In an exemplary embodiment of the invention, the method includes removing at least one of a nitride and an oxynitride film from the... | 11/05/2002 |
| 6398875 | Process of drying semiconductor wafers using liquid or supercritical carbon dioxide A process of drying a semiconductor wafer which includes at least one microelectric structure disposed thereon which includes contacting a water-containing thin film-covered semiconductor wafer with a composition which includes liquid or supercritical car... | 06/04/2002 |
| 6365516 | Advanced cobalt silicidation with in-situ hydrogen plasma clean Various methods of fabricating a silicide structure are provided. In one aspect, a method of fabricating a circuit structure on a silicon surface is provided that includes exposing the silicon surface to a plasma ambient containing hydrogen and an inert g... | 04/02/2002 |
