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| Number | Title | Issue Date |
| 7443032 | Memory device with chemical vapor deposition of titanium for titanium silicide contacts A titanium layer is formed on a substrate with chemical vapor deposition (CVD). First, a seed layer is formed on the substrate by combining a first precursor with a reducing agent by CVD. Then, the titanium layer is formed on the substrate by combining a second prec... | 10/28/2008 |
| 7435678 | Method of depositing noble metal electrode using oxidation-reduction reaction Provided is a method of depositing a noble metal layer using an oxidation-reduction reaction. The method includes flowing a noble metal source gas, an oxidizing gas, and a reducing gas into a reaction chamber; and generating plasma in the reaction chamber to form a ... | 10/14/2008 |
| 7419898 | Method for metal gate structure for MOS devices A method for forming a gate structure includes forming a gate dielectric layer on a semiconductor substrate and a metal gate conductor on the gate dielectric layer. A cap layer is formed on the metal gate conductor. The method provides for patterning the cap layer, ... | 09/02/2008 |
| 7407876 | Method of plasma enhanced atomic layer deposition of TaC and TaCN films having good adhesion to copper A method for processing a substrate for forming TaC and TaCN films having good adhesion to Cu. The method includes disposing the substrate in a process chamber of a plasma enhanced atomic layer deposition (PEALD) system configured to perform a PEALD process, and dep... | 08/05/2008 |
| 7358174 | Methods of forming solder bumps on exposed metal pads A method of forming an electronic structure may include providing a substrate having a metal pad thereon. A conductive barrier layer may be formed on a first portion of the metal pad, and a second exposed portion of the metal pad may be free of the conductive barrie... | 04/15/2008 |
| 7338900 | Method for forming tungsten nitride film A method for forming a tungsten nitride film including a first material gas supply step of supplying a first material gas composed of a tungsten compound gas, a reduction step of supplying a reducing gas, a second material gas supply step of supplying a second mater... | 03/04/2008 |
| 7268078 | Chemical vapor deposition of titanium from titanium tetrachloride and hydrocarbon reactants A process for depositing titanium metal layers via chemical vapor deposition is disclosed. The process provides deposited titanium layers having a high degree of conformality, even in trenches and contact openings having aspect ratios greater than 1:5. ... | 09/11/2007 |
| 7253109 | Method of depositing a tantalum nitride/tantalum diffusion barrier layer system We have discovered a method of providing a thin, approximately from about 2 Å to about 100 Å thick TaN seed layer, which can be used to induce the formation of alpha tantalum when tantalum is deposited over the TaN seed layer. Further, the ... | 08/07/2007 |
| 7253092 | Tungsten plug corrosion prevention method using water Disclosed herein is a method of making integrated circuits. In one embodiment the method includes forming tungsten plugs in the integrated circuit and forming electrically conductive interconnect lines in the integrated circuit after formation of the tungsten plugs.... | 08/07/2007 |
| 7235482 | Method of manufacturing a contact interconnection layer containing a metal and nitrogen by atomic layer deposition for deep sub-micron semiconductor technology An atomic layer deposition method is used to deposit a TiN or TiSiN film having a thickness of about 50 nm or less on a substrat. A titanium precursor which is tetrakis(dimethylamido)titanium (TDMAT), tetrakis(diethylamido)titanium (TDEAT), or Ti{OCH(CH3)... | 06/26/2007 |
| 7235485 | Method of manufacturing semiconductor device Provided is a method of manufacturing a semiconductor device with enhanced electrical characteristics. The method includes disposing a substrate on a substrate support in a process chamber, pre-heating the substrate on the substrate support adjusted to a temperature... | 06/26/2007 |
| 7229924 | Surface barriers for copper and silver interconnects produced by a damascene process A semiconductor device structure having a barrier layer comprising a conductive portion and a nonconductive portion is disclosed. The conductive portion includes a metal nitride compound and the nonconductive portion includes a metal oxide, metal oxynitride, metal c... | 06/12/2007 |
| 7226854 | Methods of forming metal lines in semiconductor devices Methods of forming metal lines in semiconductor devices are disclosed. One example method may include forming lower metal lines and forming an insulation layer on the lower metal lines; etching said insulation layer to a depth; and depositing a material for upper me... | 06/05/2007 |
| 7220673 | Method for depositing tungsten-containing layers by vapor deposition techniques In one embodiment, a method for forming a tungsten-containing material on a substrate is provided which includes forming a tungsten nucleation layer by sequentially exposing a substrate to a boron-containing gas and a tungsten-containing gas within a processing cham... | 05/22/2007 |
| 6723640 | Method for forming contact plug of semiconductor device The present invention provides a method for forming a contact plug of a semiconductor device capable of preventing an attack to conductive patterns. The method includes the steps of: forming a plurality of conductive patterns on a substrate; forming an insulating la... | 04/20/2004 |
| 6699751 | Method of fabricating a capacitor for semiconductor devices A method of fabricating a capacitor in semiconductor devices includes forming an insulating interlayer on a semiconductor substrate; forming a contact hole in the insulating interlayer to expose a portion of the semiconductor substrate; forming a plug in ... | 03/02/2004 |
| 6699744 | Method of forming a MOS transistor of a semiconductor device The disclosure relates to a method of forming a MOS transistor of a semiconductor device and, more particularly, to a method of forming a PMOS transistor of a semiconductor device that minimizes temporary reinforcement and diffusion of dopants for control... | 03/02/2004 |
| 6690055 | Devices containing platinum-rhodium layers and methods A method of forming a rhodium-containing layer on a substrate, such as a semiconductor wafer, using complexes of the formula Ly RhYz is provided. Also provided is a chemical vapor co-deposited platinum-rhodium alloy barriers and elec... | 02/10/2004 |
| 6682971 | Method of manufacturing a semiconductor A semiconductor manufacturing method and a semiconductor manufacturing apparatus capable of manufacturing semiconductor devices without the need of specifically determining an optimal configuration of a gas mixing chamber (6) with care or elaboration. A r... | 01/27/2004 |
| 6682972 | Methods of forming materials comprising tungsten and nitrogen In one aspect, the invention includes a method of forming a material comprising tungsten and nitrogen, comprising: a) providing a substrate; b) depositing a layer comprising tungsten and nitrogen over the substrate; and c) in a separate step from the depo... | 01/27/2004 |
| 6682970 | Capacitor/antifuse structure having a barrier-layer electrode and improved barrier layer A semiconductor structure includes a dielectric layer having first and second opposing sides. A conductive layer is adjacent to the first side of the dielectric layer and is coupled to a first terminal, and a conductive barrier layer is adjacent to the se... | 01/27/2004 |
| 6680251 | Methods of chemical vapor depositing ruthenium by varying chemical vapor deposition parameters A layer is formed by chemical vapor depositing a seeding layer of ruthenium oxide on a substrate at a chemical vapor deposition flow rate ratio of a ruthenium source to oxygen gas. A main layer of ruthenium is chemical vapor deposited on the seeding layer... | 01/20/2004 |
| 6673716 | Control of the deposition temperature to reduce the via and contact resistance of Ti and TiN deposited using ionized PVD techniques A method of depositing thin films comprising Ti and TiN within vias and trenches having high aspect ratio openings. The Ti and TiN layers are formed on an integrated circuit substrate using a Ti target in a non-nitrided mode in a hollow cathode magnetron ... | 01/06/2004 |
| 6660580 | Capacitor of an integrated circuit device and method of manufacturing the same The present invention relates to a capacitor of a semiconductor memory cell and a method of manufacturing the same wherein a capacitor includes a first insulation layer having a buried contact hole, formed on a semiconductor substrate, and a buried contac... | 12/09/2003 |
| 6653198 | Method for fabricating capacitor in semiconductor device and capacitor fabricated thereby A capacitor in a semiconductor device and fabricating method therefor are disclosed, in which the capacitor in a semiconductor device comprises: a semiconductor substrate, a first Ru film formed on the semiconductor substrate, a Y2 O3 | 11/25/2003 |
| 6653234 | Chemical vapor deposition of titanium from titanium tetrachloride and hydrocarbon reactants A new process for depositing titanium metal layers via chemical vapor deposition is disclosed. The process provides deposited titanium layers having a high degree of conformality, even in trenches and contact openings having aspect ratios greater than 1:5... | 11/25/2003 |
| 6652718 | Use of RF biased ESC to influence the film properties of Ti and TiN A method of depositing thin films comprising Ti and TiN within vias and trenches having high aspect ratio openings of 6:1 is disclosed. The Ti and TiN layers are formed on an integrated circuit substrate using a Ti target in a non-nitrided mode in a hollo... | 11/25/2003 |
| 6649466 | Method of forming DRAM circuitry In part, disclosed are semiconductor processing methods, methods of depositing a tungsten comprising layer over a substrate, methods of depositing a tungsten nitride comprising layer over a substrate, methods of depositing a tungsten silicide comprising l... | 11/18/2003 |
| 6642539 | Epitaxial template and barrier for the integration of functional thin film metal oxide heterostructures on silicon A ferroelectric memory cell formed on a monocrystalline silicon underlayer, either an epitaxial silicon contact plug to a transistor source or drain or silicon gate region for which the memory cell forms a non-volatile gate. A conductive barrier layer of ... | 11/04/2003 |
| 6635523 | Semiconductor device and method of manufacturing the same The method of forming a capacitor of a semiconductor device comprises the steps of forming a semiconductor film connected to a semiconductor substrate, forming a capacitor lower electrode made of a tungsten film selectively on a surface of the semiconduct... | 10/21/2003 |
| 6632737 | Method for enhancing the adhesion of a barrier layer to a dielectric A method for chemical vapor deposition comprises providing a thin layer of silicon on the surface of a dielectric-covered substrate prior to depositing a tantalum-based barrier layer from a mixture of a vapor-phase reactant comprising a tantalum halide an... | 10/14/2003 |
| 6632736 | Method of forming low-resistance contact to silicon having a titanium silicide interface and an amorphous titanium carbonitride barrier layer A contact structure incorporating an amorphous titanium nitride barrier layer formed via low-pressure chemical vapor deposition (LPCVD) utilizing tetrakis-dialkylamido-titanium, Ti(NMe2)4, as the precursor. The contact structure is f... | 10/14/2003 |
| 6627508 | Method of forming capacitors containing tantalum The invention pertains to semiconductor circuit components and capacitors, and to methods of forming capacitors and semiconductor circuit components. In one aspect, the invention includes a method of forming a dielectric layer comprising: a) forming a fir... | 09/30/2003 |
| 6627538 | Focused ion beam deposition Introducing at least one metal such as cobalt, molybdenum, metal carbonyl, tungsten, platinum, or other suitable metal to a focused ion beam. Introducing the focused ion beam to a substrate within a processing chamber. Forming at least one layer over a su... | 09/30/2003 |
| 6624517 | Low-resistance contact to silicon having a titanium silicide interface and an amorphous titanium carbonitride barrier layer This invention constitutes a contact structure incorporating an amorphous titanium nitride barrier layer formed via low-pressure chemical vapor deposition (LPCVD) utilizing tetrakis-dialkylamido-titanium, Ti(NMe2)4, as the precursor.... | 09/23/2003 |
| 6617250 | Methods of depositing a layer comprising tungsten and methods of forming a transistor gate line In part, disclosed are semiconductor processing methods, methods of depositing a tungsten comprising layer over a substrate, methods of depositing a tungsten nitride comprising layer over a substrate, methods of depositing a tungsten silicide comprising l... | 09/09/2003 |
| 6613640 | Method for fabricating an integrated ferroelectric semiconductor memory and integrated ferroelectric semiconductor memory The integrated ferroelectric semiconductor memory is fabricated according to the stack cell principle. A ferroelectric capacitor module is formed on an intermediate oxide above a selection transistor located in or on a semiconductor wafer. The capacitor m... | 09/02/2003 |
| 6614065 | Use of membrane properties to reduce residual stress in an interlayer region A method and apparatus comprising thinning a substrate sufficiently to allow it to be mechanically compliant with a material deposited on its surface is disclosed. The mechanical compliance allows a reduction in the interlayer stress generated by dissimil... | 09/02/2003 |
| 6614642 | Capacitor over plug structure A capacitor over plug (COP) structure is disclosed. The COP avoids the step which is created in conventional COP structures, which adversely impacts the properties of the capacitor. In one embodiment, the step is avoided by providing a plug having upper a... | 09/02/2003 |
| 6600183 | Integrated circuit capacitor and memory An electrode structure for a capacitor. The electrode structure includes a contact plug comprising an oxidation barrier 208 and a bottom electrode comprising a conductive adhesion-promoting portion 210 and an oxidation-resistant portion 204, the adhesion-... | 07/29/2003 |
