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| Number | Title | Issue Date |
| 7422968 | Method for manufacturing a semiconductor device having silicided regions The present invention provides a method for manufacturing a semiconductor device, and a method for manufacturing an integrated circuit including the semiconductor devices. The method for manufacturing a semiconductor device (100) , among other steps, includes... | 09/09/2008 |
| 7422967 | Method for manufacturing a semiconductor device containing metal silicide regions The present invention provides a method for manufacturing a semiconductor device. In one embodiment of the present invention, without limitation, the method for manufacturing the semiconductor device includes forming a gate structure (120) over a substrate ( | 09/09/2008 |
| 7417290 | Air break for improved silicide formation with composite caps Disclosed is a structure and method for tuning silicide stress and, particularly, for developing a tensile silicide region on a gate conductor of an n-FET in order to optimize n-FET performance. More particularly, a first metal layer-protective cap layer-second meta... | 08/26/2008 |
| 7402512 | High aspect ratio contact structure with reduced silicon consumption A high aspect ratio contact structure formed over a junction region in a silicon substrate comprises a titanium interspersed with titanium silicide layer that is deposited in the contact opening and directly contacts an upper surface of the substrate. Silicon-doping... | 07/22/2008 |
| 7399702 | Methods of forming silicide Methods of fully siliciding semiconductive materials of semiconductor devices are disclosed. A preferred embodiment comprises depositing an alloy comprised of a first metal and a second metal over a semiconductive material. The device is heated, causing atoms of the... | 07/15/2008 |
| 7399669 | Semiconductor devices and methods for fabricating the same including forming an amorphous region in an interface between a device isolation layer and a source/drain diffusion layer Semiconductor devices and methods for fabricating the same are disclosed in which an amorphous layer is formed in an interface between a device isolation layer and a source or drain region to stably thin a silicide layer formed in the interface. A leakage current of... | 07/15/2008 |
| 7399701 | Semiconductor device manufacturing method including forming a metal silicide layer on an indium-containing layer The present invention provides a semiconductor device manufacturing method of a semiconductor device having a contact plug, in which a contact hole formed by a surface portion of a high-concentration N-type diffusion layer formed on a semiconductor silicon substrate... | 07/15/2008 |
| 7396764 | Manufacturing method for forming all regions of the gate electrode silicided The technology which can improve the performance of a MOS transistor in which all the regions of the gate electrode were silicided is offered. A gate insulating film and a gate electrode of an nMOS transistor are laminated and formed in this order on a semico... | 07/08/2008 |
| 7387926 | Method for manufacturing CMOS image sensor A method for manufacturing a CMOS image sensor is provided. The method includes forming a gate electrode on a semiconductor layer having defined regions of a photodiode region and a logic region, such that a gate oxide film is interposed between the semiconductor la... | 06/17/2008 |
| 7385294 | Semiconductor device having nickel silicide and method of fabricating nickel silicide A semiconductor device having nickel silicide and a method for fabricating nickel silicide. A semiconductor substrate having a plurality of doped regions is provided. Subsequently, a nickel layer is formed on the semiconductor substrate, and a first rapid thermal pr... | 06/10/2008 |
| 7361539 | Dual stress liner A semiconductor device structure is provided which includes a first field effect transistor (“FET”) having a first channel region, a first source region, a first drain region and a first gate conductor overlying the first channel region. A second FET is included... | 04/22/2008 |
| 7361597 | Semiconductor device and method of fabricating the same A semiconductor device incorporating an alloy layer formed on a substrate; a gate electrode, a source electrode, and a drain electrode formed on the alloy layer at predetermined intervals therebetween; a gate insulating layer formed on the gate electrode in a gate e... | 04/22/2008 |
| 7344983 | Clustered surface preparation for silicide and metal contacts A cluster tool is provided for the implementing of a clustered and integrated surface pre-cleaning of the surface of semiconductor devices. More particularly, there is provided a cluster tool and a method of utilization thereof in an integrated semiconductor device ... | 03/18/2008 |
| 7335595 | Silicide formation using a low temperature anneal process A silicide 160 is formed in exposed silicon on a semiconductor wafer 10 by a method that includes forming a thin interface layer 140 over the semiconductor wafer 10 and performing a first low temperature anneal to create the silicide 1... | 02/26/2008 |
| 7332435 | Silicide structure for ultra-shallow junction for MOS devices A method of forming a semiconductor device comprising: forming a gate dielectric layer over a channel region; forming a gate electrode on the gate dielectric layer; forming source/drain regions substantially aligned with respective edges of the gate electrode with t... | 02/19/2008 |
| 7312150 | Method of forming cobalt disilicide layer and method of manufacturing semiconductor device using the same A method of forming a cobalt disilicide layer and a method of manufacturing a semiconductor device using the same are provided. The method of forming a cobalt disilicide layer includes forming a cobalt layer on at least a silicon surface of a semiconductor device us... | 12/25/2007 |
| 7274055 | Method for improving transistor performance through reducing the salicide interface resistance An embodiment of the invention reduces the external resistance of a transistor by utilizing a silicon germanium alloy for the source and drain regions and a nickel silicon germanium self-aligned silicide (i.e., salicide) layer to form the contact surface of the sour... | 09/25/2007 |
| 7238601 | Semiconductor device having conductive spacers in sidewall regions and method for forming A conductive spacer (36, 122) in a sidewall region (30, 16) of a device (10, 100) is formed. The conductive spacer is formed adjacent sidewalls of the current electrode regions (18, 12). In one embodiment, a thin silicide layer (34... | 07/03/2007 |
| 7238612 | Methods of forming a double metal salicide layer and methods of fabricating semiconductor devices incorporating the same A metal salicide layer is formed by sequentially depositing a physical vapor deposition (PVD) metal layer and a chemical vapor deposition (CVD) metal layer on a semiconductor device having an exposed silicon surface so as to form a double metal layer. The semiconduc... | 07/03/2007 |
| 7223662 | Method of forming an epitaxial layer for raised drain and source regions by removing surface defects of the initial crystal surface By substantially amorphizing a selectively epitaxially grown silicon layer used for forming a raised drain and source region and a portion of the underlying substrate, or just the surface region of the substrate (prior to growing the silicon overlayer), the number o... | 05/29/2007 |
| 7220623 | Method for manufacturing silicide and semiconductor with the silicide The present invention is directed to a method of manufacturing silicide used to reduce a contact resistance at a contact of a semiconductor device and a semiconductor device with the silicide manufactured by the same method. The method comprises the steps of: (a) cl... | 05/22/2007 |
| 7151299 | Semiconductor device and its manufacturing method The present invention provides a semiconductor device structure and an easy-to-use method for manufacturing thereof enabling to suppress wafer contamination and to form the semiconductor device superior in control and uniformity of the film thickness in the semicond... | 12/19/2006 |
| 7141514 | Selective plasma re-oxidation process using pulsed RF source power A transistor gate selective re-oxidation process includes the steps of introducing into the vacuum chamber containing the semiconductor substrate a process gas that includes oxygen while maintaining a vacuum pressure in the chamber. An oxide insulating layer on the ... | 11/28/2006 |
| 7109115 | Methods of providing ohmic contact Various embodiments of the invention described herein reduce contact resistance to a silicon-containing material using a first refractory metal material overlying the silicon-containing material and a second refractory metal material overlying the first refractory m... | 09/19/2006 |
| 7081676 | Structure for controlling the interface roughness of cobalt disilicide A method of producing electrical contacts having reduced interface roughness as well as the electrical contacts themselves are disclosed herein. The method of the present invention comprises (a) forming an alloy layer having the formula MX, wherein M is a metal sele... | 07/25/2006 |
| 7042033 | ULSI MOS with high dielectric constant gate insulator MOS transistor formed on a semiconductor substrate of a first conductivity type and method of fabrication are provided. The device includes (a) an interfacial layer formed on the substrate; (b) a high dielectric constant layer covering the interfacial layer that com... | 05/09/2006 |
| 6909154 | Sacrificial annealing layer for a semiconductor device and a method of fabrication Numerous embodiments of a method and apparatus for a sacrificial annealing layer are disclosed. In one embodiment, a method of forming a sacrificial annealing layer for a semiconductor device comprises forming one or more sacrificial layers on at least a portion of ... | 06/21/2005 |
| 6703281 | Differential laser thermal process with disposable spacers MOSFETs are fabricated with accurately defined, high and uniformly concentrated source/drain regions and extensions employing plural, sequential pre-amorphizing, implanting and laser thermal annealing steps with intervening spacer removal. Embodiments inc... | 03/09/2004 |
| 6703296 | Method for forming metal salicide A method for forming a metal salicide layer on a shallow junction is described. A substrate having a gate structure thereon and a shallow junction therein is provided. An atomic layer deposition (ALD) process is then performed to deposit a tungsten salici... | 03/09/2004 |
| 6700211 | Method for forming conductors in semiconductor devices A memory device wherein a diode is serially connected to a programmable resistor and is in electrical communication with a buried digit line. An electrically conductive plug is electrically interposed between the digit line and a strapping layer, thereby ... | 03/02/2004 |
| 6696351 | Semiconductor device having a selectively deposited conductive layer A process of production of a semiconductor memory device having a memory array including memory cells and a peripheral circuit on one substrate comprising the process of forming an interlayer insulating layer covering the memory array and peripheral circu... | 02/24/2004 |
| 6693003 | Semiconductor device and manufacturing method of the same In a semiconductor device, formed are a lower capacitor electrode on an element isolation film on a silicon substrate, a capacitor insulating film and an upper capacitor electrode. A silicon oxide film is formed on the entire surface of the silicon substr... | 02/17/2004 |
| 6690072 | Method and structure for ultra-low contact resistance CMOS formed by vertically self-aligned CoSi2 on raised source drain Si/SiGe device A method (and structure) of forming a vertically-self-aligned silicide contact to an underlying SiGe layer, includes forming a layer of silicon of a first predetermined thickness on the SiGe layer and forming a layer of metal on the silicon layer, where t... | 02/10/2004 |
| 6689688 | Method and device using silicide contacts for semiconductor processing A method for forming silicide contacts includes forming a layer on silicon-containing active device regions such as source, drain, and gate regions. The layer contains a metal that is capable of forming one or more metal silicides and a material that is s... | 02/10/2004 |
| 6690094 | High aspect ratio metallization structures A contact interface having a substantially continuous profile along a bottom and lower sides of the active surface of the semiconductor substrate formed within a contact opening is provided. The contact interface is formed by depositing a layer of conduct... | 02/10/2004 |
| 6686619 | Dynamic random access memory with improved contact arrangements A semiconductor integrated circuit device and a manufacturing method therefor provide advantages that undulations are prevented from being produced in polycrystal silicon plugs in bit line contact holes and that the undesired phenomenon of transversally e... | 02/03/2004 |
| 6686274 | Semiconductor device having cobalt silicide film in which diffusion of cobalt atoms is inhibited and its production process In a semiconductor device having a cobalt silicide film, at least nickel or iron is contained in the cobalt silicide film for preventing the rise of resistance incidental to thinning of the film.... | 02/03/2004 |
| 6682602 | Chemical vapor deposition systems including metal complexes with chelating O- and/or N-donor ligands A method of forming a film on a substrate using one or more complexes containing one or more chelating O- and/or N-donor ligands. The complexes and methods are particularly suitable for the preparation of semiconductor structures using chemical vapor depo... | 01/27/2004 |
| 6683357 | Semiconductor constructions The invention includes a method of forming a semiconductor construction. A metal-rich metal suicide layer is formed on a silicon-comprising substrate, and a metal nitride layer is formed on the metal-rich metal silicide layer. The metal-rich metal silicid... | 01/27/2004 |
| 6677234 | Method of selectively forming silicide In a crystalline silicon body a shallow trench insulation is made by etching a groove and filling it with silicon oxide. Ridges of polysilicon are made on the surface of the silicon body by applying a layer of polysilicon and patterning it with a known te... | 01/13/2004 |
