Class 257/E21.16 - From a gas or vapor, e.g., condensation (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E21.159. This subclass
No. of patents: 24
Last issue date: 09/23/2008

Number	Title	Issue Date
7427516	Method for patching up thin-film transistor circuits on a display panel by local thin-film deposition A method for patching up thin-film transistor (TFT) circuit patterns on a display panel comprises the following steps. Firstly, a mask having an opening is placed above the display panel and the opening corresponds to the location of the cracks of the circuits on th...	09/23/2008
7407892	Deposition methods The invention includes deposition methods and apparatuses which can be utilized during atomic layer deposition or chemical vapor deposition. A heated surface is provided between a stack of semiconductor substrates and a precursor inlet, and configured so that proble...	08/05/2008
7262142	Semiconductor device fabrication method The semiconductor device fabrication method comprises the step of forming a first porous insulation film 38 over a semiconductor substrate 10; the step of forming a second insulation film 40 whose density is higher than that of the first porous ...	08/28/2007
7256499	Ultra low dielectric constant integrated circuit system An integrated circuit is provided including forming a porous ultra-low dielectric constant dielectric layer over a semiconductor substrate and forming an opening in the ultra-low dielectric constant dielectric layer. A dielectric liner is formed to line the opening ...	08/14/2007
7214618	Technique for high efficiency metalorganic chemical vapor deposition A technique for more efficiently forming conductive elements, such as conductive layers and electrodes, using chemical vapor deposition. A conductive precursor gas, such as a platinum precursor gas, having organic compounds to improve step coverage is introduced int...	05/08/2007
7214631	Method of forming gate dielectric layer A method for forming a gate dielectric layer is described. A silicon oxide layer is formed on a semiconductor substrate. Then, a first and a second nitrogen doping processes are performed in sequence to the silicon oxide layer using plasma comprising inert gas and g...	05/08/2007
7163899	Localized energy pulse rapid thermal anneal dielectric film densification method A densified dielectric film is formed on a substrate by a process that involves annealing a film deposited on the substrate by application of a localized energy pulse, such as a laser pulse, for example one of about 10 to 100 ns in duration from an excimer laser, th...	01/16/2007
7112539	Dielectric layer for semiconductor device and method of manufacturing the same A multi-layer dielectric layer structure for a semiconductor device. The multi-layer dielectric layer structure comprises a silicate interface layer having a dielectric constant greater than that of silicon nitride and a high-k dielectric layer overlying the silicat...	09/26/2006
5808315	Thin film transistor having transparent conductive film According to a transparent conductive film forming method, after an ITO (Indium Tin Oxide) thin film is formed at room temperature by a sputtering method, an annealing treatment is conducted on the film under hydrogen atmosphere at a suitable temperature ...	09/15/1998
5677240	Method for forming a semiconductor device According to a transparent conductive film forming method, after an ITO (Indium Tin Oxide) thin film is formed at room temperature by a sputtering method, an annealing treatment is conducted on the film under hydrogen atmosphere at a suitable temperature ...	10/14/1997
5664369	Plant growing room The growing room includes a closed loop track suspended above the floor and extending throughout the room. A plurality of racks are movably supported on the track by a motorized mover system. The racks include a frame for supporting a plurality of growing...	09/09/1997
5580823	Process for fabricating a collimated metal layer and contact structure in a semiconductor device A process for fabricating a semiconductor device which includes forming a collimated metal layer (54) on the surface of a semiconductor substrate (24), while maintaining the temperature of the substrate preferably below about 100° C., and most preferably...	12/03/1996
5514622	Method for the formation of interconnects and landing pads having a thin, conductive film underlying the plug or an associated contact of via hole The present invention provides a method for the formation of interconnects and landing pads having a thin, conductive film underlying the plug of an associated contact or via hole. In accordance with the preferred embodiment of the present invention, a si...	05/07/1996
5502004	Method for manufacturing a semiconductor device with heat treated diffusion layers In a method for forming a metal wiring layer of a semiconductor device an insulating layer is formed on a semiconductor substrate having impurity-doped regions. A contact hole is formed in the insulating layer to expose an impurity-doped semiconductor reg...	03/26/1996
5420056	Junction contact process and structure for semiconductor technologies A device and method for forming an improved junction contact in a semiconductor device (10). A portion of an interlevel dielectric layer (28) is etched away to expose a surface of at least one junction region (26). Next, a dielectric layer is formed over ...	05/30/1995
5278100	Chemical vapor deposition technique for depositing titanium silicide on semiconductor wafers A method of providing a conformal layer of TiSix atop a semiconductor wafer within a chemical vapor deposition reactor includes the following steps: a) positioning a wafer within the reactor; b) injecting selected quantities of gaseous Ti(NR	01/11/1994
5236868	Formation of titanium nitride on semiconductor wafer by reaction of titanium with nitrogen-bearing gas in an integrated processing system A process is disclosed for forming a layer of titanium nitride on a semiconductor wafer which comprises forming a titanium layer on the wafer in a vacuum deposition chamber in the substantial absence of oxygen-bearing gases; transferring the titanium coat...	08/17/1993
5232873	Method of fabricating contacts for semiconductor devices A semiconductor device substrate has a major surface on which is located an insulating layer, such as silicon dioxide, having an aperture penetrating through it all the way down to the major surface. An impurity-doped plug, such as tungsten doped with zin...	08/03/1993
5166770	Silicided structures having openings therein Preferred embodiments include silicon complementary MOSFETs with titanium silicided junctions (38, 58) and direct contacts of aluminum metallization (61, 62) to the p junctions (58) which avoids the high contact resistance of the silicide (60) to p silico...	11/24/1992
4770948	High-purity metal and metal silicide target for LSI electrodes There is provided a high-purity molybdenum target or high-purity molybdenum silicide target for LSI electrodes which comprises a high-purity metallic molybdenum having an alkali metal content of not more than 100 ppb and a radioactive element content of n...	09/13/1988
4650698	Method of forming a thin film of a metal or metal compound on a substrate A method of forming with good reproducibility a high-quality thin film of a metal or metal compound by a vapor growth method on a substrate placed in a quartz reaction tube which has the steps of, prior to the formation of the thin film forming an interme...	03/17/1987
4619695	Process for producing high-purity metal targets for LSI electrodes A high-purity high-melting metal target or high-purity high-melting metal silicide target for LSI electrodes having an alkali metal content of not more than 100 ppb and a radioactive element content of not more than 10 ppb is provided by a wet purificatio...	10/28/1986
4155155	Method of manufacturing power semiconductors with pressed contacts The invention relates to a method of manufacturing power semiconductors with pressed contacts and with an interdigitated structure. The thickest contact metal coverings are formed by application of a metal layer by serigraphy on a first thin metal layer d...	05/22/1979
3996658	Process for producing semiconductor memory device A distance between two electrodes of a CCD device is reduced to an extremely small value, thereby increasing the memory density, of the CCD device. In the process of the present invention, upon formation of a first electrode, an insulating layer is formed...	12/14/1976

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Class 257/E21.16 - From a gas or vapor, e.g., condensation (EPO)