Class 257/E21.15 - Through the applied layer (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E21.149. This subclass
No. of patents: 37
Last issue date: 12/04/2007

Number	Title	Issue Date
7303967	Method for fabricating transistor of semiconductor device Disclosed is a method for fabricating a transistor of a semiconductor device, the method comprising the steps of: providing a semiconductor; forming a gate electrode; performing a low-density ion implantation process with respect to the substrate, thereby forming an...	12/04/2007
7148109	Method for manufacturing flash memory device The present invention discloses a method for manufacturing a flash memory device which can minimize a hole current by impurity diffusion of floating gates, obtain a sufficient capacitance for a cell operation by increasing a breakdown voltage, and improve retention ...	12/12/2006
7112539	Dielectric layer for semiconductor device and method of manufacturing the same A multi-layer dielectric layer structure for a semiconductor device. The multi-layer dielectric layer structure comprises a silicate interface layer having a dielectric constant greater than that of silicon nitride and a high-k dielectric layer overlying the silicat...	09/26/2006
7087503	Shallow self isolated doped implanted silicon process A process and structure for forming electrical devices. The process and structure provide for forming an insulating layer on a substrate. A conductive region is then formed in the insulating layer by implanting silicon atoms into the insulating layer. Further, a plu...	08/08/2006
6642121	Control of amount and uniformity of oxidation at the interface of an emitter region of a monocrystalline silicon wafer and a polysilicon layer formed by chemical vapor deposition A method of controlling the quantity and uniformity of distribution of bonded oxygen atoms at the interface between the polysilicon and the monocrystalline silicon includes carrying out, after having loaded the wafer inside the heated chamber of the react...	11/04/2003
6624049	Semiconductor device and method of manufacturing the same Catalytic elements such as Ni are intentionally combined with defects that remain inside of a semiconductor substrate or thin film so that the energy state of the defects comes to a stable state. In this state, a heat treatment is conducted in an atmosphe...	09/23/2003
6498079	Method for selective source diffusion Deep profile and highly doped impurity regions can be formed by diffusing from a solid source or doped silicon glass and using a patterned nitride layer. An oxide etch stop and polysilicon sacrificial layer are left in place in the patterned regions and t...	12/24/2002
6448105	Method for doping one side of a semiconductor body A method for doping one side of a semiconductor substrate, such as in a silicon wafer, wherein an oxide layer is deposited on both the side to be doped and the non-doped side of the semiconductor substrate. A doping layer, containing a doping agent, is de...	09/10/2002
6372588	Method of making an IGFET using solid phase diffusion to dope the gate, source and drain A method of making an IGFET using solid phase diffusion is disclosed. The method includes providing a device region in a semiconductor substrate, forming a gate insulator on the device region, forming a gate on the gate insulator, forming an insulating la...	04/16/2002
6362075	Method for making a diffused back-side layer on a bonded-wafer with a thick bond oxide Integrated circuits, semiconductor devices and methods for making the same are described. Each embodiment shows a diffused, doped backside layer in a device wafer that is oxide bonded to a handle wafer. The diffused layer may originate in the device wafer...	03/26/2002
6197983	Germanes and doping with germanes The present invention provides germanium-containing compounds which can function as dopants and where the methods for their use are flexible, reliable and environmentally safe. The process includes the ability to make bisamidegermanes under relatively mil...	03/06/2001
6133119	Photoelectric conversion device and method manufacturing same Catalytic elements such as Ni are intentionally combined with defects that remain inside of a semiconductor substrate or thin film so that the energy state of the defects comes to a stable state. In this state, a heat treatment is conducted in an atmosphe...	10/17/2000
6133126	Method for fabricating a dopant region A method for fabricating a dopant region is disclosed. The dopant region is formed by providing a semiconductor substrate that has a surface. An electrically insulating intermediate layer is applied to the surface. A doped semiconductor layer is then appl...	10/17/2000
6008096	Ultra short transistor fabrication method A semiconductor process in which the transistor channel is defined by opposing sidewalls of a pair of masking structures formed on an upper surface of a semiconductor substrate. The spacing between the opposed sidewalls is defined by the thickness of the ...	12/28/1999
5998271	Method of producing an MOS transistor In the manufacture of an MOS transistor in a substrate (1), source/drain zones (9) and a doped gate electrode (10) are simultaneously formed by drive-out from a doped layer (8). The dopant distribution in the source/drain zones (9) is set by a permeable d...	12/07/1999
5969398	Method for producing a semiconductor device and a semiconductor device A method for producing a semiconductor device which comprises a step for forming a gate electrode on a main surface of a semiconductor substrate via a gate oxide film, and a step for directing plasma ions with a gas mixture comprising a first gas containi...	10/19/1999
5946580	Method to form elevated source/drain with solid phase diffused source/drain extension for MOSFET A gate insulator layer is formed over the semiconductor substrate and a first silicon layer is then formed over the gate insulator layer. An anti-reflection layer is formed over the first silicon layer. A gate region is defined by removing a portion of th...	08/31/1999
5918129	Method of channel doping using diffusion from implanted polysilicon A method of doping an integrated circuit device channel in a semiconductor substrate laterally enclosed by an isolation structure is disclosed. The method includes steps of forming a thin oxide layer overlying the integrated circuit device channel and the...	06/29/1999
5736446	Method of fabricating a MOS device having a gate-side air-gap structure A method of fabricating a MOS device having a gate-side air-gap structure is provided. A nitride spacer for reserving space of the air gap is formed on the substrate adjacent to the gate structure. An amorphous silicon spacer for forming the sidewall spac...	04/07/1998
5710054	Method of forming a shallow junction by diffusion from a silicon-based spacer A method of forming a shallow junction in an IGFET is disclosed. The method includes forming a gate insulator on a semiconductor substrate of first conductivity type, forming a gate electrode on the gate insulator, forming a sidewall insulator on an edge ...	01/20/1998
5661059	Boron penetration to suppress short channel effect in P-channel device A method for forming a set of p-channel devices with enhanced n-doping and penetration of boron into the channel region between the source and drain regions, thereby creating channel length independent p-channel threshold voltage behavior. Long channel an...	08/26/1997
5633522	CMOS transistor with two-layer inverse-T tungsten gate The present invention is directed to a unique silicon based MOS transistor having an inverse-T refractory metal gate structure. The gate fabricated according to this invention comprises a main CVD tungsten portion and a lower sputtered tungsten portion ou...	05/27/1997
5599725	Method for fabricating a MOS transistor with two-layer inverse-T tungsten gate structure The present invention is directed to a unique method for fabricating a silicon based MOS transistor having an inverse-T refractory metal gate structure. The gate fabricated according to this invention comprises a main CVD tungsten portion and a lower sput...	02/04/1997
5479047	Self-aligned bipolar transistor with very thin dielectric layer interfacing between poly and active area A modification of the self-aligned double poly fabrication process for bipolar transistors employs a thin sacrificial dielectric film to protect the wafer surface during the etching of an emitter opening through an overlying polysilicon contact layer. The...	12/26/1995
5407847	Method for fabricating a semiconductor device having a shallow doped region A method is provided for the formation of ultra-shallow boron doped regions in a semiconductor device. In one embodiment of the invention an N-type semiconductor substrate (15) is provided having a first P-type region formed therein. A dielectric layer (1...	04/18/1995
5374481	Polyemitter structure with improved interface control A polyemitter structure having a thin interfacial layer deposited between the polysilicon emitter contact and the crystalline silicon emitter, as opposed to a regrown SiOx layer, has improved reproducibility and performance characteristics. A n...	12/20/1994
5354710	Method of manufacturing semiconductor devices using an adsorption enhancement layer A method of manufacturing semiconductor devices comprises the steps of preparing a semiconductor substrate having a surface and a natural oxide film on the surface, forming an adsorption enhancement layer on the surface of the semiconductor substrate, for...	10/11/1994
5279976	Method for fabricating a semiconductor device having a shallow doped region A method is provided for the formation of ultra-shallow boron doped regions in a semiconductor device. In one embodiment of the invention an N-type semiconductor substrate (15) is provided having a first P-type region formed therein. A dielectric layer (1...	01/18/1994
5194397	Method for controlling interfacial oxide at a polycrystalline/monocrystalline silicon interface A method of controlling the interfacial oxygen concentration of a monocrystalline/polycrystalline emitter includes the steps of: passivating the monocrystalline silicon surface by immersing the wafer in a diluted HF acid solution; transferring the wafer i...	03/16/1993
5153146	Maufacturing method of semiconductor devices Formed on the element region of an n-type semiconductor substrate is a silicon oxide layer, on which a polysilicon layer is formed. Boron ions, p-type impurities, are then implanted into the polysilicon layer, from which boron diffuses into the element re...	10/06/1992
5141895	Semiconductor device process using diffusant penetration and source layers for shallow regions A semiconductor device is formed by a process in which a diffusant penetration layer and a diffusant source layer containing a boron dopant are formed overlaying the surface of a semiconductor substrate. The diffusant source layer is annealed to cause the...	08/25/1992
4755487	Method for making bipolar transistors using rapid thermal annealing In making bipolar transistors, an interfacial oxide layer (5) is formed over ther monocrystalline region (1), and polysilicon (6) is formed both thereon as an extrinsic emitter region. After doping the polysilicon a monocrystalline emitter region (4) is p...	07/05/1988
4604150	Controlled boron doping of silicon A technique is described for doping a silicon body with boron. The surface to be doped is typically a trench sidewall, to be used as a storage capacitor or for isolation. By providing a silicon dioxide diffusion control layer, and a polysilicon source lay...	08/05/1986
4451303	Diffusion of aluminum A method for producing a semiconductor element which can form a deep P-type impurity region by a diffusion of aluminum. A porous alumina layer is first formed on a semiconductor substrate. Then, a diffusion-protective layer formed of a material having a l...	05/29/1984
4332076	Method of manufacturing a semiconductor device A method of manufacturing a semiconductor device having at least one insulated gate field effect transistor in which a silicon body is provided with a silicon dioxide gate insulation layer and in which a boron-doped polysilicon electrode layer is formed o...	06/01/1982
4151006	Method of manufacturing a semiconductor device A method of manufacturing a semiconductor device having a transistor structure in which the emitter zone comprises a lower-doped region adjoining the base zone and a more highly-doped region adjoining the surface. According to the invention, the more high...	04/24/1979
4003071	Method of manufacturing an insulated gate field effect transistor A method of manufacturing an insulated gate field effect transistor (hereinafter referred to as IGFET) of metal-insulating film-semiconductor construction in which a predetermined amount of impurity is introduced into the insulating film to produce immobi...	01/11/1977

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Class 257/E21.15 - Through the applied layer (EPO)