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| Number | Title | Issue Date |
| 7435668 | Method for doping impurities, and for producing a semiconductor device and applied electronic apparatus using a solution containing impurity ions A solution containing impurity ions is applied onto the surface of a silicon film to form a solution layer, followed by drying into a compound layer containing the impurities. Heat treatment is performed by irradiation with an energy beam so as to diffuse the impuri... | 10/14/2008 |
| 7303967 | Method for fabricating transistor of semiconductor device Disclosed is a method for fabricating a transistor of a semiconductor device, the method comprising the steps of: providing a semiconductor; forming a gate electrode; performing a low-density ion implantation process with respect to the substrate, thereby forming an... | 12/04/2007 |
| 6670682 | Multilayered doped conductor A memory device addressing reliability and refresh characteristics through the use of a multilayered doped conductor, and a method making are disclosed. The multilayered doped conductor creates a high dopant concentration in the active area close to the c... | 12/30/2003 |
| 6635494 | Method of forming a two-dimensionally arrayed quantum device using a metalloprotein complex as a quantum-dot mask array A quantum device is constituted from a two-dimensional array of quantum dots formed from metal atom aggregates contained in a metalloprotein complex. The metalloprotein is arranged on the surface of a substrate having an insulation layer with a pitch of t... | 10/21/2003 |
| 6586318 | Thin phosphorus nitride film as an N-type doping source used in laser doping technology An improved method and system for laser doping a semiconductor material is described. In the invention, phosphorous nitride is used as a dopant source. The phosphorous nitride is brought into close proximity with a region of the semiconductor to be doped.... | 07/01/2003 |
| 6555451 | Method for making shallow diffusion junctions in semiconductors using elemental doping A method is provided for making ultra-shallow diffused junctions using an elemental dopant. A semiconductor wafer is cleaned for providing a clean reaction surface. The cleaned wafer in loaded onto a stage located in a doping system. A quantity of element... | 04/29/2003 |
| 6541353 | Atomic layer doping apparatus and method An improved atomic layer doping apparatus is disclosed as having multiple doping regions in which individual monolayer species are first deposited and then dopant atoms contained therein are diffused into the substrate. Each doping region is chemically se... | 04/01/2003 |
| 6506653 | Method using disposable and permanent films for diffusion and implant doping Methods are provided that use disposable and permanent films to dope underlying layers through diffusion. Additionally, methods are provided that use disposable films during implantation doping and that provide a surface from which to dope underlying mate... | 01/14/2003 |
| 6387782 | Process of forming an ultra-shallow junction dopant layer having a peak concentration within a dielectric layer A process for forming an ultra-shallow junction depth, doped region within a silicon substrate. The process includes forming a dielectric film on the substrate, then implanting an ionic dopant species into the structure. The profile of the implanted speci... | 05/14/2002 |
| 6329704 | Ultra-shallow junction dopant layer having a peak concentration within a dielectric layer A process for forming an ultra-shallow junction depth, doped region within a silicon substrate. The process includes forming a dielectric film on the substrate, then implanting an ionic dopant species into the structure. The profile of the implanted speci... | 12/11/2001 |
| 6329274 | Method of producing semiconductor device For forming electrical interlayer contact in a semiconductor device, an insulating film is formed on a first electrically conductive layer and then a contact hole is formed in the insulating film to expose a part of the first electroconductive, an activat... | 12/11/2001 |
| 6326664 | Transistor with ultra shallow tip and method of fabrication A novel transistor with a low resistance ultra shallow tip region and its method of fabrication. The novel transistor of the present invention has a source/drain extension or tip comprising an ultra shallow region which extends beneath the gate electrode ... | 12/04/2001 |
| 6319738 | Two-dimensionally arrayed quantum device fabrication method A quantum device is constituted from a two-dimensional array of quantum dots formed from metal atom aggregates contained in a metalloprotein complex. The metalloprotein is arranged on the surface of a substrate having an insulation layer with a pitch of t... | 11/20/2001 |
| 6319566 | Method of molecular-scale pattern imprinting at surfaces A method for mask-free molecular or atomic patterning of surfaces of reactive solids is disclosed. A molecular-scale pattern of adsorbate molecules is used in place of the conventional macroscopic "mask". Molecules adsorb at surfaces in patterns, governed... | 11/20/2001 |
| 6287928 | Two-dimensionally arrayed quantum device A quantum device is constituted from a two-dimensional array of quantum dots formed from metal atom aggregates contained in metalloprotein complex. The metalloprotein is arranged on the surface of a substrate having an insulation layer with a pitch of the... | 09/11/2001 |
| 6258661 | Formation of out-diffused bitline by laser anneal The present invention provides methods of forming an out-diffused bitline in a semiconductor substrate by utilizing a laser annealing step wherein the dopant material in the trench region is out-diffused into the semiconductor substrate. The out-diffused ... | 07/10/2001 |
| 6255183 | Manufacture of a semiconductor device with a MOS transistor having an LDD structure using SiGe spacers A method of manufacturing a semiconductor device with a MOS transistor having an LDD structure. A gate dielectric (6) and a gate electrode (7, 8) are formed on a surface (5) of a silicon substrate (1). The surface adjacent the gate electrode is then expos... | 07/03/2001 |
| 6232207 | Doping process for producing homojunctions in semiconductor substrates In doping process for producing homojunctions in a semiconductor substrate, and the semiconductor substrate, dopants penetrate by way of diffusion employing an ultraviolet light source. A mask is introduced between the light source and the semiconductor w... | 05/15/2001 |
| 6207493 | Formation of out-diffused bitline by laser anneal The present invention provides methods of forming an out-diffused bitline in a semiconductor substrate by utilizing a laser annealing step wherein the dopant material in the trench region is out-diffused into the semiconductor substrate. The out-diffused ... | 03/27/2001 |
| 6165826 | Transistor with low resistance tip and method of fabrication in a CMOS process A novel transistor with a low resistance ultra shallow tip region and its method of fabrication in a complementary metal oxide semiconductor (CMOS) process. According to the preferred method of the present invention, a first gate dielectric and a first ga... | 12/26/2000 |
| 6130144 | Method for making very shallow junctions in silicon devices A processing method for forming very shallow junctions 25 utilizing the differential diffusion coefficients of impurity dopants 38 in germanium as compared to silicon to confine the dopants 38 to very shallow regions made of substantially pure germanium 3... | 10/10/2000 |
| 6121100 | Method of fabricating a MOS transistor with a raised source/drain extension A method of forming a MOS transistor. According to the method of the present invention, a pair of source/drain contact regions are formed on opposite sides of a gate electrode. After forming the pair of source/drain contact regions, semiconductor material... | 09/19/2000 |
| 6121075 | Fabrication of two-dimensionally arrayed quantum device A quantum device is constituted from a two-dimensional array of quantum dots formed from metal atom aggregates contained in metalloprotein complex. The metalloprotein is arranged on the surface of a substrate having an insulation layer with a pitch of the... | 09/19/2000 |
| 6048782 | Method for doped shallow junction formation using direct gas-phase doping Halides of a dopant species may be used as a dopant gas source to form shallow doped junctions using a direct gas-phase doping (GPD) process. These halides can also be combined with a carrier gas. Some advantages over conventional gas-phase doping process... | 04/11/2000 |
| 6020223 | Method of manufacturing a thin film transistor with reduced parasitic capacitance and reduced feed-through voltage A method of producing an improved thin film transistor structure is provided having no source/gate or drain/gate overlap. A laser-assisted doping technique is applied to fabricate such transistors. A radiation filter is employed, which is transparent to l... | 02/01/2000 |
| 6019796 | Method of manufacturing a thin film transistor with reduced parasitic capacitance and reduced feed-through voltage A method of producing an improved thin film transistor structure is provided having no source/gate or drain/gate overlap. A laser-assisted doping technique is applied to fabricate such transistors. A radiation filter is employed, which is transparent to l... | 02/01/2000 |
| 5946580 | Method to form elevated source/drain with solid phase diffused source/drain extension for MOSFET A gate insulator layer is formed over the semiconductor substrate and a first silicon layer is then formed over the gate insulator layer. An anti-reflection layer is formed over the first silicon layer. A gate region is defined by removing a portion of th... | 08/31/1999 |
| 5926727 | Phosphorous doping a semiconductor particle A method (10) of phosphorus doping a semiconductor particle using ammonium phosphate. A p-doped silicon sphere is mixed with a diluted solution of ammonium phosphate having a predetermined concentration. These spheres are dried (16, 18), with the phosphor... | 07/20/1999 |
| 5925574 | Method of producing a bipolar transistor A method of producing a bipolar transistor composed of collector, base and emitter regions disposed sequentially on a semiconductor substrate. According to the method, a semiconductor layer is deposited on the collector region, the semiconductor layer is ... | 07/20/1999 |
| 5918140 | Deposition of dopant impurities and pulsed energy drive-in A semiconductor doping process which enhances the dopant incorporation achievable using the Gas Immersion Laser Doping (GILD) technique. The enhanced doping is achieved by first depositing a thin layer of dopant atoms on a semiconductor surface followed b... | 06/29/1999 |
| 5913123 | Manufacturing method for deep-submicron P-type metal-oxide semiconductor shallow junction A method for manufacturing a deep-submicron P-type metal-oxide semiconductor shallow junction utilizes an electron terminal structure with a base covered by a layer containing boron, germanium, and silicon. This layer containing boron, germanium, and sili... | 06/15/1999 |
| 5908307 | Fabrication method for reduced-dimension FET devices Pre-amorphization of a surface layer of crystalline silicon to an ultra-shallow (e.g., less than 100 nm) depth provides a solution to fabrication problems including (1) high thermal conduction in crystalline silicon and (2) shadowing and diffraction-inter... | 06/01/1999 |
| 5897364 | Method of forming N- and P-channel transistors with shallow junctions A method for forming N- and P-channel transistors having shallow junctions in an integrated circuit device is described. A semiconductor substrate is provided having active regions separated from one another by isolation regions wherein there is a N-chann... | 04/27/1999 |
| 5874352 | Method of producing MIS transistors having a gate electrode of matched conductivity type A method of producing an MIS transistor by preparing a substrate formed with a gate electrode and a semiconductor layer which defines a source region and a drain region, removing a natural oxide film from a surface of the gate electrode and from a surface... | 02/23/1999 |
| 5851909 | Method of producing semiconductor device using an adsorption layer An impurity adsorption layer is formed on a substrate surface and solid-phase thermal diffusion is carried out to form source and drain regions for a metal-insulator-semiconductor field-effect-transistor having lightly doped drain structure or double dope... | 12/22/1998 |
| 5766998 | Method for fabricating narrow channel field effect transistors having titanium shallow junctions An improved reverse self-aligned FET having subquarter-micrometer channel lengths, shallow junction depths, and silicide source/drain contacts was achieved. The method for fabricating the FET includes forming a titanium layer, an N+ doped firs... | 06/16/1998 |
| 5736446 | Method of fabricating a MOS device having a gate-side air-gap structure A method of fabricating a MOS device having a gate-side air-gap structure is provided. A nitride spacer for reserving space of the air gap is formed on the substrate adjacent to the gate structure. An amorphous silicon spacer for forming the sidewall spac... | 04/07/1998 |
| 5710450 | Transistor with ultra shallow tip and method of fabrication A novel transistor with a low resistance ultra shallow tip region and its method of fabrication. The novel transistor of the present invention has a source/drain extension or tip region comprising an ultra shallow region which extends beneath the gate ele... | 01/20/1998 |
| 5674777 | Method for forming silicon-boron binary compound layer as boron diffusion source in silicon electronic device The present invention is related to a method for fabricating a silicon electronic device having a boron diffusion source layer, includes steps of: a) providing a silicon substrate; b) depositing a silicon layer on said silicon substrate; and c) growing a ... | 10/07/1997 |
| 5656511 | Manufacturing method for semiconductor device A manufacturing method for a semiconductor device is preferably used for a semiconductor device using SOI (Silicon on Insulation) technology. At minimum, the method includes the following steps: the step of forming a gate electrode on a substrate by using... | 08/12/1997 |
