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| Number | Title | Issue Date |
| 7303967 | Method for fabricating transistor of semiconductor device Disclosed is a method for fabricating a transistor of a semiconductor device, the method comprising the steps of: providing a semiconductor; forming a gate electrode; performing a low-density ion implantation process with respect to the substrate, thereby forming an... | 12/04/2007 |
| 6653213 | Structure and method for doping of III-V compounds A structure for doping of III-V compounds is provided. The structure is a multi-layered structure in which layers of dopant are alternated with layers of initially undoped III-V compound. Dopant diffuses from the layers of dopant into the layers of III-V ... | 11/25/2003 |
| 6635556 | Method of preventing autodoping A method of making a silicon-based electronic device is provided. The method includes, for example, the steps of forming a doped silicon layer on a surface of a substrate material and forming an undoped silicon capping layer on the doped silicon layer. Th... | 10/21/2003 |
| 6593199 | Method of manufacturing a semiconductor component and semiconductor component thereof A method of manufacturing a semiconductor component includes providing a substrate (110) having a first doping concentration and growing an epitaxial layer (120, 520) over the substrate. The epitaxial layer has a second doping concentration lower than the... | 07/15/2003 |
| 6579752 | Phosphorus dopant control in low-temperature Si and SiGe epitaxy A method of manufacturing a semiconductor device comprising the step of epitaxially growing of an n-type doped layer of a semiconductor material using an n-type dopant gas, the growth process being performed at a pressure higher than 2.66×104 ... | 06/17/2003 |
| 6576535 | Carbon doped epitaxial layer for high speed CB-CMOS A method for fabricating a high speed complementary bipolar/CMOS device is disclosed which enables the forming of a silicon epitaxial layer in a PNP transistor having carbon incorporated therein to suppress boron up-diffusion from lower heavily boron-dope... | 06/10/2003 |
| 6541117 | Silicon epitaxial wafer and a method for producing it There is disclosed a silicon epitaxial wafer comprising an epitaxial layer formed on a silicon wafer wherein Erratic phenomenon does not occur in a MOS device fabricated on the silicon epitaxial wafer, a silicon epitaxial wafer having oxide dielectric bre... | 04/01/2003 |
| 6465332 | Method of making MOS transistor with high doping gradient under the gate The invention is directed to a method of manufacturing an area of a first type of conductivity extending a depth into a semiconductor substrate and having a doping gradient as a function of the depth into the semiconductor substrate. The method comprises ... | 10/15/2002 |
| 6454854 | Semiconductor wafer and production method therefor It is an object of the invention to provide a semiconductor wafer obtained by forming a semiconductor thin film with uniform resistivity on a main surface of a semiconductor single crystal substrate of 300 mm or more in diameter. When a process gas is sup... | 09/24/2002 |
| 6294443 | Method of epitaxy on a silicon substrate comprising areas heavily doped with boron A method of vapor phase epitaxy deposition of silicon on a silicon substrate on or in which exist areas containing dopants at high concentration, among which is boron, while avoiding a selfdoping of the epitaxial layer by boron, including the step of intr... | 09/25/2001 |
| 6184154 | Method of processing the backside of a wafer within an epitaxial reactor chamber An improved method is provided for processing the backside of a wafer within an epitaxial reactor chamber, such as by etching the backside of the wafer or applying a back seal to the backside of the wafer. The backside of the wafer can therefore be proces... | 02/06/2001 |
| 5998283 | Silicon wafer having plasma CVD gettering layer with components/composition changing in depth-wise direction and method of manufacturing the silicon wafer In a silicon wafer having a CVD film formed on one main face and having the other main face mirror-polished, the components and/or composition of the CVD film change in the thicknesswise direction of the film. This makes it possible to provide a silicon w... | 12/07/1999 |
| 5872028 | Method of forming power semiconductor devices with controllable integrated buffer A method of manufacturing a semiconductor device and device in which a sacrificial N shelf layer is grown on a P+ semiconductor substrate to contain the out-diffusion of dopant from the substrate. An N+ buffer layer is grown on the N shelf layer and an N-... | 02/16/1999 |
| 5834363 | Method of manufacturing semiconductor wafer, semiconductor wafer manufactured by the same, semiconductor epitaxial wafer, and method of manufacturing the semiconductor epitaxial wafer There is disclosed a method of manufacturing a semiconductor wafer which has a dopant evaporation preventive film formed on one of main surfaces thereof, wherein a film serving as the dopant evaporation preventive film is formed on the one of the main sur... | 11/10/1998 |
| 5696004 | Method of producing semiconductor device with a buried layer A method of producing a semiconductor device having a high concentration N-type buried layer on a P-type silicon substrate, the buried layer being covered with a P-type silicon epitaxial layer. The method comprises forming a P-type high concentration laye... | 12/09/1997 |
| 5585305 | Method for fabricating a semiconductor device A method for fabricating a semiconductor device includes the steps of growing a second semiconductor layer on a first semiconductor layer which is highly doped with an impurity such as Zn and diffusing the impurity concurrently with the growing step of th... | 12/17/1996 |
| 5432121 | Method for fabricating a multilayer epitaxial structure An all epitaxial process performed entirely in a CVD reactor is employed to grow epitaxial layers with accurately controlled successively low and high dopant concentrations over a heavily doped substrate, eliminating the need for a separate diffusion, eve... | 07/11/1995 |
| 5387807 | P-N junction diffusion barrier employing mixed dopants Generally, and in one form of the invention, a p-n junction diffusion barrier is disclosed comprising a first semiconductor layer 28 of p-type conductivity, a second semiconductor layer 32 of n-type conductivity and a third semiconductor layer 30 of p-typ... | 02/07/1995 |
| 5324685 | Method for fabricating a multilayer epitaxial structure An all epitaxial process performed entirely in a CVD reactor is employed to grow heavily doped layer on lightly doped layer on a heavily doped substrate, eliminating the need for separate diffusion, even for high impurity concentrations. The process start... | 06/28/1994 |
| 5279987 | Fabricating planar complementary patterned subcollectors with silicon epitaxial layer A process, compatible with bipolar and CMOS silicon device manufacturing for fabricating complementary buried doped regions in a silicon substrate. An N+ doped region (12) is formed in the silicon substrate by known methods of arsenic doping and drive in.... | 01/18/1994 |
| 5225235 | Semiconductor wafer and manufacturing method therefor A semiconductor wafer on which silicon or the like is epitaxially grown and p-type or n-type impurities are doped and which has at the rear surface except for the peripheral edge portion thereof a blocking film for preventing jumping out of impurities the... | 07/06/1993 |
| 5213986 | Process for making thin film silicon-on-insulator wafers employing wafer bonding and wafer thinning A very thin silicon film SOI device can be made utilizing a bond and etch-back process. In the presently claimed invention, boron dopant is introduced into a surface of a silicon device wafer and the doped surface is bonded onto another silicon wafer at a... | 05/25/1993 |
| 5208184 | P-N junction diffusion barrier employing mixed dopants Generally, and in one form of the invention, a p-n junction diffusion barrier is disclosed comprising a first semiconductor layer 28 of p-type conductivity, a second semiconductor layer 32 of n-type conductivity and a third semiconductor layer 30 of p-typ... | 05/04/1993 |
| 5177025 | Method of fabricating an ultra-thin active region for high speed semiconductor devices A method of fabricating a semiconductor device to retard diffusion of a dopant from a center active region into adjacent regions. The center active region is epitaxially formed by selectively increasing and decreasing an introduction of diffusion-suppress... | 01/05/1993 |
| 5137838 | Method of fabricating P-buried layers for PNP devices A P-type buried layer is described for use with planar, silicon, monolithic, epitaxial, PN junction-isolated transistors of PNP conductivity primarily for use in IC construction. The buried layer includes a high concentration of boron and gallium along wi... | 08/11/1992 |
| 5070031 | Complementary semiconductor region fabrication A method of forming oppositely doped semiconductor regions includes providing a first semiconductor layer of a first conductivity type and forming a second semiconductor layer of a second conductivity type on a portion of the first layer. A third semicond... | 12/03/1991 |
| 5068704 | Method of manufacturing semiconductor device A method of manufacturing a semiconductor device comprising the steps of bringing a mirror-polished surface of a first semiconductor substrate of a first conductivity type into contact with a mirror-polished surface of a second semiconductor substrate of ... | 11/26/1991 |
| 4935386 | Method of manufacturing semiconductor device including substrate bonding and outdiffusion by thermal heating A method of manufacturing a semiconductor device comprising the steps of bringing a mirror-polished surface of a first semiconductor substrate of a first conductivity type into contact with a mirror-polished surface of a second semiconductor substrate of ... | 06/19/1990 |
| 4925809 | Semiconductor wafer and epitaxial growth on the semiconductor wafer with autodoping control and manufacturing method therefor A semiconductor wafer on which silicon or the like is epitaxially grown and p-type or n-type impurities are doped and which has at the rear surface except for the peripheral edge portion thereof a blocking film for preventing jumping out of impurities the... | 05/15/1990 |
| 4894349 | Two step vapor-phase epitaxial growth process for control of autodoping A process for forming a vapor-phase epitaxial growth layer on a silicon wafer having a buried layer of a high As or B concentration. This vapor-phase epitaxial growth process is performed in two steps of (i) performing a vapor-phase epitaxial growth at a ... | 01/16/1990 |
| 4859626 | Method of forming thin epitaxial layers using multistep growth for autodoping control A method of forming thin epitaxial layers by subjecting a substrate to a high temperature prebake followed by a medium temperature capping seal and a low temperature deposition is disclosed. In a preferred embodiment the epitaxial layer is formed by low p... | 08/22/1989 |
| 4721684 | Method for forming a buried layer and a collector region in a monolithic semiconductor device A method for forming a buried layer below the collector region of a transistor of an integrated circuit uses a second doping agent (e.g.--small amounts of phosphorus) in addition to a main doping agent (e.g.--antimony). The use of the second doping agent ... | 01/26/1988 |
| 4696701 | Epitaxial front seal for a wafer A thin high resistivity epitaxial layer is provided over the entire surface of a semiconductor wafer in order to minimize autodoping while growing a desired epitaxial layer over the entire semiconductor wafer. The thin low resistivity epitaxial layer acts... | 09/29/1987 |
| 4687682 | Back sealing of silicon wafers Sealing the backside of a semiconductor wafer prevents evaporation of the dopant (typically boron) when an epitaxial layer is grown on the front (active) side, thereby preventing autodoping of the epitaxial layer with excess dopant. The present technique ... | 08/18/1987 |
| 4662956 | Method for prevention of autodoping of epitaxial layers A method for the prevention of dopant diffusion from the back side of a doped semiconductor substrate during epitaxial layer growth. The entire surface of the substrate is first covered with a cleanly etchable material. Around the entire first layer is fo... | 05/05/1987 |
| 4571275 | Method for minimizing autodoping during epitaxial deposition utilizing a graded pattern subcollector The method suggests the replacement of all or part of the solid or blanket buried region, typically a subcollector region of a bipolar transistor, by a mesh or stripe shaped subcollector. During subsequent thermal processing involving growth of the epitax... | 02/18/1986 |
| 4536784 | Semiconductor device having a junction capacitance, an integrated injection logic circuit and a transistor in a semiconductor body A semiconductor device has a diffused layer of a first conductivity type which extends to a buried layer of a second conductivity type, formed in a manner to extend from a part of a surface of a semiconductor layer of the second conductivity type which is... | 08/20/1985 |
| 4535529 | Method of making semiconductor devices by forming an impurity adjusted epitaxial layer over out diffused buried layers having different lateral conductivity types A method of manufacturing a semiconductor device is provided in which semiconductor circuit elements are provided in regions formed by diffusion from one or more buried layers into an epitaxial layer. The diffusion is carried out such that a surface layer... | 08/20/1985 |
| 4505766 | Method of fabricating a semiconductor device utilizing simultaneous outdiffusion and epitaxial deposition A semiconductor device has a diffused layer of a first conductivity type which extends to a buried layer of a second conductivity type, formed in a manner to extend from a part of a surface of a semiconductor layer of the second conductivity type which is... | 03/19/1985 |
| 4504330 | Optimum reduced pressure epitaxial growth process to prevent autodoping A reduced pressure epitaxial deposition method is disclosed to maximize performance and leakage limited yield of devices formed in the epitaxial layer. The method includes specified prebake and deposition conditions designed to minimize arsenic (buried su... | 03/12/1985 |
