Did You Know...
...that the video game, Pong, was invented by a guy who graduated at the bottom of his engineering class? Nolan Bushnell spent more time running the games at a local amusement park than he did on his studies at the University of Utah. His dreams of working for Disney's amusement empire were dashed when the company wouldn't hire him. Taking a boring job, Nolan daydreamed about electronic versions of popular games. He invented Pong, the first video game, and went on to found Atari Co.
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| Number | Title | Issue Date |
| 7432212 | Methods of processing a semiconductor substrate The invention includes methods of processing semiconductor substrates. In one implementation, a semiconductor substrate is provided which has an outer surface. Such surface has a peripheral region received about a peripheral edge of the semiconductor substrate. A la... | 10/07/2008 |
| 7407846 | Thin film transistor, display device and their production The present method prevents malfunctions in switching caused by a light leakage current in an active matrix type thin film transistor substrate for a liquid crystal display and prevents display failures, by selectively disposing a self assembled monolayer film in a ... | 08/05/2008 |
| 7393707 | Method for manufacturing an electro-optical device An object of the present invention is to provide an EL display device having high operation performance and reliability. A third passivation film 45 is disposed under the EL element 203 comprising a pixel electrode (anode) 46, an EL layer... | 07/01/2008 |
| 7365024 | Chemical solution coating method and chemical solution coating apparatus A chemical solution coating method includes: a first step of disposing a semiconductor substrate on a substrate supporting unit with a first face to be coated with a chemical solution facing upward; a second step of moving a chemical solution spraying member for spr... | 04/29/2008 |
| 7365022 | Additive printed mask process and structures produced thereby A digital lithographic process first deposits a mask layer comprised of print patterned mask features. The print patterned mask features define gaps into which a target material may be deposited, preferably through a digital lithographic process. The target material... | 04/29/2008 |
| 7365414 | Component packaging apparatus, systems, and methods Dielectric materials comprising release agents are described. Also described are a process for improving the proccessability of dielectric materials during hot embossing, substrates prepared by hot embossing, and integrated-circuit packages comprising the improved s... | 04/29/2008 |
| 7345303 | Organic thin-film transistors A novel barrier layer which protects electronic devices from adverse environmental effects such as exposure to light, especially white light, is described. The barrier layer comprises a copolymer having an acrylate unit and an acrylate unit with a pendant dye group.... | 03/18/2008 |
| 7344955 | Cut-and-paste imprint lithographic mold and method therefor A method (and apparatus) of replicating a pattern on a structure, includes using imprint lithography to replicate a pattern formed on a first structure onto a portion of a second structure. ... | 03/18/2008 |
| 7307338 | Three dimensional polymer memory cell systems Systems and methodologies are provided for forming three dimensional memory structures that are fabricated from blocks of individual polymer memory cells stacked on top of each other. Such a polymer memory structure can be formed on top of control component circuitr... | 12/11/2007 |
| 7288420 | Method for manufacturing an electro-optical device An object of the present invention is to provide an EL display device having high operation performance and reliability. A third passivation film 45 is disposed under the EL element 203 comprising a pixel electrode (anode) 46, an EL layer... | 10/30/2007 |
| 7282735 | TFT having a fluorocarbon-containing layer A thin film transistor composed of: (a) a semiconductor layer including a thiophene compound, wherein the thiophene compound comprises one or more substituted thiophene units, one or more unsubstituted thiophene units, and optionally one or more divalent linkages; (... | 10/16/2007 |
| 7279386 | Method for forming a semiconductor arrangement with gate sidewall spacers of specific dimensions A method for forming spacers of specific dimensions on a polysilicon gate electrode protects the sidewalls of the polysilicon gate electrode during selective epitaxial growth. The spacers, whether asymmetric or symmetric, are precisely defined by using the same spec... | 10/09/2007 |
| 7241688 | Aperture masks for circuit fabrication Aperture masks and deposition techniques for using aperture masks are described. In addition, techniques for creating aperture masks and other techniques for using the aperture masks are described. The various techniques can be particularly useful in creating circui... | 07/10/2007 |
| 7220683 | Transparent amorphous carbon structure in semiconductor devices A transparent amorphous carbon layer is formed. The transparent amorphous carbon layer has a low absorption coefficient such that the amorphous carbon is transparent in visible light. The transparent amorphous carbon layer may be used in semiconductor devices for di... | 05/22/2007 |
| 7205167 | Method to detect photoresist residue on a semiconductor device A method for detecting photoresist residue during semiconductor device manufacture includes developing photoresist on a surface of a semiconductor device to expose portions of the surface A plurality of etch paths are then partially etched into the surface and inspe... | 04/17/2007 |
| 7192880 | Method for line etch roughness (LER) reduction for low-k interconnect damascene trench etching The present invention provides a method for etching a substrate 100. The method includes conducting a first etch on an anti-reflective layer 170 and a portion of a hardmask layer 140, 150 to form an opening 162 in the substrate 100... | 03/20/2007 |
| 7172972 | Semiconductor device manufacture method and etching system A semiconductor device manufacture method includes the steps of forming a resist layer above a work target layer; exposing and developing the resist layer to form resist patterns including isolated pattern and dense patterns; monitoring widths of isolated and dense ... | 02/06/2007 |
| 7172965 | Method for manufacturing semiconductor device After forming a stopper film on a semiconductor substrate having a copper wiring layer therein, an interlayer insulating film made of a low dielectric constant material is formed on the stopper film. Then, after forming a capping film on the interlayer insulating fi... | 02/06/2007 |
| 7169701 | Dual damascene trench formation to avoid low-K dielectric damage A method for forming a dual damascene including providing a first dielectric insulating layer including a via opening; forming an organic dielectric layer over the first IMD layer to include filling the via opening; forming a hardmask layer over the organic dielectr... | 01/30/2007 |
| 7157732 | Switchable memory diode-a new memory device Systems and methodologies are provided for forming a diode component integral with a memory cell to facilitate programming arrays of memory cells created therefrom. Such a diode component can be part of a PN junction of memory cell having a passive and active layer ... | 01/02/2007 |
| 7135419 | Line edge roughness reduction A base-loaded polymer is applied to a semiconductor feature formed after exposing and developing a photoresist layer in order to reduce line edge roughness caused by a residual acid collecting on the edges of the feature during the post-exposure bake of the photores... | 11/14/2006 |
| 7125796 | Plasma etch process for multilayer vias having an organic layer with vertical sidewalls A process is provided for fabricating a via 52 between bonded wafers without undercutting an organic bonding material 32. The process for forming the via 52 in a structure including a dielectric material 14 and an organic bonding material... | 10/24/2006 |
| 7115525 | Method for integrated circuit fabrication using pitch multiplication Different sized features in the array and in the periphery of an integrated circuit are patterned on a substrate in a single step. In particular, a mixed pattern, combining two separately formed patterns, is formed on a single mask layer and then transferred to the ... | 10/03/2006 |
| 6864192 | Langmuir-blodgett chemically amplified photoresist A Langmuir-Blodgett film may be utilized as a chemically amplified photoresist layer. Langmuir-Blodgett films have highly vertically oriented structures which may be effective in reducing line edge or line width roughness in chemically amplified photoresists. ... | 03/08/2005 |
| 6699792 | Polymer spacers for creating small geometry space and method of manufacture thereof In forming an opening or space in a substrate, a layer of photoresist is provided on the substrate, and the photoresist is patterned to provide photoresist bodies having respective adjacent sidewalls. A polymer layer is provided on the resulting structure... | 03/02/2004 |
| 6682988 | Growth of photoresist layer in photolithographic process A method of fabricating a feature of an integrated circuit in a layer of material includes providing a layer of photoresist having a first thickness over the layer of material; forming apertures in the layer of photoresist; growing the layer of photoresis... | 01/27/2004 |
| 6630410 | Self-aligned PECVD etch mask A method for forming an etched feature in a substrate such as an insulator layer of a semiconductor wafer is provided. In one embodiment, the method includes initially etching a substrate layer using a photoresist or other masking layer to form the etched... | 10/07/2003 |
| 6627524 | Methods of forming transistor gates; and methods of forming programmable read-only memory constructions The invention includes a method of forming a transistor gate. One or more conductive materials are formed over a semiconductor substrate, and a block is formed over the one or more conductive materials. The block comprises a photoresist mass and a materia... | 09/30/2003 |
| 6579657 | Material for forming a fine pattern and method for manufacturing a semiconductor device using the same A resist pattern, containing a material capable of generating an acid by exposure to light, is covered with a resist containing a material capable of crosslinkage in the presence of an acid. The acid is generated in the resist pattern by application of he... | 06/17/2003 |
| 6576520 | Amorphous carbon layer for improved adhesion of photoresist and method of fabrication An improved and novel semiconductor device including an amorphous carbon layer for improved adhesion of photoresist and method of fabrication. The device includes a substrate having a surface, a carbon layer, formed on the surface of the substrate, and a ... | 06/10/2003 |
| 6576562 | Manufacturing method of semiconductor device using mask pattern having high etching resistance A manufacturing method of semiconductor device comprises forming a mask material having an aromatic ring and carbon content of 80 wt % or more on an object, forming a mask material pattern by etching the mask material to a desired pattern, and etching the... | 06/10/2003 |
| 6517995 | Fabrication of finely featured devices by liquid embossing Elastomeric stamps facilitate direct patterning of electrical, biological, chemical, and mechanical materials. A thin film of material is deposited on a substrate. The deposited material, either originally present as a liquid or subsequently liquefied, is... | 02/11/2003 |
| 6509251 | Method of forming a resist pattern for blocking implantation of an impurity into a semiconductor substrate The contour of a resist pattern is retreated at a site where a part of the place where a gate wiring is to be disposed, which part is located on an active region, and the place where the resist pattern made of a resist film is to be disposed are near to e... | 01/21/2003 |
| 6451705 | Self-aligned PECVD etch mask A method for forming an etched feature in a substrate such as an insulator layer of a semiconductor wafer is provided. In one embodiment, the method includes initially etching a substrate layer using a photoresist or other masking layer to form the etched... | 09/17/2002 |
| 6448183 | Method of forming contact portion of semiconductor element Disclosed is a method for forming a contact portion of a semiconductor element. An exemplary method includes the steps of depositing an insulation layer on a lower thin film on which there is formed a semiconductor element electrode or a metal wiring patt... | 09/10/2002 |
| 6423650 | Ultra-thin resist coating quality by increasing surface roughness of the substrate In one embodiment, the present invention relates to a method of processing a semiconductor substrate, involving the steps of providing the semiconductor substrate having an upper surface; roughening the upper surface of the semiconductor substrate so that... | 07/23/2002 |
| 6368924 | Amorphous carbon layer for improved adhesion of photoresist and method of fabrication An improved and novel semiconductor device including an amorphous carbon layer for improved adhesion of photoresist and method of fabrication. The device includes a substrate having a surface, a carbon layer formed on the surface of the substrate, and a r... | 04/09/2002 |
| 6180535 | Approach to the spacer etch process for CMOS image sensor A new method is provided for the creation of spacers for the CMOS gate electrode. A layer of a spacer material is deposited over the gate structure; a layer of photoresist is deposited over the layer of spacer material. The layer of photoresist of the inv... | 01/30/2001 |
| 6153499 | Method of manufacturing semiconductor device A first resist film for EB exposure, a buffer film, and a second resist film for i-line exposure are applied sequentially onto a substrate. Thereafter, the second resist film and the buffer film are subjected to patterning for forming a first opening. The... | 11/28/2000 |
| 6103596 | Process for etching a silicon nitride hardmask mask with zero etch bias A method for controlling the mask bias of a photoresist mask is described whereby a polymer coating is formed over the patterned photoresist mask immediately prior to etching the mask's pattern into a subjacent layer. The polymer coating is formed by trea... | 08/15/2000 |
