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| Number | Title | Issue Date |
| 7442633 | Decoupling capacitor for high frequency noise immunity Systems and methods are provided for an on-chip decoupling device and method. One aspect of the present subject matter is a capacitor. One embodiment of the capacitor includes a substrate, a high K dielectric layer doped with nano crystals disposed on the substrate,... | 10/28/2008 |
| 7435670 | Bit line barrier metal layer for semiconductor device and process for preparing the same The present invention relates to a bit line barrier metal layer for a semiconductor device and a process for preparing the same, the process comprising: forming bit line contact on an insulation layer vapor-deposited on an upper part of a substrate so as to expose a... | 10/14/2008 |
| 7435678 | Method of depositing noble metal electrode using oxidation-reduction reaction Provided is a method of depositing a noble metal layer using an oxidation-reduction reaction. The method includes flowing a noble metal source gas, an oxidizing gas, and a reducing gas into a reaction chamber; and generating plasma in the reaction chamber to form a ... | 10/14/2008 |
| 7422977 | Copper adhesion improvement device and method A semiconductor device, in which a semiconductor integrated circuit having a multi-level interconnection structure is formed, according to an embodiment of the present invention, comprises a copper wiring and an insulating layer formed on a top surface of the copper... | 09/09/2008 |
| 7414296 | Method of manufacturing a metal-insulator-metal capacitor The present invention provides method of manufacturing a metal-insulator-metal capacitor (100). A method of manufacturing includes depositing a first refractory metal layer (105) over a semiconductor substrate (110). The first refractory metal l... | 08/19/2008 |
| 7390678 | Method for fabricating semiconductor device A PLZT film (30) is formed as the material film of a capacitor dielectric film and a top electrode film (31) is formed on the PLZT film (30). The top electrode film (31) comprises two IrOx films having different composition. Su... | 06/24/2008 |
| 7361590 | Semiconductor device and manufacturing method thereof A method of manufacturing a semiconductor device includes: preparing a semiconductor element having a first metal layer made of first metal on a surface thereof, and a metal substrate made of second metal, the metal substrate having a fourth metal layer made of four... | 04/22/2008 |
| 7358174 | Methods of forming solder bumps on exposed metal pads A method of forming an electronic structure may include providing a substrate having a metal pad thereon. A conductive barrier layer may be formed on a first portion of the metal pad, and a second exposed portion of the metal pad may be free of the conductive barrie... | 04/15/2008 |
| 7341908 | Semiconductor device and method of manufacturing the same Provided are a semiconductor device including a reliable interconnect and a method of manufacturing the same. The semiconductor device includes a substrate, an inter-metal dielectric (IMD) pattern having an opening, an amorphous metallic nitride layer formed on the ... | 03/11/2008 |
| 7335611 | Copper conductor annealing process employing high speed optical annealing with a low temperature-deposited optical absorber layer A method of forming a conductor in a thin film structure on a semiconductor substrate includes forming high aspect ratio openings in a base layer having vertical side walls, depositing a dielectric barrier layer comprising a dielectric compound of a barrier metal on... | 02/26/2008 |
| 7332433 | Methods of modulating the work functions of film layers Methods for fabricating two metal gate stacks with varying work functions for complementary metal oxide semiconductor (CMOS) devices are provided A first metal layer may be deposited onto a gate dielectric, followed by the deposition of a second metal layer, where t... | 02/19/2008 |
| 7314806 | Methods of forming metal-insulator-metal (MIM) capacitors with separate seed A metal-oxy-nitride seed dielectric layer can be formed on a metal-nitride lower electrode of a metal-insulator-metal (MIM) type capacitor. The metal-oxy-nitride seed dielectric layer can act as a barrier layer to reduce a reaction with the metal-nitride lower elect... | 01/01/2008 |
| 7309885 | PRAMs having a plurality of active regions located vertically in sequence and methods of forming the same There are provided PRAMS having a plurality of active regions located vertically in sequence and methods of forming the same. The PRAM and the method provide an approach to rapidly changing phase in a phase change layer pattern with a given design rule. A semiconduc... | 12/18/2007 |
| 7303983 | ALD gate electrode A semiconductor process and apparatus fabricate a metal gate electrode by forming a first conductive layer (22) over a gate dielectric layer (11), forming a transition layer (32) over the first conductive layer using an atomic layer deposition p... | 12/04/2007 |
| 7300840 | MIM capacitor structure and fabricating method thereof A method for fabricating an MIM capacitor is disclosed. First, a substrate is provided having a first dielectric layer thereon. Next at least one first damascene conductor is formed within the first dielectric layer, and a second dielectric layer with a capacitor op... | 11/27/2007 |
| 7279421 | Method and deposition system for increasing deposition rates of metal layers from metal-carbonyl precursors A method and a deposition system for increasing deposition rates of metal layers from metal-carbonyl precursors using CO gas and a dilution gas. The method includes providing a substrate in a process chamber of a processing system, forming a process gas containing a... | 10/09/2007 |
| 7276436 | Manufacturing method for electronic component module and electromagnetically readable data carrier A semiconductor bear chip having a bump subjected to high temperatures is pressed, from the upper side, onto a wiring board including a wiring pattern, a thermosetting resin film covering an electrode area on the wiring pattern and having insulating particles disper... | 10/02/2007 |
| 7276453 | Methods for forming an undercut region and electronic devices incorporating the same An electronic device having a substrate structure having an undercut region is provided and further included is a method for forming an undercut region of a substrate structure. The method includes forming a patterned protective layer over a first electrode. The met... | 10/02/2007 |
| 7268413 | Bipolar transistors with low-resistance emitter contacts Many integrated circuits include a type of transistor known as a bipolar junction transistor, which has an emitter contact formed of polysilicon. Unfortunately, polysilicon has a relatively high electrical resistance that poses an obstacle to improving switching spe... | 09/11/2007 |
| 7239017 | Low-k B-doped SiC copper diffusion barrier films The present invention provides a low dielectric constant copper diffusion barrier film composed, at least in part, of boron-doped silicon carbide suitable for use in a semiconductor device and methods for fabricating such a film. The copper diffusion barrier maintai... | 07/03/2007 |
| 7235454 | MIM capacitor structure and method of fabrication A method of forming a metal-insulator-metal (MIM) capacitor wherein a plate of a MIM capacitor is formed in the entire thickness of a metallization layer of a semiconductor device. At least one thin conductive material layer is disposed within the material of the me... | 06/26/2007 |
| 7232736 | Semiconductor devices with capacitors of metal/insulator/metal structure and methods for forming the same Semiconductor devices with copper interconnections and MIM capacitors and methods of fabricating the same are provided. The device includes a lower electrode composed of a first copper layer. A first insulation layer covers a lower electrode. A window is formed in t... | 06/19/2007 |
| 7164203 | Methods and procedures for engineering of composite conductive by atomic layer deposition A composite film comprised of three layers is formed by ALD on a substrate with a substrate interface surface. A first layer is coupled to the substrate interface surface. The first layer provides adhesion to the substrate interface surface and initiation of layer b... | 01/16/2007 |
| 7112507 | MIM capacitor structure and method of fabrication A method of forming a metal-insulator-metal (MIM) capacitor wherein a plate of a MIM capacitor is formed in the entire thickness of a metallization layer of a semiconductor device. At least one thin conductive material layer is disposed within the material of the me... | 09/26/2006 |
| 6696346 | Method of manufacturing semiconductor device It is an object of the present invention to provide a semiconductor device capable of decreasing electric resistance of a lower electrode provided therein, as well as capable of accurately responding to external signals having high frequencies inputted th... | 02/24/2004 |
| 6693320 | Capacitor structures with recessed hemispherical grain silicon Capacitor structures and capacitors with edge zones that are substantially free of hemispherical grain silicon along the upper edges of the capacitor structures are disclosed. The resulting recessed hemispherical grain silicon layers reduce or prevent sep... | 02/17/2004 |
| 6692976 | Post-etch cleaning treatment The present disclosure relates to a post-etch cleaning treatment for a semiconductor device such as a FeRAM. The treatment comprises providing an etchant comprising both a fluorine compound and a chlorine compound, and applying the etchant to the semicond... | 02/17/2004 |
| 6693366 | Electroless deposition of doped noble metals and noble metal alloys A method for forming an oxidation barrier including at least partially immersing a semiconductor device structure in an electroless plating bath that includes at least one metal salt and at least one reducing agent. The reaction of the at least one metal ... | 02/17/2004 |
| 6693791 | Ferroelectric capacitor and a method for manufacturing thereof A ferroelectric capacitor including a silicon oxidation layer, a lower electrode, a ferroelectric layer and an upper electrode formed on a silicon substrate. The lower electrode having columnar crystals is made of palladium oxide. Also, the upper electrod... | 02/17/2004 |
| 6690052 | Semiconductor device having a capacitor with a multi-layer dielectric A semiconductor device for use in a memory cell includes an active matrix provided with a semiconductor substrate, a plurality of transistors formed on the semiconductor substrate and conductive plugs electrically connected to the transistors, a number of... | 02/10/2004 |
| 6690055 | Devices containing platinum-rhodium layers and methods A method of forming a rhodium-containing layer on a substrate, such as a semiconductor wafer, using complexes of the formula Ly RhYz is provided. Also provided is a chemical vapor co-deposited platinum-rhodium alloy barriers and elec... | 02/10/2004 |
| 6682974 | Fabricating capacitor of semiconductor device Disclosed is a method for fabricating a capacitor in a semiconductor device. A semiconductor substrate is provided. A bottom electrode is formed on the substrate by sequentially depositing Ru through a PECVD process and Ru through a LPCVD process on the s... | 01/27/2004 |
| 6683001 | Method for manufacturing a semiconductor device whereby degradation of surface morphology of a metal layer from thermal oxidation is suppressed A method of manufacturing a semiconductor device having a metal layer is provided in which variation of surface morphology resulting from thermal oxidation is suppressed. The metal layer is pretreated at a first temperature so that an upper surface of the... | 01/27/2004 |
| 6682972 | Methods of forming materials comprising tungsten and nitrogen In one aspect, the invention includes a method of forming a material comprising tungsten and nitrogen, comprising: a) providing a substrate; b) depositing a layer comprising tungsten and nitrogen over the substrate; and c) in a separate step from the depo... | 01/27/2004 |
| 6673668 | Method of forming capacitor of a semiconductor memory device A capacitor having a tantalum-contained-dielectric layer is formed by a fabrication method including the steps of: forming a lower electrode on a semiconductor substrate; forming a dielectric layer containing Ta element on the lower electrode; forming a f... | 01/06/2004 |
| 6674633 | Process for producing a strontium ruthenium oxide protective layer on a top electrode A method for the fabrication of a cap layer on a top electrode layer of a ferroelectric capacitor includes the steps of depositing an amorphous layer, usually made of Sr.sub.(x) Ru.sub.(y) O3, on the top electrode and then annealing the amorpho... | 01/06/2004 |
| 6670256 | Metal oxynitride capacitor barrier layer Capacitor structures for use in integrated circuits and methods of their manufacture. The capacitor structures include a bottom electrode, a top electrode and a dielectric layer interposed between the bottom electrode and the top electrode. The capacitor ... | 12/30/2003 |
| 6664583 | Metal oxynitride capacitor barrier layer Capacitor structures for use in integrated circuits and methods of their manufacture. The capacitor structures include a bottom electrode, a top electrode and a dielectric layer interposed between the bottom electrode and the top electrode. The capacitor ... | 12/16/2003 |
| 6664584 | Metal oxynitride capacitor barrier layer Capacitor structures for use in integrated circuits and methods of their manufacture. The capacitor structures include a bottom electrode, a top electrode and a dielectric layer interposed between the bottom electrode and the top electrode. The capacitor ... | 12/16/2003 |
| 6664159 | Mixed metal nitride and boride barrier layers Mixed metal aluminum nitride and boride diffusion barriers and electrodes for integrated circuits, particularly for DRAM cell capacitors. Also provided are methods for CVD deposition of Mx Aly Nz Bw alloy diffus... | 12/16/2003 |
