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| Number | Title | Issue Date |
| 7420210 | Light emitting device, method of manufacturing the same, and manufacturing apparatus therefor A light emitting device having high definition, a high aperture ratio, and high reliability is provided. The present invention achieves high definition and a high aperture ratio with a full color flat panel display using red, green, and blue color emission light by ... | 09/02/2008 |
| 7408232 | Semiconductor device and method for fabricating the same A semiconductor device of the present invention includes a plurality of lower electrodes covering the entire surfaces of a plurality of trenches formed in a first interlayer insulating film, a capacitive insulating film covering the entire surfaces of the plurality ... | 08/05/2008 |
| 7393742 | Semiconductor device having a capacitor and a fabrication method thereof In a semiconductor device having a capacitor and a method of fabricating the same, the semiconductor device comprises a semiconductor substrate and an insulating layer on the semiconductor substrate, a contact plug electrically connected to the semiconductor substra... | 07/01/2008 |
| 7381613 | Self-aligned MIM capacitor process for embedded DRAM A semiconductor device includes a group of capacitors and a trench. Each capacitor includes a first conductive material layer, a dielectric layer, and a second conductive material layer. The dielectric layer is located between the first and second conductive materia... | 06/03/2008 |
| 7358146 | Method of forming a capacitor A carbon containing masking layer is patterned to include a plurality of container openings therein having minimum feature dimensions of less than or equal to 0.20 micron. The container openings respectively have at least three peripheral corner areas which are each... | 04/15/2008 |
| 7327011 | Multi-surfaced plate-to-plate capacitor and method of forming same A plate to plate capacitor has a first plate, a second plate, and an insulating medium separating the first plate from the second plate. The first plate and the second plate are adapted and arranged to form an interlaced structure in which multiple capacitance surfa... | 02/05/2008 |
| 7321146 | DRAM memory cell and method of manufacturing the same A DRAM memory cell includes a semiconductor substrate, an interlayer dielectric having storage node contact plugs that is formed on the semiconductor substrate, and storage node electrodes that are formed on the interlayer dielectric to contact the storage node cont... | 01/22/2008 |
| 7314795 | Methods of forming electronic devices including electrodes with insulating spacers thereon An electronic device may include a substrate, a conductive layer on the substrate, and an insulating spacer. The conductive electrode may have an electrode wall extending away from the substrate. The insulating spacer may be provided on the electrode wall with porti... | 01/01/2008 |
| 7279728 | Variable capacitance device with high accuracy A capacitance device includes a dielectric film, the first electrode and the second electrode. One of the two electrodes is divided into a plurality of electrode portions. Each of the divided electrode portions is connected with each other through switching transist... | 10/09/2007 |
| 7276409 | Method of forming a capacitor A carbon containing masking layer is patterned to include a plurality of container openings therein having minimum feature dimensions of less than or equal to 0.20 micron. The container openings respectively have at least three peripheral corner areas which are each... | 10/02/2007 |
| 7273778 | Method of electroplating a substance over a semiconductor substrate The invention includes methods of electrochemically treating semiconductor substrates. The invention includes a method of electroplating a substance. A substrate having defined first and second regions is provided. The first and second regions can be defined by a si... | 09/25/2007 |
| 7223661 | Method of manufacturing semiconductor device The method includes forming an isolation film on a silicon substrate to define an active region; forming an antireflective film on an entire surface of the substrate containing the isolation film; forming a photosensitive film pattern on the antireflective film whil... | 05/29/2007 |
| 7179716 | Method of forming a metal-containing layer over selected regions of a semiconductor substrate The invention includes methods of electrochemically treating semiconductor substrates. The invention includes a method of electroplating a substance. A substrate having defined first and second regions is provided. The first and second regions can be defined by a si... | 02/20/2007 |
| 7135955 | Electrical component with a negative temperature coefficient An electrical component includes a base having at least a first ceramic section and a second ceramic section. The first ceramic section and the second ceramic section include different materials, which have resistances with negative temperature coefficients. The com... | 11/14/2006 |
| 7098134 | Method for fabricating semiconductor device A method of fabricating a semiconductor device is provided, by which oxide on a Cu surface after via-etch can be removed using Hf (hafnium) as a barrier material. The method includes the steps of forming a Cu line in at least one protective insulating layer on a sub... | 08/29/2006 |
| 6703272 | Methods of forming spaced conductive regions, and methods of forming capacitor constructions The invention includes a method of forming spaced conductive regions. A construction is formed which includes a first electrically conductive material over a semiconductor substrate. The construction also includes openings extending through the first elec... | 03/09/2004 |
| 6700153 | One-cylinder stack capacitor and method for fabricating the same An etch stop layer is formed over a surface of an interlayer insulating layer and over a surface of a conductive plug extending at a depth from the surface of the interlayer insulating layer. A lower mold layer is deposited over the etch stop layer, and a... | 03/02/2004 |
| 6696336 | Double sided container process used during the manufacture of a semiconductor device A method used during the formation of a semiconductor device comprises providing a wafer substrate assembly comprising a plurality of digit line plug contact pads and capacitor storage cell contact pads which contact a semiconductor wafer. A dielectric la... | 02/24/2004 |
| 6696338 | Method for forming ruthenium storage node of semiconductor device Provided is a method for fabricating a capacitor of a semiconductor; and, more particularly, to a method for forming a Ru storage node of a capacitor that can form a stable storage node. The method includes the steps of: a method for forming a ruthenium (... | 02/24/2004 |
| 6696713 | Semiconductor memory provided with vertical transistor and method of manufacturing the same There is proposed a vertical cell transfer transistor comprising a channel region constituted by a monocrystalline silicon layer which is formed by way of epitaxial growth, source-drain regions constituted by n-type diffusion regions which are formed over... | 02/24/2004 |
| 6696721 | Semiconductor device having a three-dimensional capacitor such as a stack-type capacitor A plurality of storage node electrodes are formed on a semiconductor substrate. A capacitor insulating film is formed on the storage node electrodes. A plate electrode, facing the storage node electrodes, is formed on the capacitor insulating film. A cavi... | 02/24/2004 |
| 6693002 | Semiconductor device and its manufacture A semiconductor device having: a substrate having a first area and a second area surrounding the first area; an insulating film formed in the second area; electrodes formed above the surface of the substrate in the first area; dielectric films formed abov... | 02/17/2004 |
| 6693319 | Container capacitor structure and method of formation thereof Disclosed is a container capacitor structure and method of constructing it. An etch mask and etch are used to expose portions of an exterior surface of electrode ("bottom electrodes") of the container capacitor structure. The etch provides a recess betwee... | 02/17/2004 |
| 6693007 | Methods of utilizing a sacrificial layer during formation of a capacitor The invention includes a method of forming a capacitor electrode. A sacrificial material sidewall is provided to extend at least partially around an opening. A first silicon-containing material is formed within the opening to partially fill the opening, a... | 02/17/2004 |
| 6693015 | Method for improved processing and etchback of a container capacitor A capacitor having improved size for enhanced capacitance and a method of forming the same are disclosed. In one embodiment, the capacitor is a stacked container capacitor used in a dynamic random access memory circuit. The capacitor provides a capacitor ... | 02/17/2004 |
| 6690054 | Capacitor A method for fabricating a capacitor comprises the steps of: forming a lower electrode of a metal over a substrate; forming a capacitor dielectric film of an oxide dielectric film on the lower electrode; depositing a metal film on the capacitor dielectric... | 02/10/2004 |
| 6686621 | Semiconductor device A semiconductor device which includes a capacitor wherein the capacitance of the capacitor can be prevented from being lowered even in the case that the capacitor is miniaturized. A core insulating film having the core of the capacitor formed above a semi... | 02/03/2004 |
| 6673670 | Method of forming a capacitor structure and DRAM circuitry having a capacitor structure including interior areas spaced apart from one another in a non-overlapping relationship Capacitors, DRAM circuitry, and methods of forming the same are described. In one embodiment, a capacitor comprises a first container which is joined with a substrate node location and has an opening defining a first interior area. A second container is j... | 01/06/2004 |
| 6670663 | DRAM cell capacitor and manufacturing method thereof A method for manufacturing a cell capacitor includes a step of forming an upper electrode and a trench for the lower electrode simultaneously in a single mask step. Further steps for manufacturing a cell capacitor includes forming a storage node contact b... | 12/30/2003 |
| 6667209 | Methods for forming semiconductor device capacitors that include an adhesive spacer that ensures stable operation In a method for forming capacitors of semiconductor devices, a contact plug penetrating an interlayer dielectric (ILD) is formed on a semiconductor substrate. A supporting layer, an etch stop layer, and a molding layer are sequentially formed on the semic... | 12/23/2003 |
| 6664157 | Semiconductor integrated circuit device and the method of producing the same Plug electrodes of silicon are formed so as to be buried in through holes in a first insulating film, the plug electrodes being electrically connected to the source and drain regions of a MISFET on the main surface of a semiconductor substrate. Then, a se... | 12/16/2003 |
| 6661051 | Container capacitor structure and method of formation thereof Disclosed is a container capacitor structure and method of constructing it. An etch mask and etch are used to expose portions of an exterior surface of electrode ("bottom electrodes") of the container capacitor structure. The etch provides a recess betwee... | 12/09/2003 |
| 6660580 | Capacitor of an integrated circuit device and method of manufacturing the same The present invention relates to a capacitor of a semiconductor memory cell and a method of manufacturing the same wherein a capacitor includes a first insulation layer having a buried contact hole, formed on a semiconductor substrate, and a buried contac... | 12/09/2003 |
| 6660610 | Devices having improved capacitance and methods of their fabrication A capacitor formed by a process using only two deposition steps and a dielectric formed by oxidizing a metal layer in an electrolytic solution. The capacitor has first and second conductive plates and a dielectric is formed from the first conductive plate... | 12/09/2003 |
| 6661049 | Microelectronic capacitor structure embedded within microelectronic isolation region Within a method for fabricating a capacitor structure, and a capacitor structure fabricated employing the method, there is formed within an isolation region adjoining an active region of a semiconductor substrate a laterally asymmetric trench which leaves... | 12/09/2003 |
| 6656788 | Method for manufacturing a capacitor for semiconductor devices A capacitor for a semiconductor device is manufactured by forming a lower structure on a semiconductor device, forming a lower electrode on the lower structure of the semiconductor device, forming a dielectric thin film by depositing an amorphous TaON fil... | 12/02/2003 |
| 6656790 | Method for manufacturing a semiconductor device including storage nodes of capacitor A semiconductor device including storage nodes of a capacitor and a method for manufacturing the same are provided. Bit lines are formed on a semiconductor substrate, and protection layers are formed to cover and protect the bit lines. Conductive contact ... | 12/02/2003 |
| 6656785 | MIM process for logic-based embedded RAM A method for forming a metal-interlayer-metal (MIM) device in an embedded memory device, including semiconductor devices thereof. An MIM device can be formed upon a semiconductor substrate utilizing no more than one additional photo mask layer prior to th... | 12/02/2003 |
| 6653199 | Method of forming inside rough and outside smooth HSG electrodes and capacitor structure A container capacitor and method of forming the container capacitor are provided. The container capacitor comprises a lower electrode fabricated by forming a layer of doped polysilicon within a container in an insulative layer disposed on a substrate; for... | 11/25/2003 |
| 6653230 | Semiconductor device having concave electrode and convex electrode and method of manufacturing thereof It is intended to enable simultaneous formation of concave capacitor storage electrodes and a convex bit contact plug electrode and thereby makes it possible to reduce spaces of margins for alignment errors by decreasing the number of lithography steps. G... | 11/25/2003 |
