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| Number | Title | Issue Date |
| 7442633 | Decoupling capacitor for high frequency noise immunity Systems and methods are provided for an on-chip decoupling device and method. One aspect of the present subject matter is a capacitor. One embodiment of the capacitor includes a substrate, a high K dielectric layer doped with nano crystals disposed on the substrate,... | 10/28/2008 |
| 7410510 | Process of producing activated carbon for electrode of electric double layer capacitor A process for producing an activated carbon for an electrode of an electric double-layer capacitor, includes a step of subjecting a carbonized material to an alkali activating treatment, wherein the carbonized material has an average true specific gravity of 1.450 t... | 08/12/2008 |
| 7407890 | Patterning sub-lithographic features with variable widths A method of processing a substrate of a device comprises the as following steps. Form a cap layer over the substrate. Form a dummy layer over the cap layer, the cap layer having a top surface. Etch the dummy layer forming patterned dummy elements of variable widths ... | 08/05/2008 |
| 7393742 | Semiconductor device having a capacitor and a fabrication method thereof In a semiconductor device having a capacitor and a method of fabricating the same, the semiconductor device comprises a semiconductor substrate and an insulating layer on the semiconductor substrate, a contact plug electrically connected to the semiconductor substra... | 07/01/2008 |
| 7374586 | Solid electrolytic capacitor, fabrication method thereof, and coupling agent utilizing in the same A solid electrolytic capacitor, fabrication method, and coupling agent utilized in the same. The capacitor includes a valve metal layer, an oxide dielectric layer on at least a part of the surface of the valve metal layer, a coupling layer having a molecular chain w... | 05/20/2008 |
| 7276409 | Method of forming a capacitor A carbon containing masking layer is patterned to include a plurality of container openings therein having minimum feature dimensions of less than or equal to 0.20 micron. The container openings respectively have at least three peripheral corner areas which are each... | 10/02/2007 |
| 7273814 | Method for forming a ruthenium metal layer on a patterned substrate A method for forming a ruthenium metal layer includes providing a patterned substrate in a process chamber of a deposition system, where the patterned substrate contains one or more vias or trenches, or combinations thereof, depositing a first ruthenium metal layer ... | 09/25/2007 |
| 7271083 | One-transistor random access memory technology compatible with metal gate process One-transistor RAM technology compatible with a metal gate process fabricates a metal gate electrode formed of the same metal material as a top electrode of a MIM capacitor embedded isolation structure. A gate dielectric layer is formed of the same high-k dielectric... | 09/18/2007 |
| 7238608 | Semiconductor device and manufacturing method thereof A semiconductor device comprises a first insulating film formed over a semiconductor substrate, a second insulating film formed on the first insulating film, a contact plug made of a conductive material vertically penetrating the first and second insulating films an... | 07/03/2007 |
| 7199445 | Integrated capacitor on packaging substrate An integrated capacitor on a packaging substrate. The integrated capacitor comprises a conductor plane, a first dielectric layer and a signal transmission layer. The conductor plane has an extrusion layer of a first thickness. The first extrusion layer and the condu... | 04/03/2007 |
| 6703657 | DRAM cell having electrode with protection layer A DRAM cell is provided, along with a method for fabricating such a DRAM cell. A protection layer pattern is formed to cover a common drain region of first and second access transistors. Storage node holes are then formed to expose each source region of t... | 03/09/2004 |
| 6699766 | Method of fabricating an integral capacitor and gate transistor having nitride and oxide polish stop layers using chemical mechanical polishing elimination A system, apparatus and/or method is provided for fabricating an integrated capacitor during the fabrication of a transistor employing chemical mechanical polishing of a gate electrode of the transistor. Components of the integrated capacitor, particularl... | 03/02/2004 |
| 6696721 | Semiconductor device having a three-dimensional capacitor such as a stack-type capacitor A plurality of storage node electrodes are formed on a semiconductor substrate. A capacitor insulating film is formed on the storage node electrodes. A plate electrode, facing the storage node electrodes, is formed on the capacitor insulating film. A cavi... | 02/24/2004 |
| 6696715 | Method and structure for reducing leakage current in capacitors A method of forming a capacitor with reduced leakage current on a substrate in a semiconductor device is set forth. A first layer of a conductive material is formed over the substrate, and a second layer of a dielectric is formed over the first layer. The... | 02/24/2004 |
| 6696716 | Structures and methods for enhancing capacitors in integrated ciruits Systems, devices, structures, and methods are described that inhibit dielectric degradation in the presence of contaminants. An enhanced capacitor in a dynamic random access memory cell is discussed. The enhanced capacitor includes a first electrode, a di... | 02/24/2004 |
| 6696718 | Capacitor having an electrode formed from a transition metal or a conductive metal-oxide, and method of forming same A capacitor including a first electrode selected from a group consisting of transition metals, conductive metal-oxides, alloys thereof, and combinations thereof. The capacitor also includes a second electrode and a dielectric between the first and second ... | 02/24/2004 |
| 6693792 | Semiconductor integrated circuits and fabricating method thereof A capacitor having an equivalent thickness of 3.0 nm or less, with a sufficient static capacitance and less leakage current in a reduced size, constituted by stacking an interfacial film 21 having a physical thickness of 2.5 nm or more for suppressing tun... | 02/17/2004 |
| 6690052 | Semiconductor device having a capacitor with a multi-layer dielectric A semiconductor device for use in a memory cell includes an active matrix provided with a semiconductor substrate, a plurality of transistors formed on the semiconductor substrate and conductive plugs electrically connected to the transistors, a number of... | 02/10/2004 |
| 6689657 | Method of forming a capacitor A method of forming a capacitor. The method includes forming a substrate assembly having an interconnect recessed therein, and forming a first electrode on the interconnect. The first electrode includes a material selected from the group consisting of tra... | 02/10/2004 |
| 6689623 | Method for forming a capacitor The disclosure provides a capacitor including a lower electrode, a surface of which can be formed of Pt, and an inner part of which can be formed of metal having good antioxidant properties. The inner part of the lower electrode can be formed by depositin... | 02/10/2004 |
| 6677217 | Methods for manufacturing integrated circuit metal-insulator-metal capacitors including hemispherical grain lumps The effective area of a MIM capacitor is increased by forming a lower electrode that includes hemispherical grain lumps. The hemispherical grain lumps are formed by heat-treating a metal layer in an oxygen and/or nitrogen atmosphere, thus oxidizing the su... | 01/13/2004 |
| 6667505 | Semiconductor device having a plurality of capacitors aligned at regular intervals A semiconductor device includes a capacitor formed to have an approximately elliptical cross-sectional shape and extending upwards from upper surface of each said storage node contact. When an arrangement of capacitors is seen vertically from above, rows ... | 12/23/2003 |
| 6667502 | Structurally-stabilized capacitors and method of making of same Structurally-stable, tall capacitors having unique three-dimensional architectures for semiconductor devices are disclosed. The capacitors include monolithically-fabricated upright microstructures, i.e., those having large height/width (H/W) ratios, which... | 12/23/2003 |
| 6667208 | Method for manufacturing a capacitor lower electrode over a transistor and a bit line corresponding to a cell area of a semiconductor device Disclosed is method for manufacturing a semiconductor device, wherein a photosensitive layer and a natural oxidation layer on a cell area and a peripheral circuit area are removed by dry etching while a capacitor of a DRAM device is manufactured, and a po... | 12/23/2003 |
| 6664159 | Mixed metal nitride and boride barrier layers Mixed metal aluminum nitride and boride diffusion barriers and electrodes for integrated circuits, particularly for DRAM cell capacitors. Also provided are methods for CVD deposition of Mx Aly Nz Bw alloy diffus... | 12/16/2003 |
| 6661048 | Semiconductor memory device having self-aligned wiring conductor According to the present invention, an overlay margin is secured for matching a wiring electrode 11 with a storage electrode 15 of a capacitor at their point of contact and the required area for a memory cell can be decreased by placing the plug electrode... | 12/09/2003 |
| 6653676 | Integrated circuit capacitor The present invention discloses a novel integrated circuit capacitor and a method of forming such a capacitor. The capacitor formation begins with a base electrode 18 adjacent an insulating region 26. This base electrode 18 can comprise either polysilicon... | 11/25/2003 |
| 6653241 | Methods of forming protective segments of material, and etch stops The invention encompasses a method of forming a protective segment of material. A plurality of at least three conductive lines are provided over a semiconductor substrate. A material is formed over the conductive lines, and a patterned masking layer is fo... | 11/25/2003 |
| 6649466 | Method of forming DRAM circuitry In part, disclosed are semiconductor processing methods, methods of depositing a tungsten comprising layer over a substrate, methods of depositing a tungsten nitride comprising layer over a substrate, methods of depositing a tungsten silicide comprising l... | 11/18/2003 |
| 6649483 | Method for fabricating a capacitor configuration A method for fabricating a capacitor configuration in particular an FeRAM memory device includes the step of filling intermediate regions, which remain free after the formation of a capacitor device on a surface of a substrate, with at least one electrica... | 11/18/2003 |
| 6649536 | Method for fabricating capacitor of semiconductor device A method for fabricating a capacitor of a semiconductor device on a semiconductor substrate can includes an insulating film formed on the substrate. A plug is formed in the insulating film, the plug electrically connected with the semiconductor substrate.... | 11/18/2003 |
| 6649959 | Method for increasing a very-large-scale-integrated (VLSI) capacitor size on bulk silicon and silicon-on-insulator (SOI) wafers and structure formed thereby A method of forming a semiconductor device, includes forming at least one conductive island having a predetermined sidewall angle in a conductive substrate, forming a dielectric material over the at least one island, forming a conductive material over the... | 11/18/2003 |
| 6635561 | Semiconductor device, and method of manufacturing the semiconductor device An attempt is made to achieve an upward leap in the capacitance of a capacitor of MIM structure and further improvements in the reliability of a semiconductor device. A method of manufacturing a semiconductor device has a step of forming an amorphous sili... | 10/21/2003 |
| 6632744 | Manufacturing method of semiconductor integrated circuit device Densely disposed patterns constituting a semiconductor integrated circuit device are divided into a first mask pattern and a second mask pattern 28B such that a phase shifter S can be disposed, and a predetermined pattern is transferred on a semiconductor... | 10/14/2003 |
| 6633062 | Semiconductor device incorporated therein high K capacitor dielectric and method for the manufacture thereof A semiconductor device for use in a memory cell includes an active matrix an active matrix provided with a semiconductor substrate, a plurality of transistors formed on the semiconductor substrate and conductive plugs electrically connected to the transis... | 10/14/2003 |
| 6624525 | Contact plug in capacitor device A semiconductor device comprises a first insulating film formed over a semiconductor substrate, a second insulating film formed on the first insulating film, a contact plug made of a conductive material vertically penetrating the first and second insulati... | 09/23/2003 |
| 6624040 | Self-integrated vertical MIM capacitor in the dual damascene process A method for fabricating an increased capacitance metal-insulator-metal capacitor using an integrated copper dual damascene process is described. A first dual damascene opening and a pair of second dual damascene openings are provided in a first dielectri... | 09/23/2003 |
| 6620685 | Method for fabricating of semiconductor memory device having a metal plug or a landing pad Method of fabricating a semiconductor memory device includes the steps of: forming a gate electrode on a silicon substrate; forming a first inter-layer dielectric layer (ILD1) on the silicon substrate; forming a cell pad poly between the gate electrodes i... | 09/16/2003 |
| 6620701 | Method of fabricating a metal-insulator-metal (MIM) capacitor A method of manufacturing a metal-insulator-metal capacitor (MIMCap) (36) including first conductive lines (15), capacitor dielectric (26) and second conductive lines (28), the MIMCap (36) including horizontal capacitive portions (32) and vertical capacit... | 09/16/2003 |
| 6617250 | Methods of depositing a layer comprising tungsten and methods of forming a transistor gate line In part, disclosed are semiconductor processing methods, methods of depositing a tungsten comprising layer over a substrate, methods of depositing a tungsten nitride comprising layer over a substrate, methods of depositing a tungsten silicide comprising l... | 09/09/2003 |
