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| Number | Title | Issue Date |
| 7407890 | Patterning sub-lithographic features with variable widths A method of processing a substrate of a device comprises the as following steps. Form a cap layer over the substrate. Form a dummy layer over the cap layer, the cap layer having a top surface. Etch the dummy layer forming patterned dummy elements of variable widths ... | 08/05/2008 |
| 7338887 | Plasma control method and plasma control apparatus A method that controls the distribution of plasma generated in a vacuum chamber, for example, as part of a plasma thin film deposition or plasma etching process. For thin film deposition, the method serves to minimize variations in film thickness caused by the varia... | 03/04/2008 |
| 7332425 | Simultaneous deposition and etch process for barrier layer formation in microelectronic device interconnects The present invention provides a method of forming a interconnect barrier layer 100. In the method, physical vapor deposition of barrier material 200 is performed within an opening 140 located in a dielectric layer 135 of a substrate 1... | 02/19/2008 |
| 7326647 | Dry etching process to form a conductive layer within an opening without use of a mask during the formation of a semiconductor device A method for use in fabrication of a semiconductor device comprises forming a conformal conductive layer over a planarized surface of a dielectric layer, and within an opening formed in the dielectric layer. The opening will typically have an aspect ratio of about 4... | 02/05/2008 |
| 7320924 | Method of producing a chip-type solid electrolytic capacitor A chip-type solid electrolytic capacitor comprises capacitor elements. A cathode terminal comprising a plate-like conductor is interposed between cathode layers of the capacitor elements. The capacitor elements are bonded to each other by a bonding agent such as a s... | 01/22/2008 |
| 7294566 | Method for forming wiring pattern, method for manufacturing device, device, electro-optic apparatus, and electronic equipment A method for forming a wiring pattern according to an aspect of the invention forms a wiring pattern in a certain area on a substrate by using a droplet discharge technique, and includes forming a bank surrounding the certain area on the substrate; discharging a fir... | 11/13/2007 |
| 7288482 | Silicon nitride etching methods Methods of etching silicon nitride material, and more particularly, etching nitride selective to silicon dioxide or silicide, are disclosed. The methods include exposing a substrate having silicon nitride thereon to a plasma including at least one fluorohydrocarbon ... | 10/30/2007 |
| 7273816 | Methods for removal of organic materials The invention includes methods of forming capacitor structures and removing organic material. An organic material, such as a photoresist, is disposed on a substrate. The organic material is contacted with a chemical mechanical polishing pad and a polishing fluid to ... | 09/25/2007 |
| 7262108 | Methods for forming resistors for integrated circuit devices Methods of forming an integrated circuit device may include forming an insulating layer on an integrated circuit substrate, forming a first conductive layer on the insulating layer, and forming a second conductive layer on the first conductive layer so that the firs... | 08/28/2007 |
| 7256107 | Damascene process for use in fabricating semiconductor structures having micro/nano gaps In fabricating a microelectromechanical structure (MEMS), a method of forming a narrow gap in the MEMS includes a) depositing a layer of sacrificial material on the surface of a supporting substrate, b) photoresist masking and at least partially etching the sacrific... | 08/14/2007 |
| 7247562 | Semiconductor element, semiconductor device and methods for manufacturing thereof The present invention provides a method of manufacturing a semiconductor element having a miniaturized structure and a semiconductor device in which the semiconductor element having a miniaturized structure is integrated highly, by overcoming reduction of the yield ... | 07/24/2007 |
| 7241639 | Color filter, manufacturing method thereof, electrooptical device and electronic equipment A method for manufacturing a color filter having a picture element part surrounded by a partition wall and provided in the plural number on a substrate including a step of forming the partition wall that has a lyophobic quality on the substrate, step of forming a ly... | 07/10/2007 |
| 7217987 | Semiconductor device and manufacturing the same A semiconductor device includes a transmission power amplifier having cascaded MOSFET amplification stages disposed over a main surface of a semiconductor substrate. A CMOSFET control circuit controls the amplification stages. A first capacitor is also provided havi... | 05/15/2007 |
| 7205226 | Sacrificial layer for protection during trench etch A method for etching a trench is provided. The method initiates with providing a substrate having a patterned feature. The method includes alternating between deposition of a protective layer onto inner surfaces of the patterned feature and etching the trench into t... | 04/17/2007 |
| 7172960 | Multi-layer film stack for extinction of substrate reflections during patterning A method including introducing a dielectric layer over a substrate between an interconnection line and the substrate, the dielectric layer comprising a plurality of alternating material layers; and patterning an interconnection to the substrate. An apparatus compris... | 02/06/2007 |
| 6638818 | Method of fabricating a dynamic random access memory with increased capacitance A method for forming a dynamic random access memory with increased capacitance includes preparing (36) ultra-fine particles in a microemulsion. The particles are deposited (38) on the lower electrode layer of the memory cell. A micro-villus pattern is the... | 10/28/2003 |
| 6451650 | Low thermal budget method for forming MIM capacitor The next generation of DRAM capacitors will require base electrodes having large effective surface areas and, additionally, will need to be manufactured with the expenditure of minimal energy (low thermal budgets). This is achieved in the present inventio... | 09/17/2002 |
| 6417066 | Method of forming a DRAM capacitor structure including increasing the surface area using a discrete silicon mask A process for fabricating a fin type, cylindrical shaped, DRAM capacitor structure, with increased surface area, has been developed. The process features forming a non-continuous layer of discrete regions of silicon, on the surface of a capacitor opening,... | 07/09/2002 |
| 6407423 | Staggered-edge capacitor electrode A capacitor electrode and method of making having increased surface area because of the presence of pits in the side walls of the electrode thus increasing the capacitance of the capacitor while still maintaining the packing density of the integrated circ... | 06/18/2002 |
| 6403440 | Method for fabricating a stacked capacitor in a semiconductor configuration, and stacked capacitor fabricated by this method A method for fabricating a stacked capacitor in a semiconductor configuration, in which one electrode of the stacked capacitor is connected via a terminal region of a first conductivity type to a source or drain of a transistor. The semiconductor configur... | 06/11/2002 |
| 6373092 | Staggered-edge capacitor electrode A capacitor electrode and method of making having increased surface area because of the presence of pits in the side walls of the electrode thus increasing the capacitance of the capacitor while still maintaining the packing density of the integrated circ... | 04/16/2002 |
| 6078493 | Fin-shaped capacitor A capacitor includes a first electrode in which a first material layer composed of a conductive oxide and a second material layer formed of a conductive material are alternately stacked. The side surface of the second material layer is recessed to form a ... | 06/20/2000 |
| 6008515 | Stacked capacitor having improved charge storage capacity A method of forming a capacitor that has improved charge storage capacity in a high density memory device that has shallow trench isolation regions and a capacitor produced by the method are provided. The method includes the step of forming an oxide space... | 12/28/1999 |
| 5834357 | Fabricating method of making a fin shaped capacitor A capacitor includes a first electrode in which a first material layer composed of a conductive oxide and a second material layer formed of a conductive material are alternately stacked. The side surface of the second material layer is recessed to form a ... | 11/10/1998 |
| 5830807 | Successive dry etching of alternating laminate A laminated structure formed by alternately laminating a silicon film and a silicon oxide film is successively etched in the same chamber. Two groups are selected from groups A, B, and C, the group A including NF3, CF4, and SF6 | 11/03/1998 |
| 5827783 | Stacked capacitor having improved charge storage capacity A method of forming a capacitor that has improved charge storage capacity in a high density memory device that has shallow trench isolation regions and a capacitor produced by the method are provided. The method includes the step of forming an oxide space... | 10/27/1998 |
| 5476807 | Method for forming fine patterns in a semiconductor device A method for forming a fine pattern, e.g., for forming the storage electrodes of the capacitors of the memory cells of semiconductor memory devices, which includes the steps of depositing a mask layer on the layer to be patterned, depositing a photoresist... | 12/19/1995 |
| 5350707 | Method for making a capacitor having an electrode surface with a plurality of trenches formed therein The present invention provides a semiconductor device having a capacitor that is formed through: a first step of forming a polysilicon layer having a rough surface after a nonconductive layer is applied to a base substrate; a second step of etching back a... | 09/27/1994 |
| 5240871 | Corrugated storage contact capacitor and method for forming a corrugated storage contact capacitor A dynamic random access memory (DRAM) cell having a corrugated storage contact capacitor for enhancing capacitance. A noncritical alignment is effected between the substrate contact area and the lower capacitor plate by using an etch stop layer to protect... | 08/31/1993 |
| 5160987 | Three-dimensional semiconductor structures formed from planar layers Three-dimensional semiconductor structures are taught in which various device types are formed from a plurality of planar layers on a substrate. The major process steps include the formation of a plurality of alternating layers of material, including semi... | 11/03/1992 |
