...that two musicians were responsible for the invention of color print film? Fascinated by photography, Leopold Godowsky and Leopold Mannes worked together to produce an easy-to-use, practical color film. They worked full time as music teachers and gave concerts while experimenting during their off hours in Mannes' kitchen. Their success earned them full-time, well-paying jobs at Kodak and their efforts resulted in Kodachrome film, which was introduced in 1935.
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| Number | Title | Issue Date |
| 7422960 | Method of forming gate arrays on a partial SOI substrate The invention includes methods for utilizing partial silicon-on-insulator (SOI) technology in combination with fin field effect transistor (finFET) technology to form transistors particularly suitable for utilization in dynamic random access memory (DRAM) arrays. Th... | 09/09/2008 |
| 7413970 | Process of forming an electronic device including a semiconductor fin An electronic device can include a semiconductor fin overlying an insulating layer. The electronic device can also include a semiconductor layer overlying the semiconductor fin. The semiconductor layer can have a first portion and a second portion that are spaced-ap... | 08/19/2008 |
| 7394128 | Semiconductor memory device with channel regions along sidewalls of fins A semiconductor memory (26) having a plurality of memory cells (25), the semiconductor memory (26) having a substrate (1), at least one wordline (2) and first (3) and second lines (4). Each memory cell (25) of ... | 07/01/2008 |
| 7368354 | Planar substrate devices integrated with FinFETs and method of manufacture A planar substrate device integrated with fin field effect transistors (FinFETs) and a method of manufacture comprises a silicon-on-insulator (SOI) wafer comprising a substrate; a buried insulator layer over the substrate; and a semiconductor layer over the buried i... | 05/06/2008 |
| 7358122 | High performance FET devices and methods thereof Structure and methods of fabrication are disclosed for an enhanced FET devices in which dopant impurities are prevented from diffusing through the gate insulator. The structure comprises a Si:C, or SiGe:C, layer which is sandwiched between the gate insulator and a l... | 04/15/2008 |
| 7341916 | Self-aligned nanometer-level transistor defined without lithography A field effect transistor (FET) device structure and method for forming FETs for scaled semiconductor devices. Specifically, FinFET devices are fabricated from silicon-on-insulator (SOI) wafers in a highly uniform and reproducible manner. The method facilitates form... | 03/11/2008 |
| 7326608 | Fin field effect transistor and method of manufacturing the same In a fin field effect transistor (FET), an active pattern protrudes in a vertical direction from a substrate and extends across the substrate in a first horizontal direction. A first silicon nitride pattern is formed on the active pattern, and a first oxide pattern ... | 02/05/2008 |
| 7323389 | Method of forming a FINFET structure A semiconductor device (10) such as a FinFET transistor of small dimensions is formed in a process that permits substantially uniform ion implanting (32) of a source (14) electrode and a drain (16) electrode adjacent to an intervening gat... | 01/29/2008 |
| 7288805 | Double gate isolation A double-gated fin-type field effect transistor (FinFET) structure has electrically isolated gates. In a method for manufacturing the FinFET structure, a fin, having a gate dielectric on each sidewall corresponding to the central channel region, is formed over a bur... | 10/30/2007 |
| 7230287 | Chevron CMOS trigate structure Disclosed herein is a structure with two different type tri-gate MOSFETs formed on the same substrate. Each MOSFET comprises a fin with optimal mobility for the particular type of MOSFET. Due to the processes used to form fins with different crystalline orientations... | 06/12/2007 |
| 7220628 | Semiconductor device and manufacturing method thereof, and gate electrode and manufacturing method thereof A method for manufacturing a semiconductor device includes a step of forming a layer where a gate electrode aperture is to be formed including at least one ultraviolet resist layer on the surface where a gate electrode is to be formed, and forming a gate electrode a... | 05/22/2007 |
| 7094660 | Method of manufacturing trench capacitor utilizing stabilizing member to support adjacent storage electrodes A semiconductor device has a stabilizing member that encloses an upper portion of a storage electrode to improve structural stability. A dielectric layer and a plate electrode are successively formed on the storage electrode including a stabilizing member. Since the... | 08/22/2006 |
| 6396097 | Semiconductor device including capacitor with improved bottom electrode A method for fabricating a bottom electrode structure for a semiconductor capacitor. The method according to the present invention includes providing an interlayer insulating layer having a conductive plug formed therein. A first bottom electrode layer is... | 05/28/2002 |
| 6373084 | Shared length cell for improved capacitance A container capacitor having an elongated storage electrode for enhanced capacitance in a dynamic random access memory circuit. The electrode is preferably twice the length of the typical cell and may be coated with hemispherical-grain polysilicon to furt... | 04/16/2002 |
| 6333240 | Method of spacing a capacitor from a contact site Disclosed is a container capacitor structure and method of constructing it. An etch mask and etch are used to expose portions of an exterior surface of electrode ("bottom electrodes") of the container capacitor structure. The etch provides a recess betwee... | 12/25/2001 |
| 6329263 | Method of forming a container capacitor structure Disclosed is a container capacitor structure and method of constructing it. An etch mask and etch are used to expose portions of an exterior surface of electrode ("bottom electrodes") of the container capacitor structure. The etch provides a recess betwee... | 12/11/2001 |
| 6281091 | Container capacitor structure and method of formation thereof Disclosed is a container capacitor structure and method of constructing it. An etch mask and etch are used to expose portions of an exterior surface of electrode ("bottom electrodes") of the container capacitor structure. The etch provides a recess betwee... | 08/28/2001 |
| 6190990 | Method for manufacturing the storage node of a capacitor on a semiconductor wafer The present invention provides a new method which increases the surface area of the storage node of the capacitor, the method comprising: (1) Forming a photo resistor layer with a circular hole on the surface of the semiconductor wafer; (2) Using a wet is... | 02/20/2001 |
| 6146964 | Method of manufacturing a semiconductor device having a fin type capacitor electrode The method according to this invention, of manufacturing a semiconductor device includes forming a polysilicon layer on a silicon substrate, forming a first resist pattern on the polysilicon layer, introducing impurity ions into the polysilicon layer with... | 11/14/2000 |
| 6146961 | Processing methods of forming a capacitor Capacitors and methods of forming capacitors are described. According to one implementation, a capacitor opening is formed over a substrate node location. Electrically conductive material is subsequently formed within the capacitor opening and makes an el... | 11/14/2000 |
| 6140177 | Process of forming a semiconductor capacitor including forming a hemispherical grain statistical mask with silicon and germanium For manufacturing a capacitor that is essentially suited for DRAM arrangements, column structures that form an electrode of the capacitor are etched upon employment of a statistical mask that is produced without lithographic steps by nucleus formation of ... | 10/31/2000 |
| 6133091 | Method of fabricating a lower electrode of capacitor A method of fabricating a lower electrode of a capacitor. A sacrificial multilayer is formed on a semiconductor layer. The sacrificial multi-layer is a stack of alternating first and second sacrificial layers. A patterned first mask layer having a first o... | 10/17/2000 |
| 6100129 | Method for making fin-trench structured DRAM capacitor A method for manufacturing a fin-trench capacitor is disclosed. The method comprises the steps of: forming a plurality of alternating oxide and nitride layers including a top oxide layer, wherein said nitride layers are sandwiched between said oxide layer... | 08/08/2000 |
| 6096620 | Method of fabricating dynamic random access memory capacitor A method of fabricating a capacitor. Isolation layers and conductive layers are formed alternately on a dielectric layer on a substrate. The conductive layers and the isolation layers are patterned to form an opening to expose a conductive region of the s... | 08/01/2000 |
| 6083790 | Method for making y-shaped multi-fin stacked capacitors for dynamic random access memory cells An array of DRAM cells having Y-shaped multi-fin stacked capacitors with increased capacitance is achieved. A planar first insulating layer is formed over the semi-conductor devices on the substrate. Polycide bit lines are formed on the first insulating l... | 07/04/2000 |
| 6071774 | Method for forming a capacitor with a multiple pillar structure The present invention provides a method for fabricating a multiple pillar shaped capacitor which has pillars of a smaller dimension than the resolution of the photolithography tool. The invention has two embodiments for forming the pillars and third embod... | 06/06/2000 |
| 5998250 | Compound electrode stack capacitor This invention is directed to a semiconductor memory device including a storage element comprising a ferroelectric material or a capacitor dielectric material between a top (plate) electrode and a bottom (stack) electrode. In particular, the invention per... | 12/07/1999 |
| 5981992 | Mechanical supports for very thin stacked capacitor plates A stacked capacitor having very thin fins and subminimum dimension supports for the fins is described. The capacitor includes a stack of conductive layers on a substrate. A plurality of subminimum dimension trenches are formed in the stack and a columnar ... | 11/09/1999 |
| 5930640 | Mechanical supports for very thin stacked capacitor plates A stacked capacitor having very thin fins and subminimum dimension supports for the fins is described. The capacitor includes a stack of conductive layers on a substrate. A plurality of subminimum dimension trenches are formed in the stack and a columnar ... | 07/27/1999 |
| 5869861 | Coaxial capacitor for DRAM memory cell A DRAM capacitor is formed over a device with FOX regions and device areas with S/D regions. Form a planarization silicon oxide layer over the device and FOX areas covered with an etch stop layer and a first portion of a first capacitor plate over the pla... | 02/09/1999 |
| 5867362 | Storage capacitor for DRAM memory cell A storage capacitor structural configuration for memory cell units of DRAM devices and a process for constructing the capacitor. The capacitor includes a first electrode and a second electrode that are each electrically conducting layers, and a storage di... | 02/02/1999 |
| 5766968 | Micro mask comprising agglomerated material A method of forming recesses in a substrate such as a capacitor so as to increase the surface area thereof and therefore the charge storage capacity of the capacitor. This is accomplished by utilizing a micro mask formed by agglomeration on the surface of... | 06/16/1998 |
| 5604659 | Microelectronic device with centered storage capacitor cavity sized less than feature size A method of forming an integrated circuit capacitor is disclosed comprising the steps of providing a substrate, forming a conductive region at the substrate, and forming an insulating layer on the conductive region and the substrate. The method further co... | 02/18/1997 |
| 5539612 | Intermediate structure for forming a storage capacitor A method for forming a storage capacitor (12) including the step of forming a storage node contact window (38) and forming a cavity (48) in the storage electrode (50) such that the capacitive area includes the sidewalls of the storage electrode and the ca... | 07/23/1996 |
| 5519238 | Rippled polysilicon surface capacitor electrode plate for high density dram A new method to produce a microminiturized capacitor having a regular microscopic ripple surface electrode is achieved by depositing a first polysilicon layer over a suitable insulating base. A resist layer is formed over the first polysilicon layer. The ... | 05/21/1996 |
| 5496757 | Process for producing storage capacitors for DRAM cells To produce storage capacitors for DRAM cells, dummies (81) of SiO2 which are disposed in accordance with the negative pattern of the storage node arrangement (91) are formed using auxiliary layers of SiO2 and polysilicon. The storage... | 03/05/1996 |
| 5480826 | Method of manufacturing semiconductor device having a capacitor A semiconductor device includes a capacitor, of which insulator has an improved durability. In the semiconductor device, a capacitor lower electrode 11 of the cylindrical capacitor includes a standing wall portion 11b, which is formed of a polysilicon lay... | 01/02/1996 |
| 5453633 | Dynamic random access memory device and a manufacturing method thereof Disclosed is a dynamic random access memory device (DRAM) having an increased cell capacitance and simplified manufacturing method thereof. The storage electrode the capacitor of the DRAM is connected to a semiconductor substrate through an opening formed... | 09/26/1995 |
| 5391511 | Semiconductor processing method of producing an isolated polysilicon lined cavity and a method of forming a capacitor A semiconductor processing includes: a) providing an area atop a semiconductor wafer to which electrical connection to a polysilicon containing component is to be made; b) providing a layer of first material atop the semiconductor wafer, the first materia... | 02/21/1995 |
| 5300801 | Stacked capacitor construction A method of forming a capacitor on a semiconductor wafer includes: a) in a dry etching reactor, selectively anisotropically dry etching a capacitor contact opening having a minimum selected open dimension into an insulating dielectric layer utilizing sele... | 04/05/1994 |