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| Number | Title | Issue Date |
| 7442636 | Method of inhibiting copper corrosion during supercritical COcleaning A method for the pre-treatment of a wafer substrates with exposed metal surfaces is disclosed. The pre-treatment reduces oxidation of the exposed metal surfaces during subsequent supercritical cleaning processes. ... | 10/28/2008 |
| 7419917 | Ion implanted microscale and nanoscale device method A method is used for producing nanoscale and microscale devices in a variety of materials, such as silicon dioxide patterned buried films. The method is inexpensive and reliable for making small scale mechanical, optical, or electrical devices and relies upon the im... | 09/02/2008 |
| 7416967 | Semiconductor device, and method for manufacturing the same According to an aspect of the invention, a semiconductor device comprises: a N-channel MIS transistor comprising; a p-type semiconductor layer; a first gate insulation layer formed on the p-type semiconductor layer; a first gate electrode formed on the first gate in... | 08/26/2008 |
| 7416969 | Void free solder arrangement for screen printing semiconductor wafers A process for the production of a void-free semiconductor wafer for the electronics industry, comprising the steps of: applying a coating of a solder paste to a semiconductor wafer through a photoresist film; heating and applying a vacuum to the wafer in a reflow fu... | 08/26/2008 |
| 7410903 | Methods of patterning substrates The invention includes a template comprising one or both of CdS and CdSe adhered to a base in a desired pattern. The base can be any transparent or translucent material, and the desired pattern can include two or more separated segments. The template can be utilized... | 08/12/2008 |
| 7411260 | Semiconductor device and manufacturing method thereof A method for improving productivity when manufacturing a semiconductor device. A lower electrode, insulating films, an upper electrode and insulating films are formed on a semiconductor substrate in a sensor region. A cavity is formed between the insulator films abo... | 08/12/2008 |
| 7407819 | Polymer memory having a ferroelectric polymer memory material with cell sizes that are asymmetric A polymer memory and its method of manufacture are provided. One multi-layer construction of the polymer memory has two sets of word lines and a set of bit lines between the word lines. The word lines of each set of word lines have center lines that are spaced by a ... | 08/05/2008 |
| 7407889 | Method of manufacturing article having uneven surface The present invention improves a method of forming a surface unevenness using a difference in etching rates, and relaxes limitations on substrates in this method. In a method of the present invention, an uneven surface is formed by a method including applying pressu... | 08/05/2008 |
| 7393756 | Method for fabricating a trench isolation structure having a high aspect ratio A method for fabricating a trench isolation structure wherein a trench is formed in a silicon body and an oxide layer is formed in the trench. The silicon body is exposed at the bottom of the trench by means of an etching step, and silicon oxide is selectively grown... | 07/01/2008 |
| 7364953 | Manufacturing method to construct semiconductor-on-insulator with conductor layer sandwiched between buried dielectric layer and semiconductor layers A method for treating exposed metal in a semiconductor wafer (301) in wafer processing is disclosed herein. In accordance with the method, a wafer is provided which is equipped with a metal layer (307) and a substrate (303), wherein a portion of... | 04/29/2008 |
| 7364942 | Process for wafer level treatment to reduce stiction and passivate micromachined surfaces and compounds used therefor This invention discloses a process for forming durable anti-stiction surfaces on micromachined structures while they are still in wafer form (i.e., before they are separated into discrete devices for assembly into packages). This process involves the vapor depositio... | 04/29/2008 |
| 7344907 | Apparatus and methods for encapsulating microelectromechanical (MEM) devices on a wafer scale Apparatus and methods are provided for enabling wafer-scale encapsulation of microelectromechanical (MEM) devices (e.g., resonators, filters) to protect the MEMs from the ambient and to provide either a controlled ambient or a reduced pressure. In particular, method... | 03/18/2008 |
| 7332388 | Method to simultaneously form both fully silicided and partially silicided dual work function transistor gates during the manufacture of a semiconductor device, semiconductor devices, and systems including same A method for forming transistor gates having two different work functions comprises forming a first polysilicon layer which may be doped with n-type dopants. The first polysilicon layer comprises an inhibitor material at select locations which retards silicide forma... | 02/19/2008 |
| 7329615 | Atomic layer deposition method of forming an oxide comprising layer on a substrate This invention includes atomic layer deposition methods of depositing oxide comprising layers on substrates. In one implementation, a substrate is positioned within a deposition chamber. A first species is chemisorbed to form a first species monolayer onto the subst... | 02/12/2008 |
| 7314836 | Enhanced nitride layers for metal oxide semiconductors The performance of NMOS and PMOS regions of integrated circuits is improved. Embodiments of the invention include forming a first dielectric layer optimized for n-doped regions over the n-doped regions and forming a second dielectric layer optimized for p-doped regi... | 01/01/2008 |
| 7314837 | Chemical treatment of semiconductor substrates A method is disclosed for removing liquids from a semiconductor substrate by contacting the liquid on the substrate with a liquid which attracts the liquid on the substrate, separating the liquids from the substrate, and inducing a phase transition in a layer on the... | 01/01/2008 |
| 7288468 | Luminescent efficiency of semiconductor nanocrystals by surface treatment A method for improving the luminescent efficiency of semiconductor nanocrystals by surface treatment with a reducing agent to produce an improvement in luminescent efficiency and quantum efficiency without creating changes in the luminescent characteristics of the n... | 10/30/2007 |
| 7282436 | Plasma treatment for silicon-based dielectrics An embodiment of the invention is a method of manufacturing a semiconductor wafer. The method includes depositing spin-on-glass material over the semiconductor wafer (step 208), modifying a top surface of the spin-on glass material to form a SiO2 l... | 10/16/2007 |
| 7271096 | Method for improved deposition of dielectric material A gas delivery device useful in material deposition processes executed during semiconductor device fabrication in a reaction chamber, including the gas delivery device of the present invention and a method for carrying out a material deposition process, including in... | 09/18/2007 |
| 7271101 | High density plasma chemical vapor deposition process A method for depositing dielectric material into gaps between wiring lines in the formation of a semiconductor device includes the formation of a cap layer and the formation of gaps into which high density plasma chemical vapor deposition (HDPCVD) dielectric materia... | 09/18/2007 |
| 7226863 | Methods for removal of organic materials The invention includes methods of forming capacitor structures and removing organic material. An organic material, such as a photoresist, is disposed on a substrate. The organic material is contacted with a chemical mechanical polishing pad and a polishing fluid to ... | 06/05/2007 |
| 7217647 | Structure and method of making a semiconductor integrated circuit tolerant of mis-alignment of a metal contact pattern Disclosed is a method of fabricating a field effect transistor. In the method, a gate stack on a top surface of a semiconductor substrate is formed, and then a first spacer is formed on a sidewall of the gate stack. Next, a silicide self-aligned to the first spacer ... | 05/15/2007 |
| 7189591 | Process for producing light-emitting semiconductor device The invention provides a process for producing a light-emitting semiconductor device, which comprises: (1) forming a polycarbodiimide-containing layer on a light takeout side of a light-emitting semiconductor element; and (2) forming irregularities on the surface of... | 03/13/2007 |
| 7186570 | Method of manufacturing ceramic film, method of manufacturing ferroelectric capacitor, ceramic film, ferroelectric capacitor, and semiconductor device A lower electrode is formed over a substrate, and a raw material including a complex oxide is heated in an atmosphere pressurized to two atmospheres or more and containing oxygen at a volume ratio of 10% or less at a temperature raising rate of 100° C./min or less,... | 03/06/2007 |
| 7186655 | Method for manufacturing semiconductor device The disclosure relates to a method for manufacturing a semiconductor device by performing a planarization process including a first CMP process using a slurry including 0.05˜0.5 wt % CeO2 or MnO2 as an abrasive and a second CMP process using a slurry including SiO2... | 03/06/2007 |
| 7183198 | Method for forming a hardmask employing multiple independently formed layers of a capping material to reduce pinholes A bi-layer BARC/hardmask structure includes a layer of amorphous carbon and two or more distinct and independently formed layers of a PECVD material such as SiON formed on the amorphous carbon layer. By independently forming several layers of PECVD material, at leas... | 02/27/2007 |
| 7183146 | Method of manufacturing semiconductor device To provide a method for manufacturing a wiring, a conductive layer, a display device, and a semiconductor device, each of which can meet a large sized substrate and which is manufactured with a higher throughput by using a material efficiently, the conductive layer ... | 02/27/2007 |
| 7179747 | Use of supercritical fluid for low effective dielectric constant metallization An embodiment of the invention is a method of manufacturing an integrated circuit. The method includes forming a capping layer of a back end structure (step 706), drilling an extraction line from the capping layer to an inter-metal dielectric layer (step 7... | 02/20/2007 |
| 7172948 | Method to avoid a laser marked area step height A semiconductor process wafer having substantially co-planar active areas and a laser marked area in an adjacent inactive area and method for forming the same to eliminate a step height and improve a subsequent patterning process over the active areas wherein an ina... | 02/06/2007 |
| 7166545 | Production method for semiconductor device The invention aims at providing a dielectric film having a low dielectric constant and enhanced mechanical strength. A surfactant and an silica derivative are dissolved into a solvent at a desired mole ratio. The precursor solution is applied over the substrate, and... | 01/23/2007 |
| 7163902 | Infra-red light-emitting device and method for preparing the same The present infra-red light-emitting device includes a substrate with a first window layer, a silicon dioxide layer positioned on the first window layer, silicon nanocrystals distributed in the silicon dioxide layer, a second window layer, a transparent conductive l... | 01/16/2007 |
| 7163884 | Semiconductor device and fabrication method thereof A bonding pad of a semiconductor device and a fabrication method thereof are disclosed. A semiconductor device having a pad formed by exposing a predetermined region of a metal line formed over a semiconductor substrate includes an alloy layer formed on the metal li... | 01/16/2007 |
| 7157351 | Ozone vapor clean method A method for cleaning and forming an oxide film on a surface, particularly a silicon surface. The surface is initially cleaned and then exposed to ozone vapor, which forms the oxide film on the surface. The method is particularly useful for forming a pre-liner oxide... | 01/02/2007 |
| 7151049 | Electroplating compositions and methods Disclosed are electrolyte compositions for depositing a tin alloy on a substrate. The electrolyte compositions include tin ions, ions of one or more alloying metals, an acid, a thiourea derivative, and an additive selected from alkanol amines, polyethylene imines, a... | 12/19/2006 |
| 7144799 | Method for pre-retaining CB opening Disclosed is a method for pre-retaining CB opening in a DRAM manufacture process, wherein a CB opening is filed with a photo-resist layer and an LPD oxidation layer that is filled at room temperature to avoid damaging caused by conventional etching techniques. The L... | 12/05/2006 |
| 7141852 | Semiconductor device and fabricating method thereof A semiconductor device and fabricating method are provided, by which device drivability can be increased by forming second LDD regions after isolating first LDD regions from source/drain regions to prevent heavily doped impurities therein from diffusing into the fir... | 11/28/2006 |
| 7125324 | Insulated pad conditioner and method of using same A wafer planarization process with a conditioning tool having an electrical insulator that electrically insulates the abrasive surface of the conditioning tool. The electrical insulator extends the useful life of the abrasive surface of the conditioning tool by redu... | 10/24/2006 |
| 7122414 | Method to fabricate dual metal CMOS devices The present invention relates generally to barrier layers in transistor gate stacks in integrated circuits, and to processes for forming such gate stacks. ... | 10/17/2006 |
| 7119034 | Atomic layer deposition method of forming an oxide comprising layer on a substrate This invention includes atomic layer deposition methods of depositing oxide comprising layers on substrates. In one implementation, a substrate is positioned within a deposition chamber. A first species is chemisorbed to form a first species monolayer onto the subst... | 10/10/2006 |
| 7119014 | Method for fabricating a semiconductor device having a tapered-mesa side-wall film A method for fabricating a semiconductor memory device includes the consecutive steps of consecutively depositing metallic, nitride and oxide films on an underlying insulating film, patterning the nitride and oxide films to allow the oxide film to have a patterned a... | 10/10/2006 |
