Decorative Jeweled Wheel Cover
An improved wheel is provided wherein decorative items such as gem stones are embedded in either the wheel surface, a special mounting section attached to the wheel surface, or to a spoke strap that wraps around each spoke and positions embedded gem stones on the outside surface of the spoke.
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7422916 | Method of manufacturing thin film transistor panel A method of manufacturing a thin film transistor panel is provided, which includes forming a first signal line on a substrate. The method also includes forming in sequence a first insulating layer and a semiconductor layer on the first signal line. The method furthe... | 09/09/2008 |
| 7410826 | Apparatus for manufacturing an electronic device, method of manufacturing an electronic device, and program for manufacturing an electronic device A mounting zone and a reflow zone are arranged in parallel between a loader and an unloader, and mounting and reflow processes are performed simultaneously. ... | 08/12/2008 |
| 7410813 | Method of parallel lapping a semiconductor die In a lapping process for lapping away layers from a semiconductor device, where the region of interest is located near an edge or corner of the device, the method includes adding additional semiconductor material adjacent the region of interest. ... | 08/12/2008 |
| 7405100 | Packaging of a semiconductor device with a non-opaque cover Packages of semiconductor devices with non-opaque covers and methods for making the packages. The invention allows an encapsulant to be used with a non-opaque cover. By ensuring the cover is attached to a die in such a way as to expose bonding pads while sealing in ... | 07/29/2008 |
| 7399649 | Semiconductor light-emitting device and fabrication method thereof An underlying layer ALY of GaN is formed on a sapphire substrate SSB; a transfer layer TLY of GaN with a bump and dip shaped surface is formed on the underlying layer ALY; a light absorption layer BLY is formed on the bump and dip shaped surface of the transfer laye... | 07/15/2008 |
| 7396712 | Thin film processing method and thin processing apparatus A thin film processing method for processing the thin film by irradiating an optical beam to the thin film. A unit of the irradiation of the optical beam includes a first and a second optical pulse irradiation to the thin film, and the unit of the irradiation is car... | 07/08/2008 |
| 7396714 | Method of making strained semiconductor transistors having lattice-mismatched semiconductor regions underlying source and drain regions A process is provided for making a PFET and an NFET. Areas in a first semiconductor region adjacent to a gate stack are recessed. A lattice-mismatched semiconductor layer is grown in the recesses to apply a strain to the channel region of the PFET adjacent thereto. ... | 07/08/2008 |
| 7393762 | Charge-free low-temperature method of forming thin film-based nanoscale materials and structures on a substrate A method of forming a nanostructure at low temperatures. A substrate that is reactive with one of atomic oxygen and nitrogen is provided. A flux of neutral atoms of at least one of nitrogen and oxygen is generated within a laser-sustained-discharge plasma source and... | 07/01/2008 |
| 7393725 | Method of manufacturing thin film device electro-optic device, and electronic instrument A method of manufacturing a thin film device includes forming a pair of multi-layered structures by bonding a transfer layer including a thin film device to a temporary transfer substrate, respectively adhering the transfer layers of a pair of the multi-layered stru... | 07/01/2008 |
| 7393797 | Method for thermal processing a semiconductor wafer A method for thermal processing a semiconductor wafer is disclosed. A rapid thermal processing (RTP) chamber encompasses a heating means, a rotation means, and a cooling system for cooling walls of said RTP chamber. A semiconductor wafer is loaded into the RTP chamb... | 07/01/2008 |
| 7375400 | Field emission display device An image display device is provided in which the overall brightness of an image can be varied without adversely affecting hue and contrast. The image display device includes emitters 16 connected to a cathode electrode 15, a gate electrode 13, a... | 05/20/2008 |
| 7372149 | High frequency semiconductor apparatus, transmitting apparatus and receiving apparatus A high frequency semiconductor apparatus is provided which prevents characteristics of a high frequency semiconductor element from being deteriorated so that the high frequency semiconductor element can be made to operate stably. The high frequency semiconductor app... | 05/13/2008 |
| 7368306 | Field emission device and manufacturing method thereof It is an object to provide techniques for forming a field emission device of a field emission display device with the use of an inexpensive large-sized substrate according to the process that enables improving productivity. A field emission device according t... | 05/06/2008 |
| 7368322 | Method for mounting a chip on a base and arrangement produced by this method An electronic component includes a base and a chip attached to the base by a plurality of adhesive pads that are spaced apart from one another and are arranged in an intermediate space between the chip and the base. The chip is electrically connected to interconnect... | 05/06/2008 |
| 7365008 | Pattern forming method, device, method of manufacture thereof, electro-optical apparatus, and electronic apparatus A method of forming a predetermined pattern by disposing a functional liquid on a substrate, the method includes the steps of forming banks on the substrate, and disposing the functional liquid on a region divided by the banks, wherein a width of the region is parti... | 04/29/2008 |
| 7364948 | Method for fabricating semiconductor package A semiconductor package and a fabrication method thereof are proposed. A lead frame is provided between a chip and a substrate in a window ball grid array semiconductor package, wherein an active surface of the chip is electrically connected to the lead frame via bo... | 04/29/2008 |
| 7354794 | Printed conductive connectors Methods of connecting a circuit device to a semiconductor substrate and micro-fluid ejection devices made by the methods. One method includes printing an elongate strip of an electrically conductive fluid to electrically interconnect a first contact pad on a semicon... | 04/08/2008 |
| 7351603 | Process of making a microtube and microfluidic devices formed therewith A process for producing a tube suitable for microfluidic devices. The process uses a uniformly-doped first material having a first portion into which a channel is etched partially through the first material between second and third portions of the first material. Th... | 04/01/2008 |
| 7348268 | Controlled breakdown phase change memory device A phase change memory material may be deposited over an electrode in a pore through an insulator. The adherence of the memory material to the insulator may be improved by using a glue layer. At the same time, a breakdown layer may be formed in the pore between the m... | 03/25/2008 |
| 7339184 | Systems and methods for harvesting and integrating nanowires The present invention is directed to methods to harvest, integrate and exploit nanomaterials, and particularly elongated nanowire materials. The invention provides methods for harvesting nanowires that include selectively etching a sacrificial layer placed on a nano... | 03/04/2008 |
| 7335530 | Freeform substrates and devices An implantable medical device substrate is free form cut to the shape of the interior of the device. The free form shape allows more efficient use of not only the interior space of the device but also of the substrate itself. Integrated circuit components are formed... | 02/26/2008 |
| 7332414 | Chemical die singulation technique A method is provided for manufacturing a semiconductor device from a substrate (200) having an active surface (204) and a non-active surface (206). The method comprises depositing a backing material (104) onto the non-active surface of th... | 02/19/2008 |
| 7327030 | Apparatus and method incorporating discrete passive components in an electronic package An apparatus and method for incorporating discrete passive components into an integrated circuit package. A metal layer is formed over a surface of a substrate. A layer of photosensitive material is then formed over the metal layer. Using standard photolithographic ... | 02/05/2008 |
| 7326635 | Method and apparatus for stripping photo-resist A method for stripping a photo-resist includes the steps of: (a) wet stripping a photo-resist off from a substrate; and (b) rinsing the substrate under high-speed conveyance using an aqua knife. A speed of the conveyance of the substrate is 0.2 m/s or higher. Becaus... | 02/05/2008 |
| 7326649 | Parylene-based flexible multi-electrode arrays for neuronal stimulation and recording and methods for manufacturing the same Method for manufacturing a parylene-based electrode array that includes an underlying parylene layer, one or more patterned electrode layers comprising a conductive material such as a metal, and one or more overlying parylene layers. The overlying parylene is etched... | 02/05/2008 |
| 7303977 | Laser micromachining method A laser micromachining method is disclosed wherein a workpiece is milled using an incident beam from a laser beam focused above the surface of the workpiece. The incident beam is guided by a plasma channel generated by the incident beam. The plasma channel, which ha... | 12/04/2007 |
| 7291510 | Method for manufacturing semiconductor device The inventive method for manufacturing a semiconductor device is a method for manufacturing a semiconductor device using irradiation with laser light to partition a substrate having semiconductor layers formed thereon, with gallium contained in at least one of the s... | 11/06/2007 |
| 7291528 | Method of making strained semiconductor transistors having lattice-mismatched semiconductor regions underlying source and drain regions A p-type field effect transistor (PFET) and an n-type field effect transistor (NFET) of an integrated circuit are provided. A first strain is applied to the channel region of the PFET but not the NFET via a lattice-mismatched semiconductor layer such as silicon germ... | 11/06/2007 |
| 7288469 | Methods and apparatuses for forming an article Methods and apparatuses are provided for depositing a material on a surface. In accordance with the method a stream of a component material is formed having formed printing and non-printing droplets and satellite droplets of the material. The stream is directed at t... | 10/30/2007 |
| 7288450 | General protection of an integrated circuit against permant overloads and electrostatic discharges In an integrated circuit, a diode is interposed between the semiconductor substrate and the contact pad to an external bias voltage, and the substrate is biased at an internal voltage reference. Between each contact pad of the integrated circuit and semiconductor su... | 10/30/2007 |
| 7273801 | Method of forming thin film patterning substrate including formation of banks Display devices such as EL elements or LED elements, are formed from thin film elements having banks of prescribed height and a thin film layer formed by an ink jet method in areas to be coated that are partitioned by those banks. The banks may be formed of an organ... | 09/25/2007 |
| 7271028 | High density electronic interconnection This is an interconnection between electronic devices and other assemblies (e.g. printed circuits). The electronic devices are mounted on high temperature insulating bases, such as ceramic substrates. The insulating base has a conductive pattern to connect the elect... | 09/18/2007 |
| 7271014 | Fabrication method of semiconductor integrated circuit device including inspecting using probe card A probe card is formed of a main board and a sub-board located above the principal surface of the main board. The sub-board is located inside of an internal circumferential pad region of the main board. Relays are arranged in a line along the external circumference ... | 09/18/2007 |
| 7264983 | Method of enhancing connection strength for suspended membrane leads and substrate contacts A method to enhance the connection strength of suspended membrane leads and substrate contacts is described. A reading circuit chip is provided and a sacrificial layer is formed thereon. Subsequently, an electrical contact window is created in the sacrificial layer ... | 09/04/2007 |
| 7265401 | Semiconductor device having high dielectric constant gate insulating layer and its manufacture method A semiconductor device manufacture method has the steps of: (a) forming an interface layer of SiO or SiON on the surface of an active region of a silicon substrate; (b) forming a high dielectric constant gate insulating film such as HfSiON having a dielectric consta... | 09/04/2007 |
| 7262079 | Consolidated flip chip BGA assembly process and apparatus A flip chip packaging technique and associated apparatus that consolidates many or all of the steps in a conventional flip chip packaging process results in substantially decreased packaging time, e.g., only one to two hours, complexity, e.g., requiring fewer pieces... | 08/28/2007 |
| 7262075 | High-aspect-ratio metal-polymer composite structures for nano interconnects A low-temperature process that combines high-aspect-ratio polymer structures with electroless copper plating to create laterally compliant MEMS structures. These structures can be used as IC-package interconnects that can lead to reliable, low-cost and high-performa... | 08/28/2007 |
| 7256071 | Underfilling efficiency by modifying the substrate design of flip chips A substrate structure comprising a substrate; a solder mask is formed over the substrate; and a metal trace structure formed within the solder mask. The metal trace structure including a channel therein for the receipt of underfill. The metal trace structure further... | 08/14/2007 |
| 7247888 | Film forming ring and method of manufacturing semiconductor device There is here disclosed a film forming ring including a ring main body being made of an insulating material and formed in an annular shape along an edge of a substrate on which a film forming process by using a material gas in a plasma state is applied, and an inner... | 07/24/2007 |
| 7238623 | Versatile system for self-aligning deposition equipment The present invention provides a system (100) for aligning a dispensing apparatus (110) utilized within a semiconductor deposition chamber (102). A stationary reference apparatus (106) is disposed along the bottom of the deposition chambe... | 07/03/2007 |