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| Number | Title | Issue Date |
| 7358590 | Semiconductor device and driving method thereof A semiconductor device includes a memory with a simple structure, an inexpensive semiconductor device, a manufacturing method and a driving method thereof. One feature is that, in a memory which has a layer including an organic compound as a dielectric, by applying ... | 04/15/2008 |
| 7276771 | Diode and method for manufacturing the same A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed ... | 10/02/2007 |
| 7187054 | Diode and method for manufacturing the same A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed ... | 03/06/2007 |
| 7071534 | Antifuse structure and method of use An antifuse structure and method of use are disclosed. According to one embodiment of the present invention a first programming voltage is coupled to a well of a first conductivity type in a substrate of a second conductivity type in an antifuse. A second programmin... | 07/04/2006 |
| 6975013 | Diode and method for manufacturing the same A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed ... | 12/13/2005 |
| 6770950 | Non-volatile semiconductor memory structure A non-volatile semiconductor memory cell structure and method of manufacture. The method includes the steps of forming a shallow first-type well layer, a second-type well layer and a deep first-type well layer over a substrate, forming stack gates over the shallow f... | 08/03/2004 |
| 6677612 | Method for fabricating a simplified CMOS polysilicon thin film transistor and resulting structure A method of forming a MOS device using doped and activated n-type and p-type polysilicon layers includes forming a first doped and activated polysilicon area (either n-type and p-type) on a substrate. An isolation material layer is formed abutting the fir... | 01/13/2004 |
| 6320203 | Method for fabricating a simplified CMOS polysilicon thin film transistor and resulting structure A method of forming a MOS device using doped and activated n-type and p-type polysilicon layers wherein a first doped and activated polysilicon layer (either n-type and p-type) is patterned on a substrate. An isolation material layer is formed abutting th... | 11/20/2001 |
| 6300661 | Mutual implant region used for applying power/ground to a source of a transistor and a well of a substrate An integrated circuit fabrication process is provided for forming, a mutual implant region within a well which is shared by a source region of a transistor residing within the well and a well-tie region coupled to the well, thereby providing a single elec... | 10/09/2001 |
| 6281563 | Laser programming of CMOS semiconductor devices using make-link structure A CMOS semiconductor device is programmed by a laser beam which causes a PN junction in a silicon substrate to be permanently altered. This produces a leakage path between a program node and a tank region in the substrate; the program node can be an input... | 08/28/2001 |
| 6252282 | Semiconductor device with a bipolar transistor, and method of manufacturing such a device The invention relates to a semiconductor device including a preferably discrete bipolar transistor with a collector region, a base region, and an emitter region which are provided with connection conductors. A known means of preventing a saturation of the... | 06/26/2001 |
| 6222202 | System and method for the monolithic integration of a light emitting device and a photodetector for low bias voltage operation A light emitting device and photodetector combination having a structure where the layer of the photodetector that contacts the light emitting device has a semiconductor conductivity type polarity opposite that of the light emitting device. This configura... | 04/24/2001 |
| 6175143 | Schottky barrier A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring reg... | 01/16/2001 |
| 6133617 | High breakdown voltage semiconductor device Disclosed is a high breakdown voltage semiconductor device comprising a semiconductor substrate, an active layer consisting of a high resistivity semiconductor layer of a first conductivity type formed on the substrate with an insulating layer interposed ... | 10/17/2000 |
| 5982015 | High breakdown voltage semiconductor device Disclosed is a high breakdown voltage semiconductor device comprising a semiconductor substrate, an active layer consisting of a high resistivity semiconductor layer of a first conductivity type formed on the substrate with an insulating layer interposed ... | 11/09/1999 |
| 5814832 | Electron emitting semiconductor device An electron emitting semiconductor device is provided with a P-type semiconductor layer arranged on a semiconductor substrate having an impurity concentration. A Schottky barrier electrode is arranged on a surface of the P-type semiconductor layer. Plural... | 09/29/1998 |
| 5574307 | Semiconductor device and method of producing the same A semiconductor apparatus has a silicon substrate sliced off from a silicon ingot produced by the pulling method or floating zone method, wherein the concentration of interstitial oxygen in a region with a depth of approximately 10 μm or less from a devi... | 11/12/1996 |
| 5523610 | Photodiode array and method for manufacturing the same A photodiode array is provided which includes a cell comprised of at least a substrate, an insulating film formed on the substrate, a semiconductor layer containing an impurity of first conductivity type and provided on the insulating film, an impurity-di... | 06/04/1996 |
| 5502348 | Ballistic charge transport device with integral active contaminant absorption means A ballistic charge transport device including an edge electron emitter defining an elongated central opening therethrough with a receiving terminal (e.g. an anode) at one end of the opening and a getter at the other end. A suitable potential is applied be... | 03/26/1996 |
| 5488247 | MOS-type semiconductor clamping circuit A MOS-type semiconductor clamping circuit includes a semiconductor substrate receiving a substrate potential, a well isolated electrically from the substrate potential, and MOS-type transistors formed in the well. Those transistors are connected with each... | 01/30/1996 |
| 5436498 | Gettering of impurities by forming a stable chemical compound Reactor atoms (22) are introduced into a silicon substrate (10) by ion implantation to combine with metal impurities (18) to form stable chemical compounds (24). The stable compounds do not decompose and release the metal impurities during subsequent proc... | 07/25/1995 |
| 5341022 | Bipolar transistor having a high ion concentration buried floating collector and method of fabricating the same A semiconductor device having a reduced leakage current is fabricated in a short time at a low cost with excellent controllability. A buried layer (20) which includes a principal buried layer (21) of high ion concentration containing secondary defects (22... | 08/23/1994 |
| 5317186 | Ring crystallization of wafers to prevent thermal shock A ring of polycrystalline material is developed around the edge of a wafer by general heating of the wafer and localized heating with a laser beam followed by rapid cooling. The ring of polycrystalline material helps prevent wafer breakage due to thermal ... | 05/31/1994 |
| 5243213 | MIS semiconductor device formed by utilizing SOI substrate having a semiconductor thin film formed on a substrate through an insulating layer The present invention is directed to a MIS semiconductor device having a semiconductor layer formed on an insulating substrate and a gate electrode formed on this semiconductor layer through a gate insulating film, which is provided with a semiconductor r... | 09/07/1993 |
| 5185275 | Snap-back preventing method for high voltage MOSFET A process for improving the high voltage performances of a MOSFET transistor, and suppressing parasitic current induced snap-back behavior by placing a heavily doped P+ region around the grounded source. A first P+ region is placed adjacently to and in co... | 02/09/1993 |
| 5166760 | Semiconductor Schottky barrier device with pn junctions A semiconductor device is provided wherein a first diode having a pn junction and a second diode having a combination of a Schottky barrier and a pn junction in a current-passing direction are provided side by side in a direction perpendicular to the curr... | 11/24/1992 |
| 5162876 | Semiconductor device having high breakdown voltage A p-type emitter layer 2 is formed in one surface portion of an n- -type base layer 1 of high resistance. p+ -type contact layers 2b and n+ -type current blocking layers 6 are formed in a preset area ratio in the surface a... | 11/10/1992 |
| 5130778 | Semiconductor article and preparation thereof There is provided a semiconductor article together with a process for producing the same which article has a plurality of semiconductor single crystal regions comprising a semiconductor single crystal region of one electroconductive type and a semiconduct... | 07/14/1992 |
| 5057880 | Semiconductor device having a heteroepitaxial substrate A semiconductor device comprises a substrate, a compound semiconductor layer provided on the substrate, and an active region formed on the compound semiconductor layer. The substrate in turn comprises a first semiconductor layer of a first semiconductor m... | 10/15/1991 |
| 5055966 | Via capacitors within multi-layer, 3 dimensional structures/substrates A capacitor structure in a hybrid multilayer circuit having a plurality of insulating layers, the capacitor structure including a dielectric via fill in a via formed in one of the insulating layers, a first conductive element overlying the dielectric via ... | 10/08/1991 |
| 5034795 | Electrically insulating substrate Disclosed is a substrate particularly designed to bear an active structure made according to thin-film technology. The advantage of the disclosed substrate is that it can be made in large sizes and at low cost. To this end, the substrate 1 has an soda-lim... | 07/23/1991 |
| 5016081 | Mobile ion getterer for metal conductors A mobile ion getterer is added to metalization layers on an integrated circuit or discrete device to reduce mobile ion contamination therein. Preferably, chromium is used as the mobile ion getterer and is added to an aluminum target used as the metal sour... | 05/14/1991 |
| 4851358 | Semiconductor wafer fabrication with improved control of internal gettering sites using rapid thermal annealing The concentration of internal gettering sites within a semiconductor wafer is controlled by two-step thermal processing. In a concentration reduction phase, the wafer is rapidly heated to an elevated temperature in the range from about 900° to 1350° C.,... | 07/25/1989 |
| 4781766 | Fault tolerant thin-film photovoltaic cell and method A thin-film solar cell is made up of semiconductor layers formed on an aluminum silicon eutectic alloy substrate. The substrate includes an aluminum oxide insulator containing electrically conducting silicon nucleation sites which is interposed between th... | 11/01/1988 |
| 4559086 | Backside gettering of silicon wafers utilizing selectively annealed single crystal silicon portions disposed between and extending into polysilicon portions There is disclosed a process and the resulting semiconductor wafer wherein the backside of the wafer has applied thereto a layer of polysilicon. Portions of this layer are exposed to an energy beam to recrystallize them into single crystal silicon fused t... | 12/17/1985 |
| 4433342 | Amorphous switching device with residual crystallization retardation A residual crystallization retardation layer is provided between the non-crystalline switchable semiconductor layer and each electrode structure. Amorphous germanium, silicon or carbon form good crystallization retardation layers and also minimize electro... | 02/21/1984 |
| 4246590 | Restoration of high infrared sensitivity in extrinsic silicon detectors A method and apparatus for removing heavy metal impurities such as gold, silver, nickel and copper from a crystalline substrate is described incorporating a damaged crystalline layer which may be formed by excessive doping to trap or getter heavy metal im... | 01/20/1981 |
| 4187517 | Semiconductor component A semiconductor thyristor, having a given forward voltage drop, has its turn-off time or the reverse current behavior adjusted in a defined manner and a reduced blocking current. Essentially, the semiconductor element is divided, at its anode end, into zo... | 02/05/1980 |
| 4094733 | Method of neutralizing local defects in charge couple device structures A process and structure are disclosed whereby dopants are used to surround crystalline defects in a semiconductor crystal thereby creating a PN junction which isolates the defect site from the remaining semiconductor substrate and preventing charge flow t... | 06/13/1978 |
| 4053335 | Method of gettering using backside polycrystalline silicon An integrated circuit structure and method for manufacturing same which provides for gettering with a backside layer of polycrystalline silicon. The gettering of unwanted impurities from the integrated circuits involves the deposition of a polycrystalline... | 10/11/1977 |
