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| Number | Title | Issue Date |
| 7439199 | Capacitive element, method of manufacture of the same, and semiconductor device A capacitive element is characterized by including: a base (12); a lower barrier layer (13) formed on the base (12); capacitors (Q1 and Q2) made by forming a lower electrode (14a), capacitor dielectric layers ... | 10/21/2008 |
| 7432593 | Semiconductor package assembly and method for electrically isolating modules A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for electrically isolating modules according to IEEE 1394. ... | 10/07/2008 |
| 7391110 | Apparatus for providing capacitive decoupling between on-die power and ground conductors One embodiment of the present invention provides capacitive decoupling on the surface of a semiconductor die, instead of providing the decoupling on a package or printed circuit board to which the semiconductor die is attached. In this embodiment, a surface of a sem... | 06/24/2008 |
| 7387902 | Methods for packaging image sensitive electronic devices The invention provides methods for packaging for electronic devices that are light or other radiation-sensitive, such as image sensors including CCD or CMOS chips. In one embodiment of the invention, an image sensor package is assembled by surrounding a chip with a ... | 06/17/2008 |
| 7348661 | Array capacitor apparatuses to filter input/output signal An apparatus for filtering noise from an input/output (I/O) signal is disclosed. In various embodiments, the apparatus may be an array capacitor, and may be disposed between an electronic package and an underlying substrate such as a printed circuit board. ... | 03/25/2008 |
| 7332802 | Package for semiconductor light emitting element and semiconductor light emitting device A package for semiconductor light emitting element is described. The package includes a first metal substrate having a cup shaped recess portion, an insulating member having a first cup shaped opening, provided on the first metal substrate, and a second metal substr... | 02/19/2008 |
| 7327035 | System and method for providing a low frequency filter pole Systems are provided for producing a low frequency filter pole. A first bond pad is coupled to a power source. A second bond pad is inductively connected to the first bond pad by a first bond wire. A capacitor is connected to the second bond pad. A third bond pad is... | 02/05/2008 |
| 7321495 | Capacitor and method for manufacturing the same A multilayer ceramic capacitor (10) having reduced inductance which is separated into a first layer body (11) and a second layer body (12). The first layer body (11) and the second layer body (12) are formed by alternately layering... | 01/22/2008 |
| 7294925 | Optical scanner package having heating dam An optical scanner package having a heating dam is provided. The optical scanner package having a heating dam includes: an optical scanner on which a mirror surface is formed; a ceramic package in which the optical scanner is installed at the bottom of a cavity ther... | 11/13/2007 |
| 7274100 | Battery protection circuit with integrated passive components An integrated circuit which includes a circuit board having passive elements embedded in its body. ... | 09/25/2007 |
| 7233065 | Semiconductor device having capacitors for reducing power source noise A semiconductor device comprises a BGA substrate having one principal plane furnished with a large number of solder balls, the solder balls constituting a ball grid array; a semiconductor chip mounted on another principal plane of the BGA substrate, the semiconducto... | 06/19/2007 |
| 7227212 | Method of forming a floating metal structure in an integrated circuit In one embodiment, a sacrificial layer is deposited over a base layer. The sacrificial layer is used to define a subsequently formed floating metal structure. The floating metal structure may be anchored into the base layer. Once the floating metal structure is form... | 06/05/2007 |
| 7227260 | Method and system for a pad structure for use with a semiconductor package Systems and methods for substrate layers used in attaching devices to a semiconductor package are disclosed. A novel pad structure may be employed on a substrate layer which has pads, each pad having a common electrical potential. Multiple pad openings may be employ... | 06/05/2007 |
| 7202567 | Semiconductor device and manufacturing method for the same A lower interconnection is provided on a semiconductor substrate. A MIM capacitive element is provided on a first interlayer insulation film in which the lower interconnection is buried, and includes a lower electrode, an upper electrode, and a dielectric film sandw... | 04/10/2007 |
| 7190083 | High frequency integrated circuit using capacitive bonding A high frequency integrated circuit includes a die, a package and capacitive bond. The die includes a circuit that processes a high frequency signal and also includes at least one bonding pad coupled to the circuit. The package includes a plurality of bonding posts,... | 03/13/2007 |
| 7176566 | Semiconductor package assembly and method for electrically isolating modules A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for electrically isolating modules according to IEEE 1394. ... | 02/13/2007 |
| 7173331 | Hermetic sealing cap and method of manufacturing the same A hermetic sealing cap member capable of suppressing deterioration of characteristics of an electronic component resulting from a sealant such as solder coming into contact with the electronic component in a package is obtained. This hermetic sealing cap, which is a... | 02/06/2007 |
| 7170125 | Capacitor with electrodes made of ruthenium and method for patterning layers made of ruthenium or ruthenium A method for patterning layers made of ruthenium or ruthenium(IV) oxide and a capacitor comprising at least one electrode which is constructed from ruthenium or ruthenium(IV) oxide at least in sections. A layer made of ruthenium or ruthenium(IV) oxide is deposited o... | 01/30/2007 |
| 7166918 | Semiconductor package assembly and method for electrically isolating modules A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for electrically isolating modules according to IEEE 1394. ... | 01/23/2007 |
| 7154173 | Semiconductor device and manufacturing method of the same This invention miniaturizes a package of a semiconductor device and simplifies a manufacturing procedure to reduce a manufacturing cost. A semiconductor wafer formed of a plurality of semiconductor chips formed with MEMS devices and wiring thereof on front surface t... | 12/26/2006 |
| 7145234 | Circuit carrier and package structure thereof A circuit carrier and a package structure thereof are provided. The circuit carrier comprises a substrate having a surface, a plurality of passive component electrode pads or a plurality of passive component electrode planes on the surface of the substrate for elect... | 12/05/2006 |
| 7135754 | Chip type solid electrolytic capacitor having a small size and a simple structure In a chip type solid electrolytic capacitor including a capacitor element and a packaging resin covering the capacitor element, the packaging resin has a mount surface and a side surface adjacent to the mount surface. A terminal is electrically connected to the capa... | 11/14/2006 |
| 7135758 | Surface mount solder method and apparatus for decoupling capacitance and process of making A system to package high performance microelectronic devices, such as processors, responds to component transients. In one embodiment, the system includes a decoupling capacitor that is disposed between a Vcc electrical bump and a Vss electrical bump. The decoupling... | 11/14/2006 |
| 7129571 | Semiconductor chip package having decoupling capacitor and manufacturing method thereof A semiconductor chip package has a substrate that includes circuit lines provided on first and/or second surfaces, a power plane provided on the second surface, bump lands provided on the second surface and coupled to the circuit lines, and ball lands provided on th... | 10/31/2006 |
| 7122888 | Semiconductor device, electrical inspection method thereof, and electronic apparatus including the semiconductor device A semiconductor device is arranged so as to include (i) a wire L1, connected directly to an LSI chip, which serves as a VGL wire for supplying a voltage VGL to the LSI chip, and (ii) a wire LB1 connected not directly to but to one of a pair of electrod... | 10/17/2006 |
| 7091601 | Method of fabricating an apparatus including a sealed cavity A method of fabricating an apparatus including a sealed cavity and an apparatus embodying the method is disclosed. To fabricate the apparatus, a device chip including a substrate and at least one circuit element on the substrate is fabricated. Also, a cap is fabrica... | 08/15/2006 |
| 7064444 | Multi-chip ball grid array package A multi-chip BGA package has two or more rerouted chips, each of which has one or more electrode plates. The electrode plate is coplanar with rerouting lines on the rerouted chip and may act as a decoupling capacitor, reducing simultaneous switching noise from fluct... | 06/20/2006 |
| 7061099 | Microelectronic package having chamber sealed by material including one or more intermetallic compounds Microelectronic packages having chambers and sealing materials, and methods of making the packages, and sealing the chambers, are disclosed. An exemplary package may include a first surface, a second surface, a solid sealing material including an intermetallic compo... | 06/13/2006 |
| 7034393 | Semiconductor assembly with conductive rim and method of producing the same An apparatus has first and second wafers, and a conductive rim between the first and second wafers. The conductive rim electrically and mechanically connects the first and second wafers. In addition, the conductive rim and second wafer at least in part seal an area ... | 04/25/2006 |
| 7023085 | Semiconductor package structure with reduced parasite capacitance and method of fabricating the same A semiconductor package structure for improving electrical performance and a method for fabricating the same are proposed, in which a substrate having at least one pair of passive component pads is provided, wherein a semiconductor chip is attached on the substrate ... | 04/04/2006 |
| 7015591 | Exposed pad module integrating a passive device therein An exposed pad module integrated a passive device therein. The module includes a base, an active device overlying the base, a trace line electrically connecting to the active device, beyond the base, a pad beyond the trace line, a passive device electrically connect... | 03/21/2006 |
| 6992940 | Semiconductor memory apparatus with variable contact connections, and a corresponding semiconductor apparatus The invention relates to a semiconductor memory apparatus in which the connections of the connecting contacts can be varied. The invention also relates to a semiconductor apparatus which comprises at least two semiconductor memory apparatuses according to the invent... | 01/31/2006 |
| 6977189 | Wafer scale caps located by molding A method is taught for applying and accurately locating a plurality of caps to a plurality of microfabricated devices at the wafer stage. The method involves using a two part mold to make a plurality of first hollow molded caps. The caps are made from a layer of the... | 12/20/2005 |
| 6936377 | Card with embedded IC and electrochemical cell An IC card includes at least one plastic layer, a battery and at least one electronic device embedded in the plastic layer. The battery is electrically connected to the electronic device for providing power to the device. The battery includes an anode, a cathode, an... | 08/30/2005 |
| 6933587 | Electronic circuit unit suitable for miniaturization The invention provides a surface mounting type electronic circuit unit that is suitable for miniaturization. Thin film circuit elements including capacitors, resistors, and inductance elements are formed on an alumina substrate, a semiconductor bare chip of a diode ... | 08/23/2005 |
| 6924562 | Semiconductor integrated circuit having at least one of a power supply plane and ground plane divided into parts insulated from one another A semiconductor integrated circuit is provided. A semiconductor package having a printed circuit board, a semiconductor chip mounted on a first surface of said printed circuit board, at least one power supply electrode on a second surface of said printed circuit boa... | 08/02/2005 |
| 6891247 | Semiconductor device including semiconductor bare chip mounted by flip-chip bonding, and board member with thin-film structure capacitor for semiconductor bare chip mounted by flip-chip bonding A semiconductor device includes a semiconductor bare chip and an electrically-insulative board member with a thin-film structure capacitor. The semiconductor bare chip has a power supply terminal and a grounding terminal on the back surface thereof. The semiconducto... | 05/10/2005 |
| 6888240 | High performance, low cost microelectronic circuit package with interposer A low cost technique for packaging microelectronic circuit chips fixes a die within an opening in a package core. At least one metallic build up layer is then formed on the die/core assembly and a grid array interposer unit is laminated to the build up layer. The gr... | 05/03/2005 |
| 6885089 | Battery powerable apparatus, radio frequency communication device, and electric circuit A curable adhesive composition, comprising an epoxy terminated silane is provided. A thin profile battery and a substrate to which the thin profile battery is to be conductively connected are also provided. The adhesive composition is interposed between the battery ... | 04/26/2005 |
| 6864802 | Wireless spread-spectrum telesensor chip with synchronous digital architecture A fully integrated wireless spread-spectrum sensor incorporating all elements of an “intelligent” sensor on a single circuit chip is capable of telemetering data to a receiver. Synchronous control of all elements of the chip provides low-cost, low-noise, and hig... | 03/08/2005 |
