Class 257/915 - WITH TITANIUM NITRIDE PORTION OR REGION

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: Subject matter wherein an active solid-state device includes
No. of patents: 198
Last issue date: 07/08/2008

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Number	Title	Issue Date
7396765	Method of fabricating a liquid crystal display device A method of fabricating a liquid crystal display device according to an embodiment of the present invention includes forming first and second conductive layers on a substrate, wherein the first layer is transparent; patterning the second conductive layer and the fir...	07/08/2008
7335569	In-situ formation of metal insulator metal capacitors The invention describes an in-situ method of fabricating a metal insulator metal (MIM) capacitor and products formed by the same. The method utilizes atomic layer deposition (ALD) or metal-organic chemical vapor deposition (MOCVD). In the method, a metal precursor i...	02/26/2008
RE39932	Semiconductor interconnect formed over an insulation and having moisture resistant material A plurality of metal wires are formed on an underlying interlayer insulating film. Areas among the metal wires are filled with a buried insulating film of a silicon oxide film with a small dielectric constant (i.e., a first dielectric film), and thus, a parasitic ca...	12/04/2007
7241705	Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects The invention comprises methods of forming a conductive contact to a source/drain region of a field effect transistor, and methods of forming local interconnects. In one implementation, a method of forming a conductive contact to a source/drain region of a field eff...	07/10/2007
7153769	Methods of forming a reaction product and methods of forming a conductive metal silicide by reaction of metal with silicon A method of forming a reaction product includes providing a semiconductor substrate comprising a first material. A second material is formed over the first material. The first and second materials are of different compositions, and are proximate one another at an in...	12/26/2006
7119031	Methods of forming patterned photoresist layers over semiconductor substrates This invention includes methods of forming patterned photoresist layers over semiconductor substrates. In one implementation, a porous antireflective coating is formed over a semiconductor substrate. A photoresist footer-reducing fluid is provided within pores of th...	10/10/2006
7115532	Methods of forming patterned photoresist layers over semiconductor substrates This invention comprises methods of forming patterned photoresist layers over semiconductor substrates. In one implementation, a semiconductor substrate is provided. An antireflective coating is formed over the semiconductor substrate. The antireflective coating has...	10/03/2006
7091085	Reduced cell-to-cell shorting for memory arrays Bottom electrodes of memory cell capacitors are recessed to prevent electrical shorts between neighboring memory cells. A partially fabricated memory cell capacitor has a bottom electrode comprising titanium nitride (TiN) and hemispherical grained (HSG) silicon. The...	08/15/2006
7067439	ALD metal oxide deposition process using direct oxidation Methods of forming metal compounds such as metal oxides or metal nitrides by sequentially introducing and then reacting metal organic compounds with ozone or with oxygen radicals or nitrogen radicals formed in a remote plasma chamber. The metal compounds have surpri...	06/27/2006
7041335	Titanium tantalum nitride silicide layer Methods and apparatus of forming titanium tantalum silicon nitride (TixTay(Si)Nz) layers are described. The titanium tantalum silicon nitride (TixTay(Si)Nz) layer may be formed using a cyclical deposi...	05/09/2006
7029985	Method of forming MIS capacitor An MIS capacitor with low leakage and high capacitance is disclosed. A layer of hemispherical grained polysilicon (HSG) is formed as a lower electrode. Prior to the dielectric formation, the hemispherical grained polysilicon layer may be optionally subjected to a ni...	04/18/2006
6969677	Methods of forming conductive metal silicides by reaction of metal with silicon The invention includes methods of forming conductive metal silicides by reaction of metal with silicon. In one implementation, such a method includes providing a semiconductor substrate comprising an exposed elemental silicon containing surface. At least one of a cr...	11/29/2005
6812512	Integrated circuit having self-aligned CVD-tungsten/titanium contact plugs strapped with metal interconnect and method of manufacture This invention is a process for manufacturing a random access memory array. Each memory cell within the array which results from the process incorporates a stacked capacitor, a silicon nitride coated access transistor gate electrode, and a self-aligned high-aspect-r...	11/02/2004
6806572	Structure for contact formation using a silicon-germanium alloy A new method and structure for an improved contact using doped silicon is provided. The structures are integrated into several higher level embodiments. The improved contact has low contact resistivity. Improved junctions are thus provided between an IGFET device an...	10/19/2004
6787914	Tungsten-based interconnect that utilizes thin titanium nitride layer An interconnect for a substructure having an opening (470) with a rounded perimetrical top edge (480) includes a titanium nitride layer (150) and a tungsten layer (160). The titanium layer overlies the substructure, extends into the openi...	09/07/2004
6753618	MIM capacitor with metal nitride electrode materials and method of formation An MIM capacitor with low leakage and high capacitance is disclosed. A layer of titanium nitride (TiN) or boron-doped titanium nitride (TiBN) material is formed as a lower electrode over an optional capacitance layer of hemispherical grained polysilicon (HSG). Prior...	06/22/2004
6737716	Semiconductor device and method of manufacturing the same Disclosed is a method of manufacturing a semiconductor device, comprising forming a metal compound film directly or indirectly on a semiconductor substrate, forming a metal-containing insulating film consisting of a metal oxide film or a metal silicate film by oxidi...	05/18/2004
6703709	Structures formed using silicide cap as an etch stop in multilayer metal processes A layered trace configuration comprising a conductive trace capped with a silicide material which allows for removal of oxide polymer residues forming in vias used for interlayer contacts in a multilayer semiconductor device and eliminates or greatly redu...	03/09/2004
6670267	Formation of tungstein-based interconnect using thin physically vapor deposited titanium nitride layer A tungsten-based interconnect is created by first providing a structure with an opening (464/470) in a structure and then rounding the top edge of the opening. A titanium nitride layer (150) is physically vapor deposited to a thickness less than 30 nm, ty...	12/30/2003
6667537	Semiconductor devices including resistance elements and fuse elements A semiconductor device may have an insulating layer comprising a silicon oxide film or the like formed so as to cover an entire upper surface of a semiconductor substrate. A resistance element comprising MoSix is formed on the insulating layer....	12/23/2003
6597067	Self-aligned, lateral diffusion barrier in metal lines to eliminate electromigration An interconnection wiring structure in an integrated circuit chip designed to eliminate electromigration. The structure includes segments of aluminum interspersed with segments of refractory metal, wherein each aluminum segment is followed by a segment of...	07/22/2003
6555885	Semiconductor device and method of manufacturing the same A semiconductor device having a gate electrode structure including at least a metal film and a polysilicon film is disclosed. The polysilicon film of the semiconductor is doped with impurities several times so that an upper portion of the polysilicon film...	04/29/2003
6525384	Conductor layer nitridation Methods and apparatus for forming word line stacks comprise forming a thin nitride layer coupled between a bottom silicon layer and a conductor layer. In a further embodiment, a diffusion barrier layer is coupled between the thin nitride layer and the bot...	02/25/2003
6498378	Methods of forming field effect transistors and integrated circuitry The invention encompasses integrated circuitry which includes a semiconductive material substrate and a first field effect transistor supported by the substrate. The first field effect transistor comprises a first transistor gate assembly which includes a...	12/24/2002
6483151	Semiconductor device and method of manufacturing the same One object of the present invention is to suppress a threshold voltage of at least an n-channel MISFET using a nitride of a high melting point metal at it's gate electrode. In order to achieve the object, a gate electrode 109 of a p-channel MISFET is cons...	11/19/2002
6469388	Structure for contact formation using a silicon-germanium alloy A new method and structure for an improved contact using doped silicon is provided. The structures are integrated into several higher level embodiments. The improved contact has low contact resistivity. Improved junctions are thus provided between an IGFE...	10/22/2002
6433387	Lateral bipolar transistor Lateral bipolar transistor, in which a thin diffusion barrier (4) is applied to a base region (10) between an emitter region (9) and a collector region (11), and there is present, on said barrier, a base electrode (8) which is provided for low-resistance ...	08/13/2002
6429538	Method for making a novel graded silicon nitride/silicon oxide (SNO) hard mask for improved deep sub-micrometer semiconductor processing A novel graded composite silicon nitride/silicon oxide (SNO) hard mask, and manufacturing method is achieved. This novel SNO film improves the profile (optical fidelity) of the photoresist etch mask image used to pattern the SNO film, and thereby improves...	08/06/2002
6362526	Alloy barrier layers for semiconductors A semiconductor barrier layer and manufacturing method therefor for copper interconnects which is a tantalum-titanium, tantalum-titanium nitride, tantalum-titanium sandwich. The tantalum in the tantalum-titanium alloy bonds strongly with the semiconductor...	03/26/2002
6359296	Circuit arrangement with at least one capacitor WSix, with 0.3	03/19/2002
6348708	Semiconductor device utilizing a rugged tungsten film A DRAM cell capacitor having a high capacitance is obtained by forming a lower capacitor electrode of TiN and a roughened tungsten film on the TiN layer. A high dielectric constant film, such as tantalum pentaoxide, is then provided on the tungsten film a...	02/19/2002
6337151	Graded composition diffusion barriers for chip wiring applications A barrier film for a semiconductor device structure. The barrier film includes a compound including nitrogen and at least one of titanium or tantalum, nitrogen in a concentration that varies within the barrier film, and oxygen in a concentration that vari...	01/08/2002
6323537	Capacitor for an integrated circuit The present invention provides an integrated circuit capacitor comprising a conductive plug comprising a top portion comprising sidewalls, and a bottom portion, wherein the bottom portion of the plug is coated with a material selected from the group consi...	11/27/2001
6319616	Scaled interconnect anodization for high frequency applications A method of forming a conductive line structure is provided. An adhesion layer is formed on a substrate surface. A seed layer is formed on the adhesion layer. A conductor is formed on the seed layer to form a partially complete structure. The partially co...	11/20/2001
6255734	Passivated copper line semiconductor device structure A method of forming a copper conductor for a thin film electronic device comprises: forming layers over a conductor into a stack of barrier layer superjacent on top of the substrate, a copper layer on top of the barrier layer, and a hard mask layer on top...	07/03/2001
6242809	Integrated circuit memory devices including titanium nitride bit lines Integrated circuit memory devices include a memory cell field effect transistor in an integrated circuit substrate, a conductive plug that electrically contacts the memory cell field effect transistor and a titanium nitride bit line that electrically cont...	06/05/2001
6239021	Dual barrier and conductor deposition in a dual damascene process for semiconductors An integrated circuit and a method for manufacturing therefor is provided in which a partial dual damascene deposition is performed to place a barrier, seed, and conductive layer in most of a via between two interconnect channels and then capping the via ...	05/29/2001
6232656	Semiconductor interconnect formed over an insulation and having moisture resistant material A plurality of metal wires are formed on an underlying interlayer insulating film. Areas among the metal wires are filled with a buried insulating film of a silicon oxide film with a small dielectric constant (i.e., a first dielectric film), and thus, a p...	05/15/2001
6222240	Salicide and gate dielectric formed from a single layer of refractory metal An integrated circuit fabrication process is provided for forming a metal oxide gate dielectric and salicide structures from a unitary layer of refractory metal. The refractory metal layer is placed upon a silicon-based substrate before the formation of t...	04/24/2001
6204560	Titanium nitride diffusion barrier for use in non-silicon technologies and method As will be described in more detail hereinafter, there is disclosed herein a titanium nitride diffusion barrier layer and associated method for use in non-silicon semiconductor technologies. In one aspect of the invention, a semiconductor device includes ...	03/20/2001

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Class 257/915 - WITH TITANIUM NITRIDE PORTION OR REGION