Bizarre Patents
A Christmas stocking having illumination means associated therewith for signalling the arrival of Santa Claus.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8178984 | Flip chip with interposer A device is disclosed which includes a die comprising an integrated circuit and an interposer that is coupled to the die, the interposer having a smaller footprint than that of the die. A method is disclosed which includes operatively coupling an interposer to a die... | 05/15/2012 |
| 7969028 | Semiconductor device mounting structure, manufacturing method, and removal method of semiconductor device A semiconductor device mounting structure includes a semiconductor device whose electrodes are aligned on its one main face; a circuit board having board electrodes electrically connected to the electrodes of the semiconductor device by solder bumps; and curable res... | 06/28/2011 |
| 7839005 | Light emitting diode with sealant having filling particles An exemplary light emitting diode (LED) includes an LED chip and a transparent sealant covering the LED chip. The sealant contains transparent filling particles and phosphor particles, wherein the filling particles are adjacent each other. Intervals are defined betw... | 11/23/2010 |
| 7649272 | Arrangement of an electrical component placed on a substrate, and method for producing the same An electrical component is placed on a substrate. At least one film comprising a plastic material is connected to the component and to the substrate in such a way that a surface contour defined by the component and the substrate is represent is represented in a surf... | 01/19/2010 |
| 7439598 | Microelectronic imaging units Methods for manufacturing microelectronic imaging units and microelectronic imaging units that are formed using such methods are disclosed herein. In one embodiment, a method includes coupling a plurality of singulated imaging dies to a support member. The individua... | 10/21/2008 |
| 7432603 | Semiconductor encapsulating epoxy resin composition and semiconductor device In an epoxy resin composition comprising (A) an epoxy resin, (B) a curing agent, (C) an inorganic compound, and (D) an inorganic filler, the inorganic compound (C) is an oxide of metal elements at least one of which is a metal element of Group II in the Periodic Tab... | 10/07/2008 |
| 7420220 | Semiconductor light emitting device A semiconductor light-emitting device having a semiconductor light-emitting chip; a high refractive index lens covering around the semiconductor light-emitting chip; and a resin having fine particles mixed therein that fills a space between the semiconductor light-e... | 09/02/2008 |
| 7417294 | Microelectronic imaging units and methods of manufacturing microelectronic imaging units Microelectronic imaging units and methods for manufacturing microelectronic imaging units are disclosed herein. In one embodiment, a method includes placing a plurality of singulated imaging dies on a support member. The individual imaging dies include an image sens... | 08/26/2008 |
| 7417309 | Circuit device and portable device with symmetrical arrangement To provide a circuit device freed from constrains of a mounting direction. The circuit device according to the present invention includes: a conductive pattern for forming a die pad, a first bonding pad, and a second bonding pad; and a semiconductor element (TR) att... | 08/26/2008 |
| 7399657 | Ball grid array packages with thermally conductive containers Ball grid array packages for semiconductor die include a thermally conductive container and a substrate that substantially enclose a semiconductor die. The die is positioned with respect to the container by thermally conductive supports formed in the container or at... | 07/15/2008 |
| 7397139 | Epoxy resin molding material for sealing use and semiconductor device An encapsulating epoxy resin molding material, comprising (A) an epoxy resin, (B) a curing agent, and (C) an inorganic filler, wherein the inorganic filler (C) has an average particle size of 12 μm or less and a specific surface area of 3.0 m2/g or more.... | 07/08/2008 |
| 7397140 | Chip module A chip module having a chip which is mounted by means of chip adhesive on a mount and is electrically connected via bonding wires to contact pads, and an encapsulation compound which surrounds the chip and the bonding wires and is bounded by a subarea of the mount. ... | 07/08/2008 |
| 7382059 | Semiconductor package structure and method of manufacture In one embodiment, a semiconductor package is formed by adding a layer of particles to desired portions of a packing substrate. The layer of particles forms a matrix of crevices that provides a micro-lock feature for mechanically locking or engaging encapsulating ma... | 06/03/2008 |
| 7352071 | Method of fabricating anti-warp package An anti-warp package comprising a packaging substrate, a chip and a stiffening member is provided. The chip is disposed on a top surface of the packaging substrate. The stiffening member is disposed on a bottom surface of the packaging substrate in a location undern... | 04/01/2008 |
| 7339281 | Circuit device and manufacturing method thereof A circuit device which enables easy formation of a connection part that connects wiring layers to each other, and a manufacturing method thereof are provided. In a method for manufacturing a hybrid integrated circuit device of the present invention, a first resin fi... | 03/04/2008 |
| 7339263 | Integrated circuit packages, systems, and methods An integrated circuit package includes a first capacitor supported by a surface of a substrate, and a second capacitor supported by the surface of the substrate. The first capacitor is within a die shadow region, and the second capacitor lies outside of the die shad... | 03/04/2008 |
| 7327042 | Interconnection structure of electric conductive wirings Accumulating spaces for conductive particles are formed in gaps of wiring patterns for conductive wirings which are disposed on a surface of a supporting body. When interconnecting a pair of interconnection objects having the respective wiring patterns via an anisot... | 02/05/2008 |
| 7327039 | Nanoparticle filled underfill The invention provides electronic articles and methods of making said articles. The electronic articles comprise an electronic component bonded and electrically connected to a substrate using an underfill adhesive comprising the reaction product of a thermosetting r... | 02/05/2008 |
| 7315083 | Circuit device and manufacturing method thereof A circuit device suitable for connecting a plurality of laminated wiring layers to each other through an insulating layer, and a manufacturing method thereof are provided. According to a hybrid integrated circuit device of the present invention and a manufacturing m... | 01/01/2008 |
| 7312536 | Substrate having a built-in chip and external connection terminals on both sides and a method for manufacturing the same A disclosed substrate having a built-in semiconductor chip includes the built-in semiconductor chip, a resin member having the built-in semiconductor chip contained therein and external connection terminals. The resin member contains a resin and 60 to 90% by weight ... | 12/25/2007 |
| 7247940 | Optoelectronic device with patterned-metallized package body, method for producing such a device and method for the patterned metallization of a plastic-containing body An optoelectronic device, comprising a package body (57) and at least one semiconductor chip (50) arranged on the package body (57). The surface of the package body (57) has a metallized subregion (15) and a non-metallized subregio... | 07/24/2007 |
| 7239023 | Package assembly for electronic device A buffer layer is formed on a substrate and then electronic devices are packed on the buffer layer in the present invention, and problems of lower hermeticity and complex process in the conventional arts can be avoided. Therefore, the present invention provides a pa... | 07/03/2007 |
| 7233076 | Semiconductor device with read out prevention and method of producing same A semiconductor device has antenna pads and a testing pad formed on the substrate. An insulating resin layer containing a filler covers the testing pad, and bumps are provided on the antenna pads. Specific data in the semiconductor device are inhibited from being re... | 06/19/2007 |
| 7230320 | Electronic circuit device with reduced breaking and cracking In an electronic circuit device including a substrate including a front surface on which an electronic circuit element is mounted and a reverse surface opposite to the front surface in a thickness direction of the substrate, an electrically conductive terminal membe... | 06/12/2007 |
| 7224047 | Semiconductor device package with reduced leakage A semiconductor device package comprises a container including a base and sidewalls. The base is configured to support a semiconductor device chip, and a lead frame extends through at least one of the sidewalls. A portion of the lead frame within the sidewall has at... | 05/29/2007 |
| 7205669 | Semiconductor device A semiconductor device that exhibits an enhanced inhibition to a generation of voids in an underfill resin for encapsulation supplied between a semiconductor chip and an electronic component, which are mutually coupled through bump electrodes. The semiconductor devi... | 04/17/2007 |
| 7192997 | Encapsulant composition and electronic package utilizing same A composition for use in making an encapsulant usable in the encapsulation of a semiconductor chip assembled to a substrate with C4 solder interconnections therebetween, which in turn may form part of an electronic package. The composition comprises a resin, a flexi... | 03/20/2007 |
| 7190082 | Low stress flip-chip package for low-K silicon technology An underfill includes a base material and a filler material added to the base material wherein the filler material constitutes a selected percentage by weight of the underfill to provide an optimum balance between interfacial die stress and solder bump strain for ne... | 03/13/2007 |
| 7179399 | Material for forming protective film A material for forming a protective film comprising an organic solvent and a compound having at least two alicyclic structures. ... | 02/20/2007 |
| 7138723 | Deformable semiconductor device A semiconductor chip is secured in a state deformed into a substantially cylinder shape by a coating material formed on its surface. The deformed semiconductor chip is flip-chip connected to an interposer and sealed with sealing resin onto the interposer. Solder bal... | 11/21/2006 |
| 7126211 | Circuit carrier The present invention provides a circuit carrier for connecting to at least a bump. The circuit carrier comprises a substrate, at least a contact pad on a surface of the substrate and a solder mask layer covering the substrate. The solder mask has at least a stepped... | 10/24/2006 |
| 7122907 | Interposer substrate and wafer scale interposer substrate member for use with flip-chip configured semiconductor dice A method and apparatus for increasing the integrated circuit density in a flip chip semiconductor device assembly and decreasing the time for dielectrically filling such assembly using less dielectric material. The semiconductor device assembly includes a conductive... | 10/17/2006 |
| 7116002 | Overhang support for a stacked semiconductor device, and method of forming thereof A stacked, multi-die semiconductor device and method of forming thereof. A preferred embodiment comprises disposing a stack of semiconductor dies to a substrate. The stacking arrangement is such that a lateral periphery of an upper die is cantilevered over a lower d... | 10/03/2006 |
| 7115989 | Adhesive sheet for producing a semiconductor device An adhesive sheet for producing a semiconductor device, which includes a base layer and an adhesive layer and is used in the process for producing the semiconductor device including the step of sealing a semiconductor element connected to an electric conductor with ... | 10/03/2006 |
| 7112882 | Structures and methods for heat dissipation of semiconductor integrated circuits Structures and methods for semiconductor integrated circuits with respect to heat dissipation are provided. The structure comprises a die having a first surface and a second surface. The first surface has an opening in it, and the second surface has a contact pad fo... | 09/26/2006 |
| 7109062 | Semiconductor integrated device including support substrate fastened using resin, and manufacturing method thereof A semiconductor integrated device, provided with a semiconductor chip on which a semiconductor integrated circuit is formed and a support substrate laminated on at least one surface of the semiconductor chip, wherein the semiconductor chip and the support substrate ... | 09/19/2006 |
| 7109591 | Integrated circuit device An integrated circuit device having a semiconductor device and an encapsulating material on at least a portion of the semiconductor device and a method for encapsulating an integrated circuit device is disclosed. The encapsulating material includes a plurality of na... | 09/19/2006 |
| 7105366 | Method for in-line testing of flip-chip semiconductor assemblies Flip-chip semiconductor assemblies, each including integrated circuit (IC) dice and an associated substrate, are electrically tested before encapsulation using an in-line or in situ test socket or probes at a die-attach station. Those assemblies using “wet” quic... | 09/12/2006 |
| 7098544 | Edge seal for integrated circuit chips A structure for a chip or chip package is disclosed, with final passivation and terminal metallurgy which are mechanically decoupled but electrically coupled to the multilayer on-chip interconnects. This decoupling allows the chip to survive packaging stresses in th... | 08/29/2006 |
| 7095097 | Integrated circuit device having reduced bow and method for making same An integrated circuit device includes a semiconductor component coupled with a lead frame, and an integrated circuit package encompassing at least a portion of the semiconductor component. The package has a first surface and a second surface, and side surfaces, wher... | 08/22/2006 |
