...that after Parker Brothers executives turned down the game of Monopoly because it had "52 fundamental errors" (including taking too long to play), a copy of the game wound up in the home of the company president who stayed up until 1 a.m. to finish playing it? He was so impressed by the game that the next day he wrote to inventor Charles Darrow and offered to buy it!
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| Number | Title | Issue Date |
| 8169084 | Bond pad structure and method for producing same It is described a bond pad structure and a method for producing the same, the bond pad structure (1), comprising: a substrate (3) having a surface (17) to be electrically contacted; a first isolator layer (5) contacting the surface (17... | 05/01/2012 |
| 8093729 | Electrically conductive interconnect system and method An electrically conductive interconnect system has a post, extending above a supporting surface, the post including a rigid material, a coating on the rigid material, wherein the post and has a first width at the supporting surface and a second width at a distance r... | 01/10/2012 |
| 8089165 | Device comprising electrode pad A pad structure 100 includes an electrode pad (a first electrically conducting film 104 and a second electrically conducting film 110) and an insulating film provided over a peripheral region of the electrode pad so as to surround the electrode ... | 01/03/2012 |
| 8063495 | Semiconductor device There is provided a semiconductor device with which stress can be prevented from locally concentrating on an external connecting terminal on a post and thus damages of the external connecting terminal can be prevented. The semiconductor device includes a semiconduct... | 11/22/2011 |
| 8053907 | Method and system for forming conductive bumping with copper interconnection An integrated circuit system with one or more copper interconnects is provided. The one or more copper interconnects are in conductive contact with a substrate. The integrated circuit system includes a first dielectric layer, a copper material filling a first via th... | 11/08/2011 |
| 8053908 | Semiconductor device A novel structure capable of reducing the stress in the insulating layer in the semiconductor element and thereby securing reliability is provided. When the semiconductor element and the substrate are connected with a solder, the stress generated in the insulating l... | 11/08/2011 |
| 8049343 | Semiconductor device and method of manufacturing the same There are included a semiconductor substrate provided with a desirable element region, an electrode pad formed to come in contact with a surface of the semiconductor substrate or a wiring layer provided on the surface of the semiconductor substrate, a bonding pad fo... | 11/01/2011 |
| 8039972 | Printed circuit board and method thereof and a solder ball land and method thereof A printed circuit board and method thereof and a solder ball land and method thereof. The example printed circuit board (PCB) may include a first solder ball land having a first surface treatment portion configured for a first type of resistance and a second solder ... | 10/18/2011 |
| 8022558 | Semiconductor package with ribbon with metal layers A semiconductor package includes a first semiconductor chip, a second semiconductor chip and a ribbon. The ribbon includes a first metal layer and a second metal layer. The first metal layer is welded to the first chip and the second metal layer is attached to the s... | 09/20/2011 |
| 8004092 | Semiconductor chip with post-passivation scheme formed over passivation layer The invention provides a semiconductor chip comprising an interconnecting structure over said passivation layer. The interconnecting structure comprises a first contact pad connected to a second contact pad exposed by an opening in a passivation layer. A metal bump ... | 08/23/2011 |
| 7977804 | Ball-bump bonded ribbon-wire interconnect A ball-bump bonded ribbon-wire interconnect has a ball-bump attached to an integrated circuit's bond pad. A ribbon-wire has one end attached to the ball-bump and its opposing end attached to a substrate's metallized surface. The ribbon-wire may be wider than the bal... | 07/12/2011 |
| 7952210 | Semiconductor package and fabrication method thereof There is provided a semiconductor package comprising: a multilayer thin film structure including a plurality of dielectric layers and at least one or more redistribution layers; a semiconductor chip positioned at one side of the multilayer thin film structure and el... | 05/31/2011 |
| 7944059 | Semiconductor device having a probing region In a semiconductor device, a pad metal has at least a portion located immediately under a probe region, and the portion is divided into a plurality of narrow metal layers each arranged in parallel with a traveling direction of a probe. Thus, it is possible to enhanc... | 05/17/2011 |
| 7939948 | Interconnect structures with bond-pads and methods of forming bump sites on bond-pads Microelectronic workpieces that have bump sites over bond-pads and methods of fabricating such bump sites. One embodiment of such a workpiece, for example, includes a substrate having a plurality of microelectronic dies comprising integrated circuitry and bond-pads,... | 05/10/2011 |
| 7915742 | Determining the placement of semiconductor components on an integrated circuit Systems and methods are disclosed herein for determining the placement of a standard cell, representing a semiconductor component in a design stage, on an integrated circuit die. One embodiment of a method, among others, comprises analyzing regions of a semiconducto... | 03/29/2011 |
| 7902681 | Semiconductor device, production method for the same, and substrate A semiconductor device is provided in which a semiconductor chip is bonded to a substrate with a sufficiently increased bonding strength and cracking is assuredly prevented which may otherwise occur due to heat shock, heat cycle and the like. The semiconductor devic... | 03/08/2011 |
| 7893545 | Semiconductor device A module including a carrier and a semiconductor chip applied to the carrier. An external contact element is provided having a first portion and a second portion extending perpendicular to the first portion, wherein a thickness of the second portion is smaller than ... | 02/22/2011 |
| 7893544 | Semiconductor device having improved contacts A device with a solder joint made of a copper contact pad (210) of certain area (202) and an alloy layer (301) metallurgically attached to the copper pad across the pad area. The alloy layer contains copper/tin alloys, which include Cu6 | 02/22/2011 |
| 7863757 | Methods and systems for packaging integrated circuits Panel level methods and systems for packaging integrated circuits are described. In a method aspect of the invention, a substrate formed from a sacrificial semiconductor wafer is provided having a plurality of metallized device areas patterned thereon. Each device a... | 01/04/2011 |
| 7859122 | Final via structures for bond pad-solder ball interconnections A structure and a method for forming the same. The structure includes a first dielectric layer, an electrically conductive bond pad on the first dielectric layer, and a second dielectric layer on top of the first dielectric layer and the electrically conductive bond... | 12/28/2010 |
| 7859123 | Wire bonding structure and manufacturing method thereof The present invention relates to a wire bonding structure, and more particularly to a manufacturing method for said wire bonding structure. The wire bonding structure comprises a die that connects with a lead via a bonding wire. At least one bond pad is positioned o... | 12/28/2010 |
| 7839000 | Solder structures including barrier layers with nickel and/or copper An electronic device may include an electronic substrate, and an under bump seed metallurgy layer on the electronic substrate. A barrier layer may be provided on the under bump seed metallurgy layer so that the under bump seed metallurgy layer is between the barrier... | 11/23/2010 |
| 7808115 | Test circuit under pad Aspects of the present invention relate to the arrangement of points of interconnection of integrated circuit die to the package in which they are enclosed. More specifically, aspects of the present invention pertain to an arrangement of bond pads over the active ci... | 10/05/2010 |
| 7800239 | Thick metal interconnect with metal pad caps at selective sites and process for making the same The present invention relates to a high power IC (Integrated Circuit) semiconductor device and process for making same. More particularly, the invention encompasses a high conductivity or low resistance metal stack to reduce the device R-on which is stable at high t... | 09/21/2010 |
| 7800240 | Under bump metallurgy structure and wafer structure using the same and method of manufacturing wafer structure An under bump metallurgy structure and wafer structure using the same and method of manufacturing wafer structure are provided. The under bump metallurgy structure includes an adhesion layer, a barrier layer and a wetting layer. The adhesion layer is disposed on a b... | 09/21/2010 |
| 7786601 | Semiconductor chip and multi-chip package There is provided a semiconductor chip and a multi-chip package. Each semiconductor chip includes a plurality of pads formed on a first surface thereof and electrically connected to an integrated circuit, and interconnection patterns formed as stripes on a second su... | 08/31/2010 |
| 7759804 | Semiconductor device and a method of manufacturing the same A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respecti... | 07/20/2010 |
| 7759803 | Semiconductor device and method of manufacturing the same There are included a semiconductor substrate provided with a desirable element region, an electrode pad formed to come in contact with a surface of the semiconductor substrate or a wiring layer provided on the surface of the semiconductor substrate, a bonding pad fo... | 07/20/2010 |
| 7714449 | Semiconductor device with bonding pad support structure A semiconductor device having bonding pads on a semiconductor substrate includes: an upper copper layer that is formed on the lower surface of the bonding pads with a barrier metal interposed and that has a copper area ratio that is greater than layers in which circ... | 05/11/2010 |
| 7701070 | Integrated circuit and method of implementing a contact pad in an integrated circuit An integrated circuit device is described. In particular, the integrated circuit comprises a substrate comprising active devices; a plurality of metal layers formed over the substrate, the plurality of metal layers being separated by insulating layers; a plurality o... | 04/20/2010 |
| 7692315 | Semiconductor device and method for manufacturing the same In a pad forming region electrically connecting an element forming region to the outside, in which a low dielectric constant insulating film is formed in association with in the element forming region, a Cu film serving as a via formed in the low dielectric constant... | 04/06/2010 |
| 7667336 | Semiconductor device and method for manufacturing the same A semiconductor device provided with a semiconductor chip wherein an electrode pad is formed on a circuit formation surface, includes a first passivation film, which serves as an adhering layer; a second passivation film formed on the first passivation film, for pro... | 02/23/2010 |
| 7659634 | Lead frame, method of manufacturing the same, semiconductor device using lead frame and method of manufacturing semiconductor device There is provided a lead frame which comprises: a lead frame body comprising a sheet-shaped body made of metal; a groove portion for forming a lead which is formed by a predetermined depth in a lead forming region on a surface of the lead frame body; and a lead port... | 02/09/2010 |
| 7638884 | Thin semiconductor device package A thin semiconductor device package, comprising a thin substrate at least one thin die coupled with the substrate and having a perimeter dimension less than that of the substrate a mold material provided at a surface of the substrate adjacent to the perimeter of the... | 12/29/2009 |
| 7612456 | Electronic device, semiconductor device using same, and method for manufacturing semiconductor device An inventive electronic device includes a substrate, a bump of a first metal material provided on a surface of the substrate, a bonding film of a second metal material provided on a top surface of the bump for bonding the electronic device to an electrical connectio... | 11/03/2009 |
| 7576438 | Printed circuit board and method thereof and a solder ball land and method thereof A printed circuit board and method thereof and a solder ball land and method thereof. The example printed circuit board (PCB) may include a first solder ball land having a first surface treatment portion configured for a first type of resistance and a second solder ... | 08/18/2009 |
| 7557453 | Semiconductor device, method of manufacturing a semiconductor device and substrate to be used to manufacture a semiconductor device A semiconductor device comprises a first electrode-lead having a first Au film, a first Ni film, a Cu film, a second Au film and a second Ni film stacked in order, a second electrode-lead having a first Au film, a first Ni film, a Cu film, a second Au film and a sec... | 07/07/2009 |
| 7554207 | Method of forming a lamination film pattern and improved lamination film pattern In a method of forming an electrically conductive lamination pattern, an insulating film is formed on a surface of a chromium-containing bottom layer, before an aluminum-containing top layer is formed over the insulating film, so that the insulating film separates t... | 06/30/2009 |
| 7554208 | Wirebond pad for semiconductor chip or wafer In the present invention, copper interconnection with metal caps is extended to the post-passivation interconnection process. Metal caps may be aluminum. A gold pad may be formed on the metal caps to allow wire bonding and testing applications. Various post-passivat... | 06/30/2009 |
| 7550858 | Random sequence generation using alpha particle emission Generation of a random sequence using alpha particle emissions is described. A device includes memory cells, an alpha particle emitter, and read circuitry. The memory cells are sensitive to alpha particle emissions. The alpha particle emitter is proximate to the mem... | 06/23/2009 |