Did You Know...
...that in the early 1940s GE engineer James Wright was charged with a task of utmost importance to the war effort: develop a cheap substitute for rubber that could be used to produce tires, gas masks and a whole host of military gear. Wright tackled the task diligently -- and wound up inventing Silly Putty.
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| Number | Title | Issue Date |
| 8120185 | Semiconductor device having decreased contact resistance and method for manufacturing the same A semiconductor device includes a first plug formed on a semiconductor substrate and exposed on side and upper surfaces of an upper part thereof and a second plug formed on the first plug to contact the exposed side and upper surfaces of the upper part of the first ... | 02/21/2012 |
| 8106519 | Methods for pitch reduction An integrated circuit described herein includes a substrate and a plurality of lines overlying the substrate. The lines define a plurality of first trenches and a plurality of second trenches. The plurality of first trenches extend into the substrate a distance diff... | 01/31/2012 |
| 8102059 | Interconnect structure for high frequency signal transmissions A higher aspect ratio for upper level metal interconnects is described for use in higher frequency circuits. Because the skin effect reduces the effective cross-sectional area of conductors at higher frequencies, various approaches are described to reduce the effect... | 01/24/2012 |
| 8089163 | Semiconductor device production method and semiconductor device A semiconductor device production method including: the step of forming a stopper mask layer of a first metal on a semiconductor substrate, the stopper mask layer having an opening at a predetermined position thereof; the metal supplying step of supplying a second m... | 01/03/2012 |
| 8080883 | Wiring placement method of wirings having different length and semiconductor integrated circuit device A longest wiring and a shortest wiring alongside each other among the plurality of wirings are placed. Then, a longest wiring from among remaining wires which have not being placed yet, alongside an outside of a space surrounded by the wirings already placed and on ... | 12/20/2011 |
| 8058734 | Semiconductor device and method of manufacturing the same A semiconductor device including a semiconductor substrate; a first insulating film formed on the semiconductor substrate including a contact hole opened therethrough; a lower plug filled in the contact hole having a recess defined in an upper portion thereof; a sec... | 11/15/2011 |
| 8049338 | Power semiconductor module and fabrication method A power semiconductor module includes: an interconnect layer including an electrical conductor patterned on a dielectric layer, the electrical conductor including a power coupling portion having a thickness sufficient to carry power currents and a control coupling p... | 11/01/2011 |
| 8022553 | Mounting substrate and manufacturing method thereof A mounting substrate and a method of manufacturing the mounting substrate. The mounting substrate can include an insulation layer, a bonding pad buried in one side of the insulation layer in correspondence with a mounting position of a chip, and a circuit pattern el... | 09/20/2011 |
| 8018070 | Semiconductor device, method for manufacturing semiconductor devices and mask systems used in the manufacturing of semiconductor devices Semiconductor device with a first structure comprising a plurality of at least in part parallel linear structures, a second structure comprising a plurality of pad structures, forming at least in part one of the group of linear structure, curved structure, piecewise... | 09/13/2011 |
| 7999392 | Multilayer wiring structure, semiconductor device, pattern transfer mask and method for manufacturing multilayer wiring structure A multilayer interconnection structure according to this invention is applied to a case where a plurality of interconnections are formed at a fine pitch and a via is connected to at least one of the interconnections. In the multilayer interconnection structure, a re... | 08/16/2011 |
| 7999393 | Semiconductor device and manufacturing method thereof A semiconductor device includes a plurality of first interconnection layers which are provided in an insulating layer and formed in a pattern having a width and space smaller than a resolution limit of an exposure technique, and a second interconnection layer which ... | 08/16/2011 |
| 7973415 | Manufacturing process and structure of through silicon via A through silicon via reaching a pad from a second surface of a semiconductor substrate is formed. A penetration space in the through silicon via is formed of a first hole and a second hole with a diameter smaller than that of the first hole. The first hole is forme... | 07/05/2011 |
| 7952203 | Methods of forming C4 round dimple metal stud bumps for fine pitch packaging applications and structures formed thereby Methods of forming microelectronic device structures are described. Those methods may include forming a passivation layer on a substrate, wherein the substrate comprises an array of conductive structures, forming a first via in the passivation layer, forming a secon... | 05/31/2011 |
| 7936073 | Semiconductor device and method of manufacturing the same A semiconductor device including: a semiconductor substrate including an electrode; a resin protrusion formed on the semiconductor substrate; and an interconnect electrically connected to the electrode and formed to extend over the resin protrusion. The interconnect... | 05/03/2011 |
| 7932609 | Semiconductor device having groove-shaped via-hole The semiconductor device has insulating films 40, 42 formed over a substrate 10; an interconnection 58 buried in at least a surface side of the insulating films 40, 42; insulating films 60, 62 formed on the insulating film 42 | 04/26/2011 |
| 7928580 | Semiconductor memory device having wiring with lead portions disposed with a pitch larger than pitch of parallel bit lines A semiconductor memory device includes a first wiring region and a second wiring region located adjacent to the first wiring region. First lines located in the first wiring region include a first portion, a first lead portion and first inclined portion. Second lines... | 04/19/2011 |
| 7915737 | Packing board for electronic device, packing board manufacturing method, semiconductor module, semiconductor module manufacturing method, and mobile device A manufacturing technology is provided capable of improving the reliability of a semiconductor module having a via contact connected to an electrode part of a semiconductor component. The semiconductor module includes: a semiconductor component provided with an elec... | 03/29/2011 |
| 7898087 | Integrated chip carrier with compliant interconnects An electronic device includes: at least one electronic chip comprising a first coefficient of thermal expansion (CTE); and a carrier including a top surface connected to the bottom surface of the chip by solder bumps. The carrier further includes a second CTE that a... | 03/01/2011 |
| 7880308 | Semiconductor device There is disclosed a semiconductor device comprising at least two substrates, at least one wiring being provided in each of the substrates, the substrates being stacked such that major surfaces on one side of each thereof oppose each other and the wirings being conn... | 02/01/2011 |
| 7872354 | High voltage-resistant semiconductor device and method of manufacturing high voltage-resistant semiconductor device High voltage-resistant semiconductor devices adapted to control threshold voltage by utilizing threshold voltage variation caused by plasma damage resulting from the formation of multilayer wiring, and a manufacturing method thereof. Exemplary high voltage-resistant... | 01/18/2011 |
| 7868460 | Semiconductor package and method of manufacturing the same Provided are a semiconductor package in which bonding pads of a semiconductor chip are electrically connected to interconnection portions by wire-bonding, and a method of manufacturing the semiconductor package. The semiconductor package includes: a substrate; an in... | 01/11/2011 |
| 7863753 | Semiconductor device and manufacturing method thereof A semiconductor device includes: an isolation region formed in a semiconductor substrate; an active region surrounded by the isolation region; and a first gate electrode formed on the isolation region and the active region and including a first region on the isolati... | 01/04/2011 |
| 7838996 | Semiconductor device A semiconductor device comprises a wiring layer. The wiring layer is provided by forming a sidewall film having a closed-loop along a sidewall of a hard mask, etching off the hard mask to leave the sidewall film, and then etching a target material to be etched with ... | 11/23/2010 |
| 7825518 | Semiconductor device and method of manufacturing the same A semiconductor device including: a semiconductor substrate including an electrode; a resin protrusion formed on the semiconductor substrate; and an interconnect electrically connected to the electrode and formed to extend over the resin protrusion. The interconnect... | 11/02/2010 |
| 7800235 | Method of fabricating semiconductor device Method of fabricating thin-film transistors in which contact with connecting electrodes becomes reliable. When contact holes are formed, the bottom insulating layer is subjected to a wet etching process, thus producing undercuttings inside the contact holes. In orde... | 09/21/2010 |
| 7777346 | Semiconductor integrated circuit device and a method of manufacturing the same In manufacturing a semiconductor integrated circuit device, an interconnect trench and a contact hole are formed in an interlayer insulating film formed over a first-level interconnect on a semiconductor substrate, a barrier film is formed inside of the trench and c... | 08/17/2010 |
| 7759801 | Tapered signal lines A first wire having sidewalls of an integrated circuit is tapered from the proximal end to the distal end to reduce width from the first width to the second width. A second wire, spaced apart from the first wire, the second wire has sidewalls. The first wire and the... | 07/20/2010 |
| 7696628 | Relay substrate and substrate assembly According to an aspect of an embodiment, a substrate for connecting circuit boards comprises: a substrate member having a first surface and a second surface facing each other and a first end and a second end facing each other; a first signal line formed on the first... | 04/13/2010 |
| 7671476 | Semiconductor device and method of manufacturing the same A semiconductor device including: a semiconductor substrate including an electrode; a resin protrusion formed on the semiconductor substrate; and an interconnect electrically connected to the electrode and formed to extend over the resin protrusion. The interconnect... | 03/02/2010 |
| 7659631 | Interconnection between different circuit types A hybrid-scale electronic circuit, an internal electrical connection and a method of electrically interconnecting employ an interconnect having a tapered shape to electrically connect between different-scale circuits. The interconnect has a first end with an end dim... | 02/09/2010 |
| 7646101 | Semiconductor device and manufacturing method thereof An insulating layer is formed on a semiconductor substrate, and has a through hole for via. A porous silica layer has a trench for interconnection communicating to the through hole for via, and is formed on the insulating layer in contact therewith. A conductive lay... | 01/12/2010 |
| 7629693 | Method for integrated circuit fabrication using pitch multiplication Different sized features in the array and in the periphery of an integrated circuit are patterned on a substrate in a single step. In particular, a mixed pattern, combining two separately formed patterns, is formed on a single mask layer and then transferred to the ... | 12/08/2009 |
| 7592705 | Method and apparatus for strapping two polysilicon lines in a semiconductor integrated circuit device A method and apparatus for partially strapping two polysilicon lines, each having a first end and second end, uses a metal line having a plurality of spaced apart metal segments with each metal segment partially strapping a different portion of a polysilicon line. T... | 09/22/2009 |
| RE40819 | Semiconductor device with improved bond pads A semiconductor device with improved bond pads. The semiconductor device includes bond pads electrically connected to an active circuit in the device and openings formed in the bonding surface of the bond pads. The opening(s) may include recesses extending partially... | 07/07/2009 |
| 7489040 | Interconnection structure of semiconductor device An interconnection is provided with a dummy interconnection connected to an interconnection body, and the dummy interconnection is provided with a stress concentration portion in which tensile stress higher than that of the interconnection body is generated. In prox... | 02/10/2009 |
| 7439623 | Semiconductor device having via connecting between interconnects A first insulating film is provided between a lower interconnect and an upper interconnect. The lower interconnect and the upper interconnect are connected to each other by way of a via formed in the first insulating film. A dummy via or an insulating slit is formed... | 10/21/2008 |
| 7432598 | Semiconductor device A semiconductor device capable of reducing electrical leakage generated when a contact hole is misaligned and a manufacturing method thereof is disclosed. The semiconductor device includes three conductive layers with various and different portions overlapping each ... | 10/07/2008 |
| 7425470 | Microelectronic component assemblies employing lead frames having reduced-thickness inner lengths The present disclosure suggests various microelectronic component assembly designs and methods for manufacturing microelectronic component assemblies. In one particular implementation, a microelectronic component assembly includes a microelectronic component, at lea... | 09/16/2008 |
| 7425766 | Film substrate, fabrication method thereof, and image display substrate In a film substrate (FB) including a film base material (1) and conductor wiring (23) that is formed on the film base material (1), the conductor wiring (23) is arranged such that the conductor wiring thickness of an external connection p... | 09/16/2008 |
| 7420211 | Wiring line and manufacture process thereof, and semiconductor device and manufacturing process thereof To provide a technique for manufacturing a wiring line having a low resistance and a high heat resistance so as to make an active matrix type display device larger and finer. The wiring line is constructed of a laminated structure of a refractory metal, a low resist... | 09/02/2008 |
