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| Number | Title | Issue Date |
| 8106516 | Wafer-level chip scale package A chip scale package implements solder bars to form a connection between a chip and a trace, formed in a substrate, such as another chip or PCB. Solder bars are formed by depositing one or more solder layers into the socket, or optionally, depositing a base metal la... | 01/31/2012 |
| 8044516 | Semiconductor package with a reduced volume and thickness and capable of high speed operation and method for fabricating the same A semiconductor package includes a semiconductor chip provided with a bonding pad disposed over a surface thereof; a through electrode passing from the surface to a second surface opposing the first surface and connected electrically with the bonding pad; and a redi... | 10/25/2011 |
| 8022551 | Solder composition for electronic devices Each of junctions formed between a semiconductor device and a substrate comprises metal balls of Cu, or other materials and compounds of Sn and the metal balls, and the metal balls are bonded together by the compounds. ... | 09/20/2011 |
| 8018063 | Solder joint reliability in microelectronic packaging A microelectronic assembly and method for fabricating the same are described. In an example, a microelectronic assembly includes a microelectronic device having a surface with one or more areas to receive one or more solder balls, the one or more areas having a surf... | 09/13/2011 |
| 7973412 | Semiconductor device using lead-free solder as die bonding material and die bonding material not containing lead In a semiconductor device bonded to a motherboard with a bonding material having a melting point of 200° C. to 230° C., a bonding material 15 which is a die bonding material for bonding a semiconductor element 13 to a semiconductor substrate 11 | 07/05/2011 |
| 7855459 | Modified gold-tin system with increased melting temperature for wafer bonding A semiconductor structure and a bonding method are disclosed that includes a device wafer, a substrate wafer, and a metal bonding system between the device wafer and the substrate wafer. The metal bonding system includes gold, tin, and nickel, and includes at least ... | 12/21/2010 |
| 7847406 | Solder alloy material layer composition, electroconductive and adhesive composition, flux material layer composition, solder ball transferring sheet, bump and bump forming process, and semiconductore device An object of the present invention is to provide solder bumps sufficiently satisfying the expected functions and having a small diameter which conventional methods cannot attain, a semiconductor device on which these bumps are mounted, and a bump transferring sheet.... | 12/07/2010 |
| 7800230 | Solder preform and electronic component A solder preform according to the present invention has a variation in the size of high melting point metal particles which is at most 20 micrometers when the metal particle diameter is 50 micrometers, and an alloy layer of the high melting point metal particles and... | 09/21/2010 |
| 7786588 | Composite interconnect structure using injection molded solder technique Composite interconnect structure forming methods using injection molded solder are disclosed. The methods provide a mold having at least one opening formed therein with each opening including a member of a material dissimilar to a solder to be used to fill the openi... | 08/31/2010 |
| 7750475 | Lead-free solder ball A Sn—Ag—Cu based lead-free solder ball which does not undergo yellowing of its surface when formed into a solder bump on an electrode of an electronic part such as a BGA package. The solder ball has excellent wettability and does not form voids at the time of so... | 07/06/2010 |
| 7714444 | Conductive resin composition, connection method between electrodes using the same, and electric connection method between electronic component and circuit substrate using the same The present invention provides a conductive resin composition for connecting electrodes electrically, in which metal particles are dispersed in a flowing medium, wherein the flowing medium includes a first flowing medium that has relatively high wettability with the... | 05/11/2010 |
| 7679195 | PAD structure and method of testing An interconnect structure includes: a plurality of dielectric layers having aligned process control monitor (PCM) pads, and a conductive structure above a topmost one of the PCM pads. The conductive structure electrically connects the topmost PCM pad to a device und... | 03/16/2010 |
| 7554201 | Tin-bismuth (Sn-Bi) family alloy solder and semiconductor device using the same Example embodiments of the present invention relate to an alloy solder and a semiconductor device using the alloy solder. Other example embodiments relate to an alloy solder capable of increasing reliability of a junction between a semiconductor chip and a substrate... | 06/30/2009 |
| 7550852 | Composite metal column for mounting semiconductor device An integrated circuit chip which has a plurality of pads and non-reflowable contact members to be connected by reflow attachment to external parts. Each of these contact members has a height-to-diameter ratio and uniform diameter favorable for absorbing strain under... | 06/23/2009 |
| 7528489 | Semiconductor apparatus and manufacturing method Pb free solder is used in die bonding. A thermal stress reduction plate is disposed between a semiconductor chip and a die pad made of a Cu alloy. The semiconductor chip and the thermal stress reduction plate are joined and the thermal stress reduction plate and the... | 05/05/2009 |
| 7443038 | Flip-chip image sensor packages The present invention provides flip-chip packaging for optically interactive devices such as image sensors and methods of assembly. In a first embodiment of the invention, conductive traces are formed directly on the second surface of a transparent substrate and an ... | 10/28/2008 |
| 7439083 | Technique for compensating for substrate shrinkage during manufacture of an electronic assembly Substrate shrinkage that occurs during manufacture of an electronic assembly is compensated for by the incorporation of a horizontal line, having a plurality of vertical graduations, across a horizontal portion of a substrate and a vertical line, having a plurality ... | 10/21/2008 |
| 7436073 | Junction structure for a terminal pad and solder, and semiconductor device having the same A junction structure, and a semiconductor device including the same, for a junction of a terminal pad and solder, including an underlying base on which said terminal pad is formed; a nickel layer disposed on the terminal pad; a palladium layer or a gold layer dispos... | 10/14/2008 |
| 7425765 | Zinc-aluminum solder alloy A high melting point solder alloy superior in oxidation resistance, in particular a solder alloy provided with both a high oxidation resistance and high melting point suitable for filling fine through holes of tens of microns in diameter and high aspect ratios and f... | 09/16/2008 |
| 7402910 | Solder, microelectromechanical component and device, and a process for producing a component or device A solder, in particular a thin-film solder, for joining microelectromechanical components, wherein the solder is a eutectic mixture of gold and bismuth. Components and devices joined by a solder of this type are also disclosed, in addition to processes for producing... | 07/22/2008 |
| 7391112 | Capping copper bumps A structure including a substrate, a copper bump formed over the substrate, and a barrier layer comprising an alloy of at least one of iron and nickel, formed over the copper bump, and methods to make such a structure. ... | 06/24/2008 |
| 7388296 | Wiring substrate and bonding pad composition A wiring substrate comprised of a substrate main body made of glass-ceramic, a pad formed on a surface of the substrate main body and a conductor pin provided in an upright position on the pad. The pad is comprised of a ceramic that is the same as the ceramic consti... | 06/17/2008 |
| 7382005 | Circuit component with bump formed over chip A method of assembling chips. A first chip and a second chip are provided. At least one conductive pillar is formed on the first chip, and a conductive connecting material is formed on the conductive pillar. The second chip also comprises at least one conductive pil... | 06/03/2008 |
| 7375429 | Integrated circuit component and mounting method thereof Disclosed are an integrated circuit component capable of simply mounting at low cost a chip part which adjusts impedance of wiring patterns as well as capable of effectively reducing switching noise from an integrated circuit, and a method for mounting the chip part... | 05/20/2008 |
| 7372162 | Multiple selectable function integrated circuit module An integrated circuit module has a common function known good integrated circuit die with selectable functions. The selectable functions are selected during packaging of the known good integrated circuit die. The known good integrated circuit die is mounted to a sec... | 05/13/2008 |
| 7361990 | Reducing cracking of high-lead or lead-free bumps by matching sizes of contact pads and bump pads A semiconductor package assembly comprises a first conductive pad on a semiconductor substrate; a second conductive pad on a package substrate; a bump physically coupled between the first conductive pad and the second conductive pad, wherein the bump is substantiall... | 04/22/2008 |
| 7355280 | Method for forming a bump, semiconductor device and method of fabricating same, semiconductor chip, circuit board, and electronic instrument A method for forming a bump includes the steps of forming a resist layer so that a through-hole formed therein is located on a pad; and forming a metal layer to be electrically connected to the pad conforming to the shape of the through-hole. The metal layer is form... | 04/08/2008 |
| 7351361 | Conductive particles, conductive composition, electronic device, and electronic device manufacturing method A conductive composition layer, conductive particles as a raw material, a conductive composition therefor, a manufacturing method of the conductive composition layer, etc. are provided wherewith heat conductance can be accelerated between electronic devices or elect... | 04/01/2008 |
| 7352055 | Semiconductor package with controlled solder bump wetting A semiconductor package includes a substrate having a plurality of lead fingers. A plurality of stud bumps is attached to the plurality of lead fingers. A die having a plurality solder bumps is provided. The plurality of solder bumps is attached to the plurality of ... | 04/01/2008 |
| 7347354 | Metallic solder thermal interface material layer and application of the same A method of bonding a thermal interface layer to a heat dissipating member and the resulting device are described. The method may involve plating a bonding surface of the heat dissipating member, and bonding a metallic solder onto the plating under vacuum or inert c... | 03/25/2008 |
| 7339263 | Integrated circuit packages, systems, and methods An integrated circuit package includes a first capacitor supported by a surface of a substrate, and a second capacitor supported by the surface of the substrate. The first capacitor is within a die shadow region, and the second capacitor lies outside of the die shad... | 03/04/2008 |
| 7331500 | Solder bumps formation using solder paste with shape retaining attribute Method of forming solder bumps of an integrated circuit package is described. A solder paste is formed from a material having a characteristic that the deposited instances thereof substantially retain their geometric shape upon exposure to electromagnetic radiation.... | 02/19/2008 |
| 7329948 | Microelectronic devices and methods A microelectronic device is made of a semiconductor substrate, a heat generating component in a layer thereof, and a body within the remaining semiconductor substrate. The body is made of materials which have a high thermal inertia and/or thermal conductivity. When ... | 02/12/2008 |
| 7327017 | Semiconductor package including leadframe roughened with chemical etchant to prevent separation between leadframe and molding compound A semiconductor package contains a metal leadframe that has been specially treated by roughening it with a chemical etchant. The roughening process enhances the adhesion between the leadframe and the molten plastic during the encapsulation of the leadframe and there... | 02/05/2008 |
| 7326636 | Method and circuit structure employing a photo-imaged solder mask In one embodiment, a photo-imageable material is deposited on a circuit structure. The photo-imageable material is then exposed to a pattern of radiation, thereby polymerizing portions of the photo-imageable. Un-polymerized portions of the photo-imageable material a... | 02/05/2008 |
| 7323359 | Mounting method for a semiconductor component A mounting method for a semiconductor component. The method includes application of solder material to the semiconductor component, application of at least one contact/mounting element made of semiconductor material and/or metal and/or insulator material to the sold... | 01/29/2008 |
| 7318962 | Magnetically directed self-assembly of molecular electronic junctions comprising conductively coated ferromagnetic microparticles A device having a substrate, a pair of ferromagnetic leads on a surface of the substrate, laterally separated by a gap, and one or more ferromagnetic microparticles comprising a conductive coating at least partially within the gap. The conductive coating forms at le... | 01/15/2008 |
| 7312529 | Structure and method for producing multiple size interconnections An electrical structure and method comprising a first substrate electrically and mechanically connected to a second substrate. The first substrate comprises a first electrically conductive pad and a second electrically conductive pad. The second substrate comprises ... | 12/25/2007 |
| 7309647 | Method of mounting an electroless nickel immersion gold flip chip package A flip chip package, apparatus and technique in which a ball grid array composed of a doped eutectic Pb/Sn solder composition is used. The dopant in the Pb/Sn solder forms a compound or complex with the phosphorous residue from the electroless nickel plating process... | 12/18/2007 |
| 7304491 | Interconnect for testing semiconductor components An interconnect for testing semiconductor components includes interconnect contacts configured for bonding to, and then separation from component contacts on the components. The interconnect can be utilized with a method that includes the steps of bonding the interc... | 12/04/2007 |
