Bizarre Patents
Crispy Chip Sandwich and Process of Producing a Sandwich Product
A food product comprising a multilayer cookie or snack having outer layers formed from a crispy type edible food product such as a potato chip or corn chip, etc. with an intermediate marshmallow layer being in contact with the inner surface of each crispy chip and one or more filler substances.
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| Number | Title | Issue Date |
| 8115310 | Copper pillar bonding for fine pitch flip chip devices A semiconductor device assembly can include a semiconductor chip, a receiving substrate, and a spacer structure interposed between the semiconductor chip and the receiving substrate. The spacer provides an unoccupied space between a pillar and a bond finger for exce... | 02/14/2012 |
| 8102048 | Electronic device manufacturing method and electronic device There are provided the steps of forming a bump 104 on an electrode pad 103 provided on a semiconductor chip 101, forming a low-modulus insulating layer 120 on the semiconductor chip 101 and laminating, on the low-modulus insulating... | 01/24/2012 |
| 8097947 | Conductive systems and devices including wires coupled to anisotropic conductive film, and methods of forming the same Methods and apparatus for eliminating wire sweep and shorting while avoiding the use of under-bump metallization and high cost attendant to the use of conventional redistribution layers. An anisotropically conductive (z-axis) conductive layer in the form of a film o... | 01/17/2012 |
| 8093722 | System-in-package with fan-out WLCSP A system-in-package includes a package carrier; a first semiconductor die having a die face and a die edge, the first semiconductor die being assembled face-down to a chip side of the package carrier; a second semiconductor die mounted alongside of the first semicon... | 01/10/2012 |
| 8089151 | Conductive particles for anisotropic conductive interconnection Embodiments of the present invention include a conductive particle that includes a conductive nickel/gold (Ni/Au) complex metal layer having a phosphorous content of less than about 1.5 weight percent formed on the surface of a polymer resin particle. Methods of for... | 01/03/2012 |
| 8072071 | Semiconductor device including conductive element A semiconductor device includes a chip comprising a contact element, a structured dielectric layer over the chip, and a conductive element coupled to the contact element. The conductive element comprises a first portion embedded in the structured dielectric layer, a... | 12/06/2011 |
| 8058725 | Package structure and package substrate thereof A package structure and a package substrate thereof are provided. The package structure includes a package substrate, a chip and a molding compound. The package substrate has an upper surface and a lower surface. The lower surface has a molding area and a pad area. ... | 11/15/2011 |
| 8058726 | Semiconductor device having redistribution layer A semiconductor device and method of manufacturing the same are provided. The semiconductor device comprises a semiconductor die including a bond pad, a redistribution layer, and a solder ball. The redistribution layer is formed by sequentially plating copper and ni... | 11/15/2011 |
| 8058727 | Standing chip scale package A standing chip scale package is disclosed. The standing chip scale package provides electrical connection to bumped device contacts on both sides of the chip. The package is coupleable to a printed circuit board in a standing configuration such that front and back ... | 11/15/2011 |
| 8053891 | Standing chip scale package A standing chip scale package is disclosed. The standing chip scale package provides electrical connection to bumped device contacts on both sides of the chip. The package is coupleable to a printed circuit board in a standing configuration such that front and back ... | 11/08/2011 |
| 8039960 | Solder bump with inner core pillar in semiconductor package An electrical interconnect within a semiconductor device consists of a substrate with a plurality of active devices. A contact pad is formed on the substrate in electrical contact with the plurality of active devices. A passivation layer, first barrier layer, adhesi... | 10/18/2011 |
| 8039959 | Microelectronic connection component A microelectronic connection component includes a substrate having a first surface, a second surface and a peripheral edge. First and second terminals are exposed at the first surface of the substrate. Wire bond pads are exposed proximate the peripheral edge of the ... | 10/18/2011 |
| 8035226 | Wafer level package integrated circuit incorporating solder balls containing an organic plastic-core An integrated circuit including solder balls containing an elastic or resilient material core, a hard or rigid shell substantially enclosing the core, and an electrical contact layer substantially enclosing the shell. The elastic or resilient core serves as a stress... | 10/11/2011 |
| 8030770 | Substrateless package Embodiments include but are not limited to apparatuses and systems including a microelectronic device including a die having an active surface, a conductive pillar formed on the active surface of the die, the conductive pillar having a side surface, and a molding ma... | 10/04/2011 |
| 8022540 | Chip package The present provides the improved structure of a chip package, comprising an electrical contact surface of at least a chip configured with a under fill layer, the first solder mask layer, the first metal layer, dielectric material layer, the second metal layer, the ... | 09/20/2011 |
| 8008770 | Integrated circuit package system with bump pad An integrated circuit package system includes an integrated circuit, and forming a patterned redistribution pad over the integrated circuit. ... | 08/30/2011 |
| 8008771 | Semiconductor chip package, electronic device including the semiconductor chip package and methods of fabricating the electronic device A semiconductor chip package including a semiconductor chip including a first surface having bonding pads, a second surface facing the first surface, and sidewalls; a molding extension part surrounding the second surface and the sidewalls of the semiconductor chip; ... | 08/30/2011 |
| 7999381 | High performance sub-system design and assembly A multiple integrated circuit chip structure provides interchip communication between integrated circuit chips of the structure with no ESD protection circuits and no input/output circuitry. The interchip communication is between internal circuits of the integrated ... | 08/16/2011 |
| 7969005 | Packaging board, rewiring, roughened conductor for semiconductor module of a portable device, and manufacturing method therefor A method for manufacturing a semiconductor module includes: a first process of forming a conductor on one face of an insulating layer; a second process of exposing the conductor from the other face of the insulating layer; a third process of providing a first wiring... | 06/28/2011 |
| 7960831 | Ball-limiting metallurgies, solder bump compositions used therewith, packages assembled thereby, and methods of assembling same A ball-limiting metallurgy (BLM) stack is provided for an electrical device. The BLM stack resists tin migration toward the metallization of the device. A solder system is also provided that includes a eutectic-Pb solder on a substrate that is mated to a high-Pb sol... | 06/14/2011 |
| 7952199 | Circuit board including solder ball land having hole and semiconductor package having the circuit board A circuit board and a semiconductor package having the same are provided. The circuit board comprises a base substrate having interconnections, and solder ball lands disposed on one surface of the base substrate. The solder ball lands respectively have land holes ha... | 05/31/2011 |
| 7952198 | BGA package with leads on chip A BGA package primarily includes a leadless leadframe with a plurality of leads, a chip disposed on the leads, a die-attaching layer adhering to an active surface of the chip and the top surfaces of the leads, a plurality of bonding wires electrically connecting the... | 05/31/2011 |
| 7944051 | Semiconductor device having external connection terminals and method of manufacturing the same In one embodiment, a semiconductor device has a semiconductor element made up of a semiconductor chip, first solder balls provided on the semiconductor chip and a BGA substrate on which the semiconductor chip is mounted via the first solder balls. Furthermore, the s... | 05/17/2011 |
| 7944050 | Integrated circuit device and a method of making the integrated circuit device An integrated circuit device comprises a first semiconductor chip on a first substrate and a second semiconductor chip on a second substrate. A side surface of the first semiconductor chip is facing a side surface of the second semiconductor chip. At least one elect... | 05/17/2011 |
| 7944052 | Semiconductor device A semiconductor device includes a semiconductor chip, an electrode pad provided in the semiconductor chip, in which the electrode pad includes Al as a major constituent and further includes Cu, a coupling member coupled to the electrode pad, in which the coupling me... | 05/17/2011 |
| RE42332 | Integrated circuit package, ball-grid array integrated circuit package The present invention includes an integrated circuit package, a ball-grid array integrated circuit package, a method of packaging an integrated circuit, and a method of forming an integrated circuit package. According to one aspect, the present invention provides an... | 05/10/2011 |
| 7939940 | Multilayer chip scale package A resin coated copper foil is used to fabricate a multilayer Chip Scale Package (CSP). A CSP package base has a first electrical routing layer. A resin coated copper foil is hot pressed onto the CSP package base and then patterned to form a second electrical routing... | 05/10/2011 |
| 7932601 | Enhanced copper posts for wafer level chip scale packaging An enhanced wafer level chip scale packaging (WLCSP) copper electrode post is described having one or more pins that protrude from the top of the electrode post. When the solder ball is soldered onto the post, the pins are encapsulated within the solder material. Th... | 04/26/2011 |
| 7923836 | BLM structure for application to copper pad A microelectronic element and a related method for fabricating such is provided. The microelectronic element comprises a contact pad overlying a major surface of a substrate. The contact pad has a composition including copper at a contact surface. A passivation laye... | 04/12/2011 |
| 7915732 | Production of integrated circuit chip packages prohibiting formation of micro solder balls Methods for making, and structures so made for producing integrated circuit (IC) chip packages without forming micro solder balls. In one embodiment, a method may include placing a solid grid made from an organic material between the IC chip and the substrate. The g... | 03/29/2011 |
| 7911056 | Substrate structure having N-SMD ball pads A substrate structure having non-solder mask design (N-SMD) ball pads. The substrate structure includes a substrate and a solder mask. The substrate has a first surface, a trace layer and at least one ball pad. The ball pad and the trace layer are disposed on the fi... | 03/22/2011 |
| 7902668 | Flip chip semiconductor device including an unconnected neutralizing electrode A semiconductor chip constitutes a semiconductor device in which a plurality of semiconductor chips are laminated. The semiconductor chip includes a plurality of terminals which are to be connected to another semiconductor chip. At least one terminal of the terminal... | 03/08/2011 |
| RE42158 | Semiconductor device and manufacturing method thereof A semiconductor device is comprised of a semiconductor element having a low dielectric constant insulating film, first electrode pads and barrier metal layers; and a substrate having second electrode pads corresponding to the first electrode pads. The first electrod... | 02/22/2011 |
| 7868454 | High performance sub-system design and assembly A multiple integrated circuit chip structure provides interchip communication between integrated circuit chips of the structure with no ESD protection circuits and no input/output circuitry. The interchip communication is between internal circuits of the integrated ... | 01/11/2011 |
| 7868453 | Solder interconnect pads with current spreading layers Structure and methods of making the structures. The structures include a structure, comprising: an organic dielectric passivation layer extending over a substrate; an electrically conductive current spreading pad on a top surface of the organic dielectric passivatio... | 01/11/2011 |
| 7863742 | Back end integrated WLCSP structure without aluminum pads An integrated circuit structure includes a passivation layer; a via opening in the passivation layer; a copper-containing via in the via opening; a polymer layer over the passivation layer, wherein the polymer layer comprises an aperture, and wherein the copper-cont... | 01/04/2011 |
| 7859107 | Solder attach film and assembly A solder attach film includes a first cover film, a flux layer, a solder layer, and a second cover film, and it can be treated or kept in a roll shape. A solder ball forming method using the solder attach film includes preparing a semiconductor package or a semicond... | 12/28/2010 |
| 7838992 | Wafer level package having a stress relief spacer and manufacturing method thereof In a semiconductor device package having a stress relief spacer, and a manufacturing method thereof, metal interconnect fingers extend from the body of a chip provide for chip interconnection. The metal fingers are isolated from the body of the chip by a stress-reli... | 11/23/2010 |
| 7834455 | Semiconductor device The reliability of a semiconductor device which has the semiconductor components which were mounted on the same surface of the same substrate via the bump electrodes with which height differs, and with which package structure differs is improved. Semiconductor compo... | 11/16/2010 |
| 7830007 | Electronic device, method of producing the same, and semiconductor device A semiconductor device includes n1 first interconnects (n is an integer larger than one) respectively formed on first electrodes and extending over a first resin protrusion, and n2 second interconnects (n2 | 11/09/2010 |
