Did You Know...
...that Charles Goodyear performed some of his experiments on rubber while in debtor's prison? He was there so often he referred to it as his "hotel". Chronically in debt because of poor business sense and ill health, Goodyear depended on the generosity of friends and family. Even after he unlocked the secret to vulcanizing rubber, he was unable to improve his financial situation. When he died, his estate was $200,000 in debt.
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| Number | Title | Issue Date |
| 8106509 | Electronic device and electronic apparatus An electronic device includes a semiconductor device and a wiring substrate having a wiring pattern. The semiconductor device includes: a semiconductor chip having an electrode; a convex-shaped resin protrusion provided on a surface of the semiconductor chip, the su... | 01/31/2012 |
| 8093721 | Flip chip semiconductor package and fabrication method thereof There is provide a flip chip semiconductor package comprising: an electrode pad formed a semiconductor substrate; a lower metal bonding layer formed on the electrode pad; an upper metal bonding layer formed on the lower metal bonding layer and having a post shape of... | 01/10/2012 |
| 8093720 | Device, method of manufacturing device, board, method of manufacturing board, mounting structure, mounting method, LED display, LED backlight and electronic device A mounting structure and a mounting method which are capable of securely electrically connecting wiring on a board and a device to each other in the case where the device is mounted on the board, and are capable of forming a finer bump, and increasing the number of ... | 01/10/2012 |
| 8089150 | Structurally robust power switching assembly A structurally robust power switching assembly, comprising a first rigid structural unit that defines a first unit major surface that is patterned to define a plurality of mutually electrically isolated, electrically conductive paths. Also, a similar, second rigid s... | 01/03/2012 |
| 8084859 | Semiconductor device In a wafer level CSP package, with respect to signal wiring 9b disposed in a signal wiring disposition forbidden region 16 in the vicinity of external output terminals disposed in a package outer peripheral portion, since a stress generated at s... | 12/27/2011 |
| 8072068 | Semiconductor device and a method for manufacturing the same A semiconductor device according to the present invention includes: a semiconductor chip; a sealing resin layer formed on the semiconductor chip; and a post electrode formed in a through-hole penetrating through the sealing resin layer in a thickness direction, and ... | 12/06/2011 |
| 8072070 | Low fabrication cost, fine pitch and high reliability solder bump A barrier layer is deposited over a layer of passivation including in an opening to a contact pad created in the layer of passivation. A column of three layers of metal is formed overlying the barrier layer and aligned with the contact pad and having a diameter that... | 12/06/2011 |
| 8072069 | Semiconductor device and method of manufacturing a semiconductor device A semiconductor device includes at least a wiring board, a semiconductor chip that is mounted on one face side of the wiring board, connection pads that are formed on the one face side of the wiring board, and connect through bonding wires to electrode pads on the s... | 12/06/2011 |
| 8072067 | Semiconductor structure A semiconductor structure including a substrate, an insulating layer, a composite pad structure, a passivation layer, and a bump is provided. A circuit structure is disposed on the substrate. The insulating layer covers the substrate and has a first opening exposing... | 12/06/2011 |
| 8063488 | Semiconductor device and manufacturing method thereof The semiconductor device comprises a first area and a second area positioned adjacent to the outside of the first area, the semiconductor substrate having a main surface and side surfaces and disposed in such a manner that the main surface is positioned in the first... | 11/22/2011 |
| 8063487 | Manufacturing method of semiconductor apparatus and semiconductor apparatus A first conducting layer is formed on a side of a main surface on which an electrode terminal of a semiconductor device is provided in a semiconductor substrate. The first conducting layer is electrically connected to the electrode terminal of the semiconductor devi... | 11/22/2011 |
| 8063486 | Circuit board, method for manufacturing the same, and semiconductor device A circuit board 1 having a base material 10 and an electrode 11 formed on at least one main surface of the base material 10 includes an easy peeling portion 12 formed in at least one of an inner portion and a side portion of the el... | 11/22/2011 |
| 8044512 | Electrical property altering, planar member with solder element in IC chip package A structure includes a solder element for electrically coupling a substrate of an integrated circuit (IC) chip package and a printed circuit board (PCB); and a first electrical property altering, substantially planar member positioned between the solder element and ... | 10/25/2011 |
| 8044511 | Function element and function element mounting structure The semiconductor device is manufactured by forming a lower electrode layer 2 having a predetermined pattern on a semiconductor substrate 1 and forming an upper electrode layer 3 on a part of the top surface of the lower electrode layer 2... | 10/25/2011 |
| 8039956 | High current semiconductor device system having low resistance and inductance A high current semiconductor device (for example QFN for 30 to 70 A) with low resistance and low inductance is encapsulated by molding compound (401, height 402 about 0.9 mm) so that the second lead surfaces 110b remain un-encapsulated. A... | 10/18/2011 |
| 8039958 | Semiconductor device including a reduced stress configuration for metal pillars In a metallization system of a sophisticated semiconductor device, metal pillars may be provided so as to exhibit an increased efficiency in distributing any mechanical stress exerted thereon. This may be accomplished by significantly increasing the surface area of ... | 10/18/2011 |
| 8039957 | System for improving flip chip performance A system for improving flip chip performance is provided. In one embodiment, the invention relates to an assembly configured to improve performance of a flip chip device, the assembly including a semiconductor die having an active surface and a back surface, the act... | 10/18/2011 |
| 8035225 | Semiconductor chip assembly and fabrication method therefor A semiconductor chip dual-sided assembly which has a higher degree of reliability of connections between semiconductor chips and a circuit substrate is realized. This is achieved by the assembly including a plurality of upper side pads (2a) provided on... | 10/11/2011 |
| 8030767 | Bump structure with annular support A bump structure with an annular support suitable for being disposed on a substrate is provided. The substrate has at least one pad and a passivation layer that has at least one opening exposing a portion of the pad. The bump structure with the annular support inclu... | 10/04/2011 |
| 8030768 | Semiconductor package with under bump metallization aligned with open vias A semiconductor package with a semiconductor chip having under bump metallizations (UBMs) on a first surface and a substrate having open vias. The substrate is attached to the semiconductor chip with the UBMs in alignment with the open vias. An encapsulant surrounds... | 10/04/2011 |
| 8030769 | Grooving bumped wafer pre-underfill system A method of forming a semiconductor device includes providing a bumped wafer. A plurality of grooves is formed in an active surface of the bumped wafer. A pre-underfill layer is disposed over the active surface, filling the plurality of grooves. A first adhesive lay... | 10/04/2011 |
| 8026601 | Encapsulated wafer level package with protection against damage and manufacturing method A packaged semiconductor device may include a substrate including at least one device layer and at least one connector arranged thereon, and a resin cover covering each side of the substrate, the resin cover on at least one side of the substrate including an opening... | 09/27/2011 |
| 8026602 | Fabrication method of semiconductor device having conductive bumps A semiconductor device having conductive bumps and a fabrication method thereof are provided. The fabrication method mainly including steps of: providing a semiconductor substrate having a solder pad and a passivation layer formed thereon with a portion of the solde... | 09/27/2011 |
| 8013443 | Electronic carrier board and package structure thereof An electronic carrier board and a package structure thereof are provided. The electronic carrier board includes a carrier, at least one pair of bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings... | 09/06/2011 |
| 8013442 | Semiconductor device and manufacturing method thereof In a semiconductor device according to the present invention, a plurality of opening regions 5 to 8 are formed in an insulating film on a pad electrode 3. A metal layer 9 formed on the pad electrode 3 has a plurality of concave por... | 09/06/2011 |
| 7999379 | Microelectronic assemblies having compliancy A microelectronic assembly includes a microelectronic element, such as a semiconductor wafer or semiconductor chip, having a first surface and contacts accessible at the first surface, and a compliant layer overlying the first surface of the microelectronic element,... | 08/16/2011 |
| 7999380 | Process for manufacturing substrate with bumps and substrate structure A process for manufacturing a substrate with bumps is provided. First, a metallic substrate having a body and a plurality of conductive elements is provided. Next, a first dielectric layer is formed on the body, and the conductive elements are covered by the first d... | 08/16/2011 |
| 7994638 | Semiconductor chip and semiconductor device In this semiconductor chip 3, a table electrode 13 is interposed between a bump electrode 14 and an electrode pad 6. The table electrode 13 is formed by forming a plurality of cores 15 having a smaller Young's modulus than t... | 08/09/2011 |
| 7989953 | Flip chip power switch with under bump metallization stack A semiconductor package includes a semiconductor substrate a semiconductor substrate having source and drain regions formed therein, an intermediate routing structure to provide electrical interconnects to the source and drain regions, a dielectric layer formed over... | 08/02/2011 |
| 7982311 | Solder limiting layer for integrated circuit die copper bumps An apparatus comprises a semiconductor substrate having a device layer, a plurality of metallization layers, a passivation layer, and a metal bump formed on the passivation layer that is electrically coupled to at least one of the metallization layers. The apparatus... | 07/19/2011 |
| 7977788 | Contact structure having a compliant bump and a testing area A contact structure having both a compliant bump and a testing area and a manufacturing method for the same is introduced. The compliant bump is formed on a conductive contact of the silicon wafer or a printed circuit board. The core of the bump is made of polymeric... | 07/12/2011 |
| 7977789 | Bump with multiple vias for semiconductor package and fabrication method thereof, and semiconductor package utilizing the same A bump for a semiconductor package forms a polymer layer having multiple vias on an electrode pad above a semiconductor chip to increase an electrical contact area between the electrode pad and a metal bump. Further, the bump forms a polymer layer having multiple vi... | 07/12/2011 |
| 7977790 | Semiconductor device and method of manufacturing the same When manufacturing a semiconductor device by mounting a semiconductor chip 2 on a substrate 1 with a flip-chip method, projections 9 are formed between pads 4 arranged in multiple annular concentric layers on the semiconductor chip 2 | 07/12/2011 |
| 7973408 | Semiconductor chip passivation structures and methods of making the same Various semiconductor chip passivation structures and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes applying a polymeric passivation layer to a side of a semiconductor chip. The side of the semiconductor... | 07/05/2011 |
| 7973407 | Three-dimensional stacked substrate arrangements Three-dimensional stacked substrate arrangements with reliable bonding and inter-substrate protection. ... | 07/05/2011 |
| 7969004 | Semiconductor device, method for mounting semiconductor device, and mounting structure of semiconductor device In order to realize a semiconductor device which is easily mounted on a circuit board and which has high mounting reliability, a semiconductor device 1 of the present invention includes: a semiconductor substrate 2; and an Au bump 3 provided on ... | 06/28/2011 |
| 7969003 | Bump structure having a reinforcement member A manufacturing method of a bump structure having a reinforcement member is disclosed. First, a substrate including pads and a passivation layer is provided. The passivation layer has first openings, and each first opening exposes a portion of the corresponding pad ... | 06/28/2011 |
| 7964961 | Chip package A chip package includes a semiconductor chip, a flexible circuit film and a substrate. The substrate has a circuit structure in the substrate. The flexible circuit film is connected to the circuit structure of the substrate through metal joints, an anisotropic condu... | 06/21/2011 |
| 7964964 | Method of packaging and interconnection of integrated circuits A semiconductor chip packaging on a flexible substrate is disclosed. The chip and the flexible substrate are provided with corresponding raised and indented micron-scale contact pads with the indented contact pads partially filled with a liquid amalgam. After low te... | 06/21/2011 |
| 7964963 | Semiconductor package and method for manufacturing semiconductor package A semiconductor package of this invention includes external electrode pad 5 which is formed by a conductive member that is made either of conductive resin or conductive ink, which is connected to an internal circuit of a semiconductor device, and which is to ... | 06/21/2011 |
