Did You Know...
...that a workman who left the soap mixing machine on too long was responsible for making Ivory Soap? He was so embarrassed by his mistake that he threw the mess in a stream. Imagine his dismay when the evidence of his error floated to the surface! Result: Ivory soap, the soap that floats.
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| Number | Title | Issue Date |
| 7982310 | Semiconductor device, method of manufacturing thereof, circuit board and electronic apparatus A semiconductor device is provided comprising: a semiconductor element including a plurality of electrodes; first wirings coupled to the electrodes and directed toward a center of the semiconductor element from a portion coupled to the electrodes; second wirings cou... | 07/19/2011 |
| 7898082 | Nitrogen rich barrier layers and methods of fabrication thereof A semiconductor device includes a material layer and a first barrier layer disposed over the material layer. The first barrier layer includes a nitrogen-rich region formed at a top surface of the first barrier layer. A conductor is disposed over the first barrier la... | 03/01/2011 |
| 7659620 | Integrated circuit package employing a flexible substrate An integrated circuit package includes a flexible laminar substrate 1. The substrate 1 has a flexible layer 5 of heat conductive material on one of its faces. The layer 5 extends across an aperture 9 in the flexible substrate 1 | 02/09/2010 |
| 7656033 | Semiconductor device with a semiconductor chip using lead technology and method of manufacturing the same A semiconductor device using lead technology includes a semiconductor chip with external side electrodes of semiconductor components disposed on its top side. On its rear side, the semiconductor chip is connected to a rear side internal lead adapted to the rear side... | 02/02/2010 |
| 7615864 | Semiconductor device, method of manufacturing thereof, circuit board and electronic apparatus A semiconductor device is provided comprising: a semiconductor element including a plurality of electrodes; first wirings coupled to the electrodes and directed toward a center of the semiconductor element from a portion coupled to the electrodes; second wirings cou... | 11/10/2009 |
| 7531897 | Process for sealing and connecting parts of electromechanical, fluid and optical microsystems and device obtained thereby A process for connecting two bodies forming parts of an electromechanical, fluid and optical microsystem, wherein a welding region is formed on a first body; an electrically conductive region and a spacing region are formed on a second body; the spacing region exten... | 05/12/2009 |
| 7443019 | Semiconductor device with conductor tracks between semiconductor chip and circuit carrier and method for producing the same The invention relates to a semiconductor device with conductor tracks between a semiconductor chip and a circuit carrier, and to a method for producing the same. The conductor tracks extend from contact areas on the top side of the semiconductor chip to contact pads... | 10/28/2008 |
| 7427532 | Method of manufacturing a device having a contacting structure According to the invention, a layer made of an electrically insulating material is applied to a substrate and a component that is arranged thereupon in such way that said layer follows the surface contour formed by the substrate and the component. ... | 09/23/2008 |
| 7414313 | Polymeric conductor donor and transfer method The present invention relates to a donor laminate for transfer of a conductive layer comprising at least one electronically conductive polymer on to a receiver, wherein the receiver is a component of a device. The present invention also relates to methods pertinent ... | 08/19/2008 |
| 7405419 | Unidirectionally conductive materials for interconnection A method of forming and a device including an interconnect structure having a unidirectional electrical conductive material is described. The unidirectional conductive material may overlie interconnect materials, and/or may surround interconnect materials, such as b... | 07/29/2008 |
| 7375032 | Semiconductor substrate thinning method for manufacturing thinned die In a method according to the present invention, a substrate thinning process is performed on a bumped substrate prior to the ultimate solder reflow process to heal bump defects caused by the substrate thinning process. Concurrently, the risk of substrate breakage is... | 05/20/2008 |
| 7371598 | Wiring substrate and method of manufacturing thereof, and thin film transistor and method of manufacturing thereof The invention includes a first step for forming a first conductive layer composed of a high melting point metal to be in contact with an insulating layer; and a second step for forming a second conductive layer by discharging a composition containing a conductive ma... | 05/13/2008 |
| 7368326 | Methods and apparatus to reduce growth formations on plated conductive leads A process includes annealing one or more plated conductive leads at a predetermined temperature. The one or more plated conductive leads are plated with one or more layers, where each layer comprises a material. The predetermined temperature is greater than or equal... | 05/06/2008 |
| 7361976 | Data carrier with a module with a reinforcement strip In a lead-frame configuration (60), a module (70) and a data carrier (72), two connecting plates (12, 13) of the module (70), which are each intended for connection to a connecting contact or bump (47, 48) of a chip (41 | 04/22/2008 |
| 7358607 | Substrates and systems to minimize signal path discontinuities Arrangements are used for minimizing signal path discontinuities. ... | 04/15/2008 |
| 7358618 | Semiconductor device and manufacturing method thereof A semiconductor device having a semiconductor substrate, at least one of a protruding electrode and wiring formed on one surface of the semiconductor substrate, and a first resin film formed on this surface. The first resin film has elasticity low enough to reduce s... | 04/15/2008 |
| 7350293 | Low profile ball-grid array package for high power A low-profile, high power ball grid array, or land grid array, device including a plastic tape having first and second surfaces, a portion of the first surface covered with an adhesive layer. First and second openings are stamped through the tape and adhesive layer,... | 04/01/2008 |
| 7344968 | Semiconductor chip having pads with plural junctions for different assembly methods Development efficiency and mass production efficiency of a semiconductor chip (LSI) is improved, whereby the LSI on which an integrated circuit is formed has plural pad parts connecting the integrated circuit with an external circuit. The pad part is provided with a... | 03/18/2008 |
| 7336139 | Flexible interconnect cable with grounded coplanar waveguide A high speed flexible interconnect cable includes a number of conductive layers and a number of dielectric layers. Conductive signal traces, located on the conductive layers, combine with the dielectric layers to form one or more high speed electrical transmission l... | 02/26/2008 |
| 7323366 | Manufacturing method of a semiconductor device A method of making a semiconductor device including a semiconductor chip having a plurality of pads, and a lead frame having a plurality of leads. Each of the plurality of leads has a mounting surface for mounting the semiconductor device, a wire connection surface ... | 01/29/2008 |
| 7323772 | Ball grid array structures and tape-based method of manufacturing same Semiconductor device packages formed in accordance with methods of packaging semiconductor dice in grid array-type semiconductor device packages using conventional lead frame or lead lock tape assembly equipment are disclosed. Circuitry-bearing segments having an el... | 01/29/2008 |
| 7315000 | Electronic module with dual connectivity An electronic module includes electronic circuitry and first and second connection mechanisms, both operationally connected to the electronic circuitry, for mounting the module in a larger electronic device by different respective methods. Preferably, the first conn... | 01/01/2008 |
| 7300864 | Method for forming solder bump structure A solder bump structure may be formed using a dual exposure technique of a photoresist, which may be a positive photoresist. The positive photoresist may be coated on an IC chip. First openings may be formed at first exposed regions of the photoresist by a first exp... | 11/27/2007 |
| 7294963 | Electro-luminescence display device and method of fabricating the same An electro-luminescence display device includes a connection film being connected to a driving circuit, a pad connected to the connection film in order to supply a driving signal from the driving circuit to a signal line formed on a substrate, a conductive film for ... | 11/13/2007 |
| 7285845 | Lead frame for semiconductor package A lead frame for a semiconductor package having not only high molding resin adhesiveness and a low delamination problem under a severe moisture absorbing atmosphere but also high interface adhesiveness and solder wettability of an Au wire, and a method of manufactur... | 10/23/2007 |
| 7282785 | Surface mount type semiconductor device and lead frame structure thereof A surface mount type semiconductor device can be configured to include a pair of lead frames that are butted to each other with a spacing such that ends of the lead frames are opposite to each other. A bare chip can be mounted on a chip mount portion on one end side... | 10/16/2007 |
| 7276801 | Designs and methods for conductive bumps Methods, techniques, and structures relating to die packaging. In one exemplary implementation, a die package interconnect structure includes a semiconductor substrate and a first conducting layer in contact with the semiconductor substrate. The first conducting lay... | 10/02/2007 |
| 7276782 | Package structure for semiconductor A package structure for a semiconductor is described. The advantages thereof are that it has a great structural strength and when being penetrated by light, it will not be influenced by external light and can condense the light. Therefore, it is not easily be deform... | 10/02/2007 |
| 7271498 | Bump electrodes having multiple under ball metallurgy (UBM) layers The present invention provides a wafer structure having a plurality of bonding pad, an adhesion layer, a barrier layer, a wetting layer, a plurality of bump, a first passivation layer and a second passivation layer. The bonding pads are disposed on the active surfac... | 09/18/2007 |
| 7271084 | Reinforced solder bump structure and method for forming a reinforced solder bump A reinforced solder bump connector structure is formed between a contact pad arranged on a semiconductor chip and a ball pad arranged on a mounting substrate. The semiconductor chip includes at least one reinforcing protrusion extending upwardly from a surface of an... | 09/18/2007 |
| 7271482 | Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using such methods Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces having such interconnects are disclosed herein. One aspect of the invention is directed toward a method for manufacturing a microelectronic workpiece having a plurality of... | 09/18/2007 |
| 7253520 | CSP semiconductor device having signal and radiation bump groups A semiconductor device comprises a semiconductor chip which has a first surface, a pad which is formed directly on the first surface, an oxide film which is formed on the first surface, an insulating film which is formed on the oxide film and a part of the pad, a co... | 08/07/2007 |
| 7250673 | Signal isolation in a package substrate Signal traces are patterned on a top surface of a substrate. A ground trace is patterned on the top surface of the substrate for at least one pair of the signal traces. A die paddle is patterned on the top surface of the substrate, and the die paddle is connected di... | 07/31/2007 |
| 7247943 | Integrated circuit with at least one bump In an integrated circuit (1) having a substrate (3) and having a signal-processing circuit (4) which is produced at a surface (8) of the substrate (3), there is provided on the substrate surface (8) a protective layer (12... | 07/24/2007 |
| 7247947 | Semiconductor device comprising a plurality of semiconductor constructs A semiconductor device includes a first semiconductor construct provided on a base plate and having a semiconductor substrate and external connection electrodes. An insulating layer is provided on the base plate around the first semiconductor construct. An upper lay... | 07/24/2007 |
| 7239162 | Device for measurement and analysis of electrical signals of an integrated circuit component According to the invention, one or more external test connection contact points (pads; pins; balls), are provided in an integrated circuit component (chip) (1), through which signals (4, 5, 6) that are to be measured or analyzed are selectively fed, e.... | 07/03/2007 |
| 7238962 | Semiconductor chip with test pads and tape carrier package using the same A semiconductor chip with test pads and a tape carrier package using the same are provided. The tape carrier package comprises a semiconductor chip. The semiconductor chip has an active surface and a back surface. The active surface has a main circuit area having in... | 07/03/2007 |
| 7233057 | Integrated circuit package with optimized mold shape The invention relates to an integrated circuit package, in particular an integrated chip size package or an integrated chip scale package, comprising a substrate carrying a die, and connection elements, interconnection elements, connecting pins of said die with said... | 06/19/2007 |
| 7214604 | Method of fabricating ultra thin flip-chip package Provided is a method of fabricating an ultra thin flip-chip package. In the above method, an under barrier metal film is formed on a bond pad of a semiconductor chip. Three-dimensional structured solder bumps are formed on the under barrier metal film, each of the s... | 05/08/2007 |
| 7208843 | Routing design to minimize electromigration damage to solder bumps A novel pad structure for an integrated circuit component that utilizes a bump interconnect for connection to other integrated circuit components that produces a relatively uniform current distribution within the bump of the bump interconnect is presented. The pad s... | 04/24/2007 |
