"The man with a new idea is a crank until the idea succeeds."
Samuel Clemens
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8188593 | Silicon substrate having through vias and package having the same The present invention relates to a silicon substrate having through vias and a package having the same. The silicon substrate includes a substrate body, a plurality of through vias and at least one heat dissipating area. The substrate body has a surface, and the mat... | 05/29/2012 |
| 8159065 | Semiconductor package having an internal cooling system A semiconductor package having an internal cooling system is presented which includes a semiconductor chip and a through-electrode. The semiconductor chip has a circuit section. The through-electrode passes through an upper surface and a lower surface the semiconduc... | 04/17/2012 |
| 8120169 | Thermally enhanced molded leadless package A molded leadless package (MLP) semiconductor device includes a heat spreader with a single connecting projection extending from an edge of a cap of the heat spreader to a leadframe. The heat spreader can include additional projections on its edges that act as heat ... | 02/21/2012 |
| 8120170 | Integrated package circuit with stiffener An integrated circuit package employs a stiffener layer that houses a passive electronic component to maintain mechanical properties when a thinner substrate is used. The use of either a retention wall or a stiffener allows for the manufacture of these integrated ci... | 02/21/2012 |
| 8067834 | Semiconductor component In various embodiments, semiconductor components and methods to manufacture these components are disclosed. In one embodiment, a method to manufacture a semiconductor component is disclosed. The semiconductor includes a heat sink and a semiconductor die that has a f... | 11/29/2011 |
| 8063483 | On-chip temperature gradient minimization using carbon nanotube cooling structures with variable cooling capacity An electronic device comprises a die with at least one defined hot-spot area; and at least one defined intermediate temperature area at a temperature lower than the temperature of the hot-spot area. The device also comprises a cooling structure comprising at least o... | 11/22/2011 |
| 8063484 | Semiconductor device and heat sink with 3-dimensional thermal conductivity A semiconductor device, comprising: a semiconductor element 20 having a rectangular two-dimensional geometry and serving as a heat source; and a heat sink section 25 having the semiconductor element 20 mounted thereon, wherein a relation among t... | 11/22/2011 |
| 8039952 | System and method for dissipating heat from a semiconductor module The system includes a circuit board, a semiconductor module, a heat dissipator, and at least one thermal via. The circuit board has substantially flat opposing first and second sides. The semiconductor module includes multiple semiconductor devices. The semiconducto... | 10/18/2011 |
| 8035222 | Semiconductor device A semiconductor device formed by using semiconductor packages is provided. The semiconductor device includes two semiconductor packages adjacently arranged in opposite directions on an inductive conductor. Terminals of the two semiconductor packages are joined by a ... | 10/11/2011 |
| 8030760 | Semiconductor apparatus and manufacturing method thereof A semiconductor apparatus includes a semiconductor device, a cooler of a forced cooling type, and a heat mass. Heat generated in the semiconductor device is conducted to the cooler. The heat mass comes into junction with the semiconductor device with solder so as to... | 10/04/2011 |
| 8026596 | Thermal designs of packaged gallium nitride material devices and methods of packaging Gallium nitride material devices and methods associated with the devices are described. The devices may be designed to provide enhanced thermal conduction and reduced thermal resistance. The increased thermal conduction through and out of the gallium nitride devices... | 09/27/2011 |
| 8022534 | Semiconductor package using an active type heat-spreading element A semiconductor package includes a carrier, a chip, a stiffener, a heat spreader and an active type heat-spreading element. The chip and the stiffener are disposed on the carrier. The heat spreader is disposed on the stiffener and includes a through opening. The act... | 09/20/2011 |
| 8022533 | Circuit apparatus provided with asperities on substrate surface Circuit elements including a plurality of semiconductor devices and passive elements embedded in an insulating resin film are formed on a metal substrate having a surface roughness Ra of 0.3 to 10 μm. This produces an anchoring effect occurs between the substrate a... | 09/20/2011 |
| 8013439 | Injection molded metal stiffener for packaging applications In some embodiments, an injection molded metal stiffener for packaging applications is presented. In this regard, an apparatus is introduced comprising a microelectronic device package substrate, a microelectronic device coupled with a top surface of the package sub... | 09/06/2011 |
| 7999374 | Semiconductor component having adhesive squeeze-out prevention configuration and method of manufacturing the same A semiconductor component includes a semiconductor element that has a plurality of signals, a wiring board that is disposed below the semiconductor element and that draws the plurality of signals of the semiconductor element, a heat conduction member that dissipates... | 08/16/2011 |
| 7999373 | Arrangement having at least one electronic component The invention relates to an arrangement comprising at least one electronic component and a cooling body associated therewith. A support physically interposed between the electronic component and the cooling body and the support has at least one layer with at least o... | 08/16/2011 |
| 7989948 | Chip package structure and method of fabricating the same A chip package structure including a heat dissipation substrate, a chip and a heterojunction heat conduction buffer layer is provided. The chip is disposed on the heat dissipation substrate. The heterojunction heat conduction buffer layer is disposed between the hea... | 08/02/2011 |
| 7982307 | Integrated circuit chip assembly having array of thermally conductive features arranged in aperture of circuit substrate An assembly comprises a stiffener, a circuit substrate and an IC chip. The stiffener has a surface with a first region and a second region. The circuit substrate covers at least a portion of the first region of the stiffener, while the IC chip overlies at least a po... | 07/19/2011 |
| 7964958 | Heatsink structure for solid-state image sensor A heatsink structure for solid-state image sensors includes a foil-like heatsink sheet made of a high heat conductivity material. The heatsink sheet has a first fixed portion fixed to a solid-state image sensor and a second fixed portion fixed to another member. The... | 06/21/2011 |
| 7960827 | Thermal via heat spreader package and method A thermal via heat spreader package includes an electronic component having an active surface including a nonfunctional region. A package body encloses the electronic component, the package body comprising a principal surface. Thermal vias extend from the principal ... | 06/14/2011 |
| 7956457 | System and apparatus for venting electronic packages and method of making same An apparatus and method, the apparatus includes a substrate configured to support a plurality of dielectric layers, a device coupling area positioned in the substrate, and a plurality of gas exit apertures formed through the substrate. The plurality of gas exit aper... | 06/07/2011 |
| 7952190 | Fabrication of microelectronic devices A method and apparatus for fabrication of microelectronic devices are shown. In an embodiment of the invention, a microelectronic device comprises a die, the die comprising a first side, a second side, and an edge; a first plate, the first plate coupled with the die... | 05/31/2011 |
| 7952192 | Melting temperature adjustable metal thermal interface materials and packaged semiconductors including thereof A melting temperature adjustable metal thermal interface material (TIM) and a packaged semiconductor including thereof are provided. The metal TIM includes about 20-98 wt % of In, about 0.03-4 wt % of Ga, and at least one element of Bi, Sn, Ag and Zn. The metal TIM ... | 05/31/2011 |
| 7952191 | Semiconductor device A semiconductor device of the present invention includes a wiring substrate, a plurality of semiconductor chips mounted on the wiring substrate, and a radiation plate arranged over a plurality of semiconductor chips, and having a cooling passage to flow water in a h... | 05/31/2011 |
| 7944045 | Semiconductor module molded by resin with heat radiation plate opened outside from mold A semiconductor module and a method of manufacturing the same are disclosed including a semiconductor element having an electrode, a heat radiation plate placed in thermal contact with a main surface of the semiconductor element and electrically connected to the ele... | 05/17/2011 |
| 7932596 | Thermally enhanced electronic flip-chip packaging with external-connector-side die and method A method and apparatus for making a package having improved heat conduction characteristics and high frequency response. A relatively thick package substrate, such as copper, has a wiring layer bonded to one face, leaving the opposite face exposed, for example, to b... | 04/26/2011 |
| 7928562 | Segmentation of a die stack for 3D packaging thermal management An apparatus to reduce a thermal penalty of a three-dimensional (3D) die stack for use in a computing environment is provided and includes a substrate installed within the computing environment, a first component to perform operations of the computing environment, w... | 04/19/2011 |
| 7928561 | Device for thermal transfer and power generation A system is provided. The system includes a device that includes top and bottom thermally conductive substrates positioned opposite to one another, wherein a top surface of the bottom thermally conductive substrate is substantially atomically flat and a thermal bloc... | 04/19/2011 |
| 7919854 | Semiconductor module with two cooling surfaces and method A semiconductor module with two cooling surfaces and method. One embodiment includes a first carrier with a first cooling surface and a second carrier with a second cooling surface. The first cooling surface is arranged in a first plane, the second cooling surface i... | 04/05/2011 |
| 7915729 | Load driving semiconductor apparatus A load driving semiconductor apparatus includes: a driving transistor, which operates based on an input voltage from an external circuit; a power semiconductor device controlling power supply to a load in such a manner that the power semiconductor device supplies el... | 03/29/2011 |
| 7911051 | Electronic circuit arrangement and method for producing an electronic circuit arrangement An electronic circuit arrangement includes a heat sink and a first circuit carrier which is thermally coupled to the heat sink, lies flat on the latter and is intended to wire electronic components of the circuit arrangement. Provided for at least one electronic com... | 03/22/2011 |
| 7911050 | Semiconductor device and method for manufacturing the same A COF which can effectively dissipate the heat by using a simple structure and its manufacturing method. A semiconductor device of COF, which is formed over the main surface of a flexible substrate having no device hole and where a semiconductor chip is mounted over... | 03/22/2011 |
| 7898078 | Power connector/decoupler integrated in a heat sink Two sets of conductor fins are formed on a topmost surface of stacked semiconductor chips. The two sets of conductor fins are electrically isolated from each other, and function as radiators that dissipate heat from the stacked semiconductor chips. Conductive wiring... | 03/01/2011 |
| 7888793 | Device package and methods for the fabrication and testing thereof Provided are methods of forming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via h... | 02/15/2011 |
| 7875972 | Semiconductor device assembly having a stress-relieving buffer layer Disclosed is a multilayer thermal interface material which includes a first layer of metallic thermal interface material, a buffer layer and preferably a second layer of thermal interface material which may be metallic or nonmetallic. The multilayer thermal interfac... | 01/25/2011 |
| 7872348 | Semiconductor device A semiconductor device formed by using semiconductor packages is provided. The semiconductor device includes two semiconductor packages adjacently arranged in opposite directions on an inductive conductor. Terminals of the two semiconductor packages are joined by a ... | 01/18/2011 |
| 7868450 | Semiconductor package A semiconductor package includes a base plate having first and second surfaces both facing in opposite directions, and a plurality of anisotropic heat conducting members disposed in the base plate and spaced away from each other. A semiconductor element having a hea... | 01/11/2011 |
| 7859102 | Multi-layer stacked wafer level semiconductor package module A stacked wafer level semiconductor package module includes a semiconductor chip module including first and second semiconductor chips each having a rectangular shape. The first semiconductor chip has first pads disposed along a first short side of a lower surface t... | 12/28/2010 |
| 7851905 | Microelectronic package and method of cooling an interconnect feature in same A microelectronic package comprises a substrate (110, 310), a die (320) supported by the substrate, an interconnect feature (130, 230, 330) connecting the die and the substrate to each other, and a thermoelectric cooler (140, 170, 240, 340 | 12/14/2010 |
| 7847395 | Package and package assembly of power device A package and a package assembly for a power device having a high operation voltage and impulse voltage are provided. The package assembly for a power device comprises an assembly wherein the power device is encapsulated and electrically connected to a lead protrudi... | 12/07/2010 |