Bizarre Patents
A fork with timer for providing a cue to a user after an elapsed period of time for indicating that another bite of food using the fork may be taken.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8183569 | Semiconductor device To realize a semiconductor device including a capacitor element capable of obtaining a sufficient capacitor without reducing an opening ratio, in which a pixel electrode is flattened in order to control a defect in orientation of liquid crystal. A semiconductor devi... | 05/22/2012 |
| 8124978 | Capacitor and method of manufacturing the same A capacitor and method of manufacturing the same include an insulating interlayer, a lower electrode, a protection structure, a dielectric layer and an upper electrode. The insulating interlayer may include a conductive pattern formed on a substrate. The lower elect... | 02/28/2012 |
| 8106399 | Electrophoretic display device and method of fabricating the same An electrophoretic display device includes a gate line on a substrate, a common line parallel to the gate line, a gate insulating layer on the gate line and the common line, a data line on the gate insulating layer, the data line crossing the gate line to define a p... | 01/31/2012 |
| 8053779 | Thin film transistor panel, method of fabricating the same, and organic light emitting display device including the same Provided are a thin film transistor (TFT) panel, a method of fabricating the same, and an organic light emitting display device (OLED) including the same. The TFT panel has a TFT region and a capacitor region. A TFT is formed in the TFT region and a capacitor is for... | 11/08/2011 |
| 8035107 | Method for manufacturing display device A first conductive film, a first insulating film, a semiconductor film, an impurity semiconductor film, a second conductive film, and a first resist mask are formed; first etching is performed to expose at least a surface of the first conductive film; second etching... | 10/11/2011 |
| 8030656 | Pixel, organic light emitting display and associated methods, in which a pixel transistor includes a non-volatile memory element A pixel includes an organic light emitting diode, a first transistor having a source coupled to a first power source, a control gate coupled to a first node, and a drain coupled to a second node, wherein the first transistor includes a floating gate and an insulatin... | 10/04/2011 |
| 7964874 | Semiconductor device having a protective circuit A semiconductor display device with an interlayer insulating film in which surface levelness is ensured with a limited film formation time, heat treatment for removing moisture does not take long, and moisture in the interlayer insulating film is prevented from esca... | 06/21/2011 |
| 7939827 | Semiconductor device To realize a semiconductor device including a capacitor element capable of obtaining a sufficient capacitor without reducing an opening ratio, in which a pixel electrode is flattened in order to control a defect in orientation of liquid crystal. A semiconductor devi... | 05/10/2011 |
| 7829892 | Integrated circuit including a gate electrode An integrated circuit including a gate electrode is disclosed. One embodiment provides a transistor including a first source/drain electrode and a second source/drain electrode. A channel is arranged between the first and the second source/drain electrode in a semic... | 11/09/2010 |
| 7732816 | Semiconductor device A semiconductor integrated circuit device, such as a memory device or radiation detector, is disclosed, in which data storage cells are formed on a substrate. Each of the data storage cells includes a field effect transistor having a source, drain, and gate, and a b... | 06/08/2010 |
| 7675066 | Erase-on-demand memory cell An erase-on-demand memory cell 10(1) includes a memory layer 110 and a heating layer 130 that can heat memory layer 110 to at least an erase-effective temperature, to erase its data contents. Memory chips 270(1) and e... | 03/09/2010 |
| 7671368 | Capacitor and light emitting display using the same A capacitor including a polysilicon layer doped with impurities to be conductive, a first dielectric layer formed on the polysilicon layer, a first conductive layer formed on the first dielectric layer, a second dielectric layer formed on the first conductive layer,... | 03/02/2010 |
| 7667234 | High density memory array having increased channel widths A memory array having decreased cell sizes and having transistors with increased channel widths. More specifically, pillars are formed in a substrate such that sidewalls are exposed. The sidewalls of the pillars and the top surface of the pillars are covered with a ... | 02/23/2010 |
| 7582902 | Raw material carbon composition for carbon material for electrode in electric double layer capacitor The present invention provides a raw material carbon composition that is converted to a carbon material for an electrode in an electric double layer capacitor that can develop a high level of electrostatic capacity with good reproducibility without producing any syn... | 09/01/2009 |
| 7541616 | Semiconductor device A semiconductor integrated circuit device, such as a memory device or radiation detector, is disclosed, in which data storage cells are formed on a substrate. Each of the data storage cells includes a field effect transistor having a source, drain, and gate, and a b... | 06/02/2009 |
| 7528410 | Semiconductor device and method for manufacturing the same A semiconductor device that can be manufactured with a reduced cost by decreasing the number of masks is disclosed, and a method for manufacturing the semiconductor device is disclosed. The method for manufacturing the semiconductor device comprises the steps of: fo... | 05/05/2009 |
| 7482630 | NAND memory arrays A NAND memory array has a substrate, a source select gate formed on the substrate, and a drain select gate formed on the substrate. A string of floating-gate memory cells is formed on the substrate and is connected in series between the source select gate and the dr... | 01/27/2009 |
| 7473927 | Thin film transistors array and pixel structure A pixel structure having a storage capacitor therein is provided. The pixel structure comprises a substrate, a first capacitor electrode, a capacitor dielectric layer, a second capacitor electrode, a passivation layer and a pixel electrode. The first capacitor elect... | 01/06/2009 |
| 7439565 | Active devices array substrate and repairing method thereof An active device array substrate including a substrate, a plurality of active devices, a plurality of the first lead lines, a plurality of the second lead lines and a first floating light-shielding layer is provided. The substrate has a display region and a peripher... | 10/21/2008 |
| 7432527 | Thin film transistor substrate and liquid crystal display A TFT substrate comprises a substrate, a gate electrode and a lower electrode of a capacitor formed thereon, a first insulating layer formed thereon, a channel layer above the gate electrode and a lower layer of an upper electrode of the capacitor, a channel protect... | 10/07/2008 |
| 7414278 | Semiconductor device with shallow trench isolation which controls mechanical stresses The semiconductor device comprises a semiconductor substrate 10 with a trench 16a and a trench 16b formed in; a device isolation film 32a buried in the trench 16a and including a liner film including a s... | 08/19/2008 |
| 7384476 | Method for crystallizing silicon A method for crystallizing silicon is provided. The method includes: forming an amorphous silicon layer on a substrate; aligning a mask above the substrate, the mask being divided into a plurality of blocks, each block having at least two transmission patterns, the ... | 06/10/2008 |
| 7375376 | Semiconductor display device and method of manufacturing the same A semiconductor display device with an interlayer insulating film in which surface levelness is ensured with a limited film formation time, heat treatment for removing moisture does not take long, and moisture in the interlayer insulating film is prevented from esca... | 05/20/2008 |
| 7368752 | DRAM memory cell A DRAM memory cell is provided with a selection transistor, which is arranged horizontally at a semiconductor substrate surface and has a first source/drain electrode, a second source/drain electrode, a channel layer arranged between the first and the second source/... | 05/06/2008 |
| 7365412 | Vertical parallel plate capacitor using spacer shaped electrodes and method for fabrication thereof A capacitor structure uses an aperture located within a dielectric layer in turn located over a substrate. A pair of conductor interconnection layers embedded within the dielectric layer terminates at a pair of opposite sidewalls of the aperture. A pair of capacitor... | 04/29/2008 |
| 7355203 | Use of gate electrode workfunction to improve DRAM refresh This invention relates to a method and resulting structure, wherein a DRAM may be fabricated by using silicon midgap materials for transistor gate electrodes, thereby improving refresh characteristics of access transistors. The threshold voltage may be set with redu... | 04/08/2008 |
| 7355231 | Memory circuitry with oxygen diffusion barrier layer received over a well base A method of forming memory circuitry having a memory array having a plurality of memory capacitors and having peripheral memory circuitry operatively configured to write to and read from the memory array, includes forming a dielectric well forming layer over a semic... | 04/08/2008 |
| 7355230 | Transistor array for semiconductor memory devices and method for fabricating a vertical channel transistor array A transistor array for semiconductor memory devices is provided. A plurality of semiconductor pillars extending outwardly from a bulk section of a semiconductor substrate is arranged in rows and columns. Each pillar forms an active area of a vertical channel access ... | 04/08/2008 |
| 7352375 | Driving method of light emitting device A method of driving a light emitting device in which a plurality of pixels having a light emitting element are formed, characterized by including: setting j display periods (where j is a natural number) to appear in one frame period, each of the j display periods co... | 04/01/2008 |
| 7348599 | Semiconductor device and manufacturing method thereof A p channel TFT of a driving circuit has a single drain structure and its n channel TFT, a GOLD structure or an LDD structure. A pixel TFT has the LDD structure. A pixel electrode disposed in a pixel portion is connected to the pixel TFT through a hole bored in at l... | 03/25/2008 |
| 7348598 | Thin film transistor and liquid crystal display device using the same A TFT, in which source and drain electrodes having concentric circular shapes are formed, reduces an OFF current caused by a leakage current and optimizes an ON current and a stray capacitance between gate and source electrodes. The TFT includes a gate electrode for... | 03/25/2008 |
| 7339191 | Capacitors having doped aluminum oxide dielectrics Doped aluminum oxide layers having a porous aluminum oxide layer and methods of their fabrication. The porous aluminum oxide layer may be formed by evaporation physical vapor deposition techniques to facilitate formation of a high-purity aluminum oxide layer. A dopa... | 03/04/2008 |
| 7335919 | Active matrix organic electroluminescent display device including organic thin film transistor and method of manufacturing the display device Provided is an active matrix organic electroluminescent (EL) display device including an organic thin film transistor (TFT), preferably n-type, having a higher aperture ratio and easily realized in an array structure. The display device includes a facing electrode; ... | 02/26/2008 |
| 7335934 | Integrated circuit device, and method of fabricating same There are many inventions described and illustrated herein. In a first aspect, the present invention is directed to integrated circuit device including SOI logic transistors and SOI memory transistors, and method for fabricating such a device. In one embodiment, int... | 02/26/2008 |
| 7332418 | High-density single transistor vertical memory gain cell A memory cell which is formed on a substrate of a first conductivity type. A pillar of the first conductivity type extends vertically upward from the substrate. A source region of a second conductivity type is formed in the substrate extending adjacent to and away f... | 02/19/2008 |
| 7330168 | Display device A source of a driving transistor for driving an organic EL element functions as a first capacitance electrode layer. A second capacitance electrode layer is formed on the source through a gate insulating film of the driving transistor. The second capacitance electro... | 02/12/2008 |
| 7326985 | Method for fabricating metallic bit-line contacts A memory cell and method of forming the same is provided. To make contact between a bit line and a select transistor of a dynamic memory unit on a semiconductor wafer, a contact hole is filled with a metal or a metal alloy. A liner layer may be introduced between th... | 02/05/2008 |
| 7315054 | Decoupling capacitor density while maintaining control over ACLV regions on a semiconductor integrated circuit In one embodiment, a method of controlling the across-chip line-width variation (ACLV) on a semiconductor integrated circuit includes forming an ACLV controlled region including a plurality of semiconductor devices each having a gate structure and arranging the plur... | 01/01/2008 |
| 7306979 | Method of fabricating thin film transistor substrate for display device A method of fabricating a thin film transistor substrate for a display device is provided. The method includes the steps of forming a gate line and a gate electrode connected to the gate line; forming a gate insulating film disposed covering the gate line and the ga... | 12/11/2007 |
| 7301238 | Structure and method of forming an enlarged head on a plug to eliminate the enclosure requirement The contact opening through an insulating layer is formed having a straight sidewall portion and a bowl shaped sidewall portion. The bowl shaped sidewall portion is near the top of the insulation layer to provide an enlarged diameter of the contact opening at the to... | 11/27/2007 |
