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| Number | Title | Issue Date |
| 7939933 | Semiconductor device A semiconductor device includes: a semiconductor element; a die pad with the semiconductor element mounted thereon; a plurality of electrode terminals each having a connecting portion electrically connected with the semiconductor element; and a sealing resin for sea... | 05/10/2011 |
| 7880290 | Flip-chip packages allowing reduced size without electrical shorts and methods of manufacturing the same A flip-chip package may include: a semiconductor chip having first pads arranged substantially along a first direction; a substrate having second pads, arranged substantially in a zigzag form aligned with the first pads as a center line, and facing the semiconductor... | 02/01/2011 |
| 7868447 | Solid-state image sensing apparatus and package of same Warpage and twist of a solid-state image sensing apparatus is controlled, thereby preventing displacement occurring to the solid-state image sensing apparatus when it is mounted on a printed circuit board. The solid-state image sensing apparatus comprises a pluralit... | 01/11/2011 |
| 7847392 | Semiconductor device including leadframe with increased I/O In accordance with the present invention, there is provided a semiconductor package (e.g., a QFP package) including a uniquely configured leadframe sized and configured to maximize the available number of exposed leads in the semiconductor package. More particularly... | 12/07/2010 |
| 7737546 | Surface mountable semiconductor package with solder bonding features A packaged circuit element such as an LED and a method for making the same are disclosed. The packaged circuit element includes a lead frame, a molded body, and a die containing the circuit element. The lead frame has first and second leads, each lead having first a... | 06/15/2010 |
| 7732912 | Semiconductor chip packages and assemblies with chip carrier units A microelectronic element package has one or more individual carrier units overlying a region or regions of the front or rear surface of the microelectronic element, leaving other regions of the microelectronic element surface uncovered. The carrier units can be mad... | 06/08/2010 |
| 7663222 | Semiconductor device and method for producing same The semiconductor device includes a semiconductor body having a first and an opposite second main surface and side faces connecting the main surfaces, a circuit region in the semiconductor body adjacent to the first main surface, having a circuit contact terminal, a... | 02/16/2010 |
| 7663223 | Coupling substrate for semiconductor components and method for producing the same A coupling substrate for semiconductor components includes a patterned metal layer on a topside of an insulating carrier. Metal tracks project beyond the insulating carrier, the metal tracks being angled away at the lateral edges of the carrier in the direction of t... | 02/16/2010 |
| 7652367 | Semiconductor package on package having plug-socket type wire connection between packages A semiconductor package on package includes a tower package, an upper package stacked over the lower package, a plug wire combined to any one of an upper portion of the tower package and a lower portion of the upper package, and a socket wire combined to any one of ... | 01/26/2010 |
| 7615859 | Thin semiconductor package having stackable lead frame and method of manufacturing the same Provided is a thin semiconductor package comprising a semiconductor chip and a lead frame, the lead frame including a paddle portion configured for mounting the semiconductor chip in a manner that exposes bonding pads within an aperture formed in a center portion of... | 11/10/2009 |
| 7612445 | Circuit apparatus and method of fabricating the apparatus The likelihood of exfoliation of a sealing resin layer at a pad electrode part is reduced so that the reliability of a circuit apparatus is improved. A circuit apparatus includes a wiring layer, a gold plating layer, an insulating resin layer, a circuit element, a c... | 11/03/2009 |
| 7531895 | Integrated circuit package and method of manufacture thereof An integrated circuit (IC) package that comprises a lead frame. The lead frame has a downset portion and leads. The downset portion has an exterior surface that is configured to face away from a mounting board, and an interior surface that is configured to face towa... | 05/12/2009 |
| 7440263 | Image sensor and method for manufacturing the same An image sensor and a method for manufacturing the same. The image sensor includes a substrate, a photosensitive chip mounted to the substrate, a plurality of wires for electrically connecting the photosensitive chip to the substrate, a frame layer mounted to the su... | 10/21/2008 |
| 7425759 | Semiconductor chip assembly with bumped terminal and filler A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line, a bumped terminal and a filler, a connection joint that electrically connects the routing line and the pad, and an encapsulan... | 09/16/2008 |
| 7420216 | Reflection type light-emitting diode device A reflection type light-emitting diode device of a kind capable of emitting rays of light to the outside after having been reflected by a reflecting surface includes a recessed casing (22) having a cavity defining the reflecting surface (15) and also h... | 09/02/2008 |
| 7417310 | Circuit module having force resistant construction Impact resistant circuit modules are disclosed for enclosing a die having a sensor area. Preferred modules include a flexible circuit and a die coupled thereto. The flexible circuit is preferably folded over compressible material to help absorb applied forces. A gap... | 08/26/2008 |
| 7414301 | Printed circuit board with soldering lands The present invention provides a printed circuit board having an area of non-resist portion, where each non-resist portion expands gradually toward the back end of a land array in the dipping direction A. Thus the area of solder deposition also expands in the region... | 08/19/2008 |
| 7414308 | Integrated circuit with offset pins An integrated circuit comprises a package and having adjacent connection pins on two opposite sides of the package, with every second connection pin being inwardly bent so that the connection pins are offset. The ends of the inwardly bent connection pins and the end... | 08/19/2008 |
| 7399990 | Wafer-level package having test terminal A wafer-level package includes a semiconductor wafer having at least one semiconductor chip circuit forming region each including a semiconductor chip circuit each provided with test chip terminals and non test chip terminals, at least one external connection termin... | 07/15/2008 |
| 7391100 | Integrated circuit package for semiconductor devices having a reduced leadframe pad and an increased bonding area A semiconductor integrated circuit package having a leadframe (108) that includes a leadframe pad (103a) disposed under a die (100) and a bonding metal area (101a) that is disposed over at least two adjacent sides of the die... | 06/24/2008 |
| 7385227 | Compact light emitting device package with enhanced heat dissipation and method for making the package A light emitting device package and method for making the package utilizes a first leadframe having a first surface and a second leadframe having a second surface that are relatively positioned such that the second surface is at a higher level than the first surface... | 06/10/2008 |
| 7375418 | Interposer stacking system and method The present invention provides a system and method for selectively stacking and interconnecting leaded packaged integrated circuit devices with connections between the feet of leads of an upper IC element and the upper shoulder of leads of a lower IC element while t... | 05/20/2008 |
| 7375421 | High density multilayer circuit module Thinning and stacking are essential for circuit modules used for mobile devices of various kinds, smart cards, memory cards and the like. These demands make the manufacture of the circuit modules more complicated or less reliable due to delamination. A circuit modul... | 05/20/2008 |
| 7371609 | Stacked module systems and methods The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. In a preferred embodiment in accordance with the invention, a form standard associated with one or more CSPs provides a physical f... | 05/13/2008 |
| 7372153 | Integrated circuit package bond pad having plurality of conductive members An integrated circuit package bond pad includes an insulating layer and an electrode located over the insulating layer. The electrode has a first surface configured to be bonded to external circuitry and a second surface opposite the first surface. A plurality of co... | 05/13/2008 |
| 7372138 | Routing element for use in multi-chip modules, multi-chip modules including the routing element and methods A routing element for use in a semiconductor device assembly includes a substrate that carries conductive traces that provide either additional electrical paths or shorter electrical paths than those provided by a carrier substrate of the semiconductor device assemb... | 05/13/2008 |
| 7361533 | Stacked embedded leadframe A method of forming a stackable embedded leadframe package includes coupling an electronic component having bond pads to a substrate; coupling on the substrate a leadframe having a plurality of leads, each lead having a lower mounting portion; encapsulating the elec... | 04/22/2008 |
| 7363044 | System and method for aiding a location determination in a positioning system The invention provides a cellular telephone or other communications device with improved satellite positioning capability. A location reference point and a selective uncertainty range may be used as aiding information to seed a global positioning calculation. In emb... | 04/22/2008 |
| 7361983 | Semiconductor device and semiconductor assembly module with a gap-controlling lead structure In a semiconductor device (1), semiconductor elements (2) and (3) are mounted on a lead frame (5) having leads (4). The semiconductor elements (2) and (3) are connected with the leads (4) by metallic wires (... | 04/22/2008 |
| 7352054 | Semiconductor device having conducting portion of upper and lower conductive layers A semiconductor device includes a base plate, at least one first conductive layer carried by the base plate, and a semiconductor constructing body formed on or above the base plate, and having a semiconductor substrate and a plurality of external connecting electrod... | 04/01/2008 |
| 7338292 | Board-to-board electronic interface using hemi-ellipsoidal surface features A board-to-board interconnect is presented. The interconnect is fashioned from solder beads or hemi-ellipsoidal surface features on a surface of a printed circuit board and contact pads on a second printed circuit board. ... | 03/04/2008 |
| 7335975 | Integrated circuit stacking system and method The present invention stacks packaged integrated circuits into modules that conserve PWB or other board surface area. The invention provides techniques and structures for aggregating chip scale-packaged integrated circuits (CSPs) or leaded packages with other CSPs o... | 02/26/2008 |
| 7335970 | Semiconductor device having a chip-size package Disclosed are a semiconductor device, a method for manufacturing the same, and a method for mounting the same. The method for manufacturing a semiconductor device includes the steps of: preparing a package film having a planar configuration whose region is divided i... | 02/26/2008 |
| 7335532 | Method of assembly for multi-flip chip on lead frame on overmolded IC package A multichip module package uses bond wire with plastic resin on one side of a lead frame to package an integrated circuit and flip chip techniques to attach one or more mosfets to the other side of the lead frame. The assembled multichip module 30 has an inte... | 02/26/2008 |
| 7332806 | Thin, thermally enhanced molded package with leadframe having protruding region A semiconductor die package. It includes (a) a semiconductor die including a first surface and a second surface, (b) a source lead structure including protruding region having a major surface, the source lead structure being coupled to the first surface, (c) a gate ... | 02/19/2008 |
| 7332817 | Die and die-package interface metallization and bump design and arrangement A die metallization and bump design/arrangement, and a die-package interface metallization and bump design/arrangement are described herein. ... | 02/19/2008 |
| 7323769 | High performance chip scale leadframe package with thermal dissipating structure and annular element and method of manufacturing package An integrated circuit package is disclosed. The package comprises a plurality of leads, each lead having a first face and a second face opposite to the first face. The package also comprises a die pad having a first face and a second face opposite to the first face.... | 01/29/2008 |
| 7319338 | Chip tester for testing validity of a chipset A chip tester is mounted on a circuit board for testing validity of a chipset includes a base member that receives the chipset thereon and that has a plurality of testing contacts in electrical communication with the circuit board and, and a top cover that is mounte... | 01/15/2008 |
| 7319265 | Semiconductor chip assembly with precision-formed metal pillar A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line and a metal pillar, a connection joint that electrically connects the routing line and the pad, and an encapsulant. The metal ... | 01/15/2008 |
| 7315077 | Molded leadless package having a partially exposed lead frame pad Provided are a molded leadless package, and a sawing type molded leadless package and method of manufacturing same. The molded leadless package includes a lead frame pad having first and second surfaces opposite to each other. A semiconductor chip is adhered to the ... | 01/01/2008 |
