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...When G.G. Hubbard learned of his future son-in-law's invention, he called it "only a toy." His daughter was engaged to a young man named Alexander Graham Bell.
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| Number | Title | Issue Date |
| 8188579 | Semiconductor device including leadframe having power bars and increased I/O In accordance with the present invention, there is provided a semiconductor package (e.g., a QFP package) including a uniquely configured leadframe sized and configured to maximize the available number of exposed leads in the semiconductor package. More particularly... | 05/29/2012 |
| 8188580 | Semiconductor device, semiconductor element, and substrate A semiconductor device, a semiconductor element, and a substrate are provided, which allow the semiconductor element to be provided with a reduced size when combined. The semiconductor device has a rectangular semiconductor element mounted on a substrate formed with... | 05/29/2012 |
| 8178954 | Structure of mixed semiconductor encapsulation structure with multiple chips and capacitors A semiconductor package for power converter application comprises a low-side MOSFET chip and a high-side MOSFET chip stacking one over the other. The semiconductor package may further enclose a capacitor whereas the capacitor may be a discrete component or an integr... | 05/15/2012 |
| 8174096 | Stamped leadframe and method of manufacture thereof A stamped leadframe for a leadless package and a method of manufacturing the same are provided wherein the leadframe has at least a die pad, a frame, tie bars connecting the die pad to the frame and a plurality of leads. Each lead comprises a first portion and a sec... | 05/08/2012 |
| 8169062 | Integrated circuit package for semiconductior devices with improved electric resistance and inductance A semiconductor integrated circuit package having a leadframe (108) that includes a leadframe pad (103a) disposed under a die (100) and a bonding metal area (101a) that is disposed over at least two adjacent sides of the die... | 05/01/2012 |
| 8169061 | Stacked chip package structure with leadframe having bus bar The present invention provides a chip-stacked package structure with leadframe having bus bar, comprising: a leadframe composed of a plurality of inner leads arranged in rows facing each other, a plurality of outer leads, and a die pad, wherein the die pad is provid... | 05/01/2012 |
| 8159052 | Apparatus and method for a chip assembly including a frequency extending device A chip assembly includes a chip, a paddle, an interface layer, a frequency extending device, and lands. The chip has contacts. The interface layer is disposed between the chip and the paddle. The frequency extending device has at least a conductive layer and a diele... | 04/17/2012 |
| 8154109 | Leadframe having delamination resistant die pad A lead frame (410) including a die pad (100) for mounting at least one integrated circuit (405) thereon and a plurality of lead fingers (413). The die pad (100) includes a metal including substrate (105) having a periphery t... | 04/10/2012 |
| 8154108 | Dual-leadframe multi-chip package and method of manufacture A dual-leadframe multi-chip package comprises a first leadframe with a first die pad, and a second leadframe with a second die pad; a first chip mounted on the first die pad functioning as a high-side MOSFET and second chip mounted on the second die pad functioning ... | 04/10/2012 |
| 8143707 | Semiconductor device A semiconductor device includes a circuit base including an inner lead portion and an outer lead portion. The inner lead portion has a plurality of inner leads. At least part of the inner leads is routed inside a chip mounting area. On both upper and lower surfaces ... | 03/27/2012 |
| 8125060 | Electronic component with layered frame An electronic component is disclosed. In one embodiment, the electronic component includes a frame having a base layer, a first layer, a second layer including palladium placed on the first layer, and a third layer including gold placed on the second layer. A semico... | 02/28/2012 |
| 8125062 | Lead frame, lead frame fabrication, and semiconductor device Lead frames and their fabricating method which reduce generation of defects in the process of fabricating semiconductor devices, in particular connection defects in wire bonding, thereby improving the product yield and reliability, and semiconductor devices using th... | 02/28/2012 |
| 8125061 | Semiconductor package and method of manufacturing the same A semiconductor package is provided. The semiconductor package includes a carrier, a die, a metal sheet and a molding compound. The die is disposed on the carrier. The metal sheet has a first portion and a second portion, wherein a receiving space is defined by the ... | 02/28/2012 |
| 8120148 | Package structure with embedded die and method of fabricating the same A package structure with an embedded die includes a core layer, a first build-up wiring structure, and a second build-up wiring structure. The core layer has a first surface and a second surface opposite thereto. Besides, the core layer includes a first dielectric l... | 02/21/2012 |
| 8110904 | Lead frame for semiconductor device and method of manufacturing of the same Provided are a semiconductor device lead frame and a method of manufacturing of the same that improve adhesive properties between plating layers when a plurality of plating layers are laminated, that control deterioration in wire bonding properties during the manufa... | 02/07/2012 |
| 8110903 | QFN package An improved Quad Flat No-Lead package is described. The package is formed by encapsulating a die mounted on a leadframe with a moulding compound using a mould chase. The mould chase comprises a number of internal projections which form openings in the mould compound... | 02/07/2012 |
| 8106489 | Integrated circuit package and packaging method A package and packaging method are provided that enable packaging of larger dies and/or smaller packages. Generally, the method includes steps of: (i) reducing a thickness of a portion of a top surface of leads of a leadframe extending into a package being formed; (... | 01/31/2012 |
| 8106490 | Semiconductor chip package A semiconductor chip package comprises a lead frame having a chip carrier having a first surface and an opposite second surface. A first semiconductor chip is mounted on the first surface, having a plurality of bonding pads thereon, wherein the first semiconductor c... | 01/31/2012 |
| 8102037 | Leadframe for semiconductor package A semiconductor package including a lead frame comprising a frame including both a ground ring and a chip mounting board located therein. Extending between the ground ring and the chip mounting board are a plurality of elongate slots or apertures. The ground ring is... | 01/24/2012 |
| 8097933 | Flexible semiconductor package and method for fabricating the same A flexible semiconductor package includes a flexible substrate. A data chip is disposed over the flexible substrate. The data chip includes a data storage unit for storing data and first bonding pads that are electrically connected to the data storage unit. A contro... | 01/17/2012 |
| 8084847 | Prefabricated lead frame and bonding method using the same A prefabricated lead frame to bond a chip and a substrate, and a bonding method using the prefabricated lead frame. The prefabricated lead frame includes an inner ring, an outer ring, and a plurality of wires, wherein inner ends and outer ends of the wires are respe... | 12/27/2011 |
| 8084846 | Balanced semiconductor device packages including lead frame with floating leads and associated methods A semiconductor device assembly or package includes at least one semiconductor device that is positioned adjacent to floating leads. Such an assembly or package may include at least two semiconductor devices that face opposite directions from one another, with each ... | 12/27/2011 |
| 8084848 | Leadframe, leadframe type package and lead lane A leadframe for a leadframe type package includes a chip base, and leads constituting lead lanes. One lead lane includes a pair of first differential signal leads, a pair of second differential signal leads, a pair of third differential signal leads between which an... | 12/27/2011 |
| 8080865 | RF-coupled digital isolator An RF-coupled digital isolator includes a first leadframe portion and a second leadframe portion, electrically isolated from one another. The first leadframe portion includes a first main body and a first finger. The second leadframe portion includes a second main b... | 12/20/2011 |
| 8076761 | Reduced inductance IC leaded package The present invention is directed a novel method and apparatus for reducing crosstalk in a lead frame based electrical device package. One cause of the crosstalk in the lead frame package is the mutual inductance between adjacent lead fingers. A conductive sheet or ... | 12/13/2011 |
| 8072050 | Semiconductor device with increased I/O leadframe including passive device In accordance with the present invention, there are provided multiple embodiments of a semiconductor package, each embodiment including a uniquely configured leadframe sized and configured to maximize the available number of exposed leads in the semiconductor packag... | 12/06/2011 |
| 8072051 | Folded lands and vias for multichip semiconductor packages Semiconductor packages and methods for making and using the same are described. The semiconductor packages contain a lead frame that has been folded to create folded leads that form a customized array of land pads and vias. The lead frame contains both longer folded... | 12/06/2011 |
| 8067822 | Integrated circuit package for semiconductor devices with improved electric resistance and inductance A semiconductor integrated circuit package having a leadframe (108) that includes a leadframe pad (103a) disposed under a die (100) and a bonding metal area (101a) that is disposed over at least two adjacent sides of the die... | 11/29/2011 |
| 8067821 | Flat semiconductor package with half package molding In accordance with the present invention, there are provided multiple embodiments of a semiconductor package, each embodiment including a uniquely configured leadframe sized and configured to maximize the available number of exposed leads in the semiconductor packag... | 11/29/2011 |
| 8063470 | Method and apparatus for no lead semiconductor package A leadframe for use in fabricating a no lead semiconductor package contains connecting bars between individual electrical contact pads. For embodiments having a die pad, the leadframe further includes connecting bars between the contact pads and the die pad. The low... | 11/22/2011 |
| 8063471 | Copper alloy sheet for electric and electronic parts A Cu—Fe—P alloy sheet that is provided with the high strength and with the improved resistance of peel off of oxidation film, in order to deal with problems such as package cracks and peeling, is provided. A copper alloy sheet for electric and electronic parts a... | 11/22/2011 |
| 8053875 | Method of manufacturing a semiconductor device The quality of a non-leaded semiconductor device is to be improved. The semiconductor device comprises a sealing body for sealing a semiconductor chip with resin, a tab disposed in the interior of the sealing body, suspension leads for supporting the tab, plural lea... | 11/08/2011 |
| 8053874 | Semiconductor package having a bridge plate connection A semiconductor package is disclosed. The package includes a leadframe having drain, source and gate leads, a semiconductor die coupled to the leadframe, the semiconductor die having a plurality of metalized source areas and a metalized gate area, a patterned source... | 11/08/2011 |
| 8049312 | Semiconductor device package and method of assembly thereof A semiconductor die package includes: an assembly including a semiconductor die, a clip structure attached to an upper surface of the semiconductor die, and a heat sink attached to an upper surface of the clip structure; and a molding material partially encapsulatin... | 11/01/2011 |
| 8039931 | Power semiconductor component having a topmost metallization layer A power semiconductor component and a method for the production of a power semiconductor component are disclosed. According to one embodiment of the invention, a topmost metallization region that is provided is formed in a manner extended laterally and outside conta... | 10/18/2011 |
| 8039932 | Lead frame, semiconductor device, method of manufacturing the lead frame, and method of manufacturing the semiconductor device A lead frame is provided which can prevent a short circuit between wires and the ends of adjacent leads, the short circuit being caused by wire sweep during the injection of molding resin, in a configuration where the electrodes of a semiconductor chip and the leads... | 10/18/2011 |
| 8035204 | Large die package structures and fabrication method therefor A method for fabricating large die package structures is provided wherein at least portions of the leadtips of at least a plurality of leadfingers of a leadframe are electrically insulated. A die is positioned on the electrically insulated leadtips. The die is elect... | 10/11/2011 |
| 8035203 | Radio frequency over-molded leadframe package An over-molded leadframe (e.g., a Quad Flat No-lead (QFN)) package capable of operating at frequencies in the range of about five gigahertz (GHz) to about 300 GHz and a method of making the over-molded leadframe package are disclosed. The over-molded leadframe packa... | 10/11/2011 |
| 8022512 | No lead package with heat spreader A no-lead electronic package including a heat spreader and method of manufacturing the same. This method includes the steps of selecting a matrix or mapped no-lead lead frame with die receiving area and leads for interconnect; positioning an integrated circuit devic... | 09/20/2011 |
| 8013428 | Whisker-free lead frames A method of fabricating an interconnection between a region of copper material and a conducting region is disclosed. The method includes a step of forming a region of tin material and a step of forming a region of nickel material. The method also includes a step of ... | 09/06/2011 |
