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| Number | Title | Issue Date |
| 8169060 | Integrated circuit package assembly including wave guide Some embodiments herein relate to a transmitter. The transmitter includes an integrated circuit (IC) package including a first antenna configured to radiate a first electromagnetic signal therefrom. A printed circuit board (PCB) substrate includes a waveguide config... | 05/01/2012 |
| 8106488 | Wafer level packaging Through vias in a substrate are formed by creating a trench in a top side of the substrate and at least one trench in the back side of the substrate. The sum of the depths of the trenches at least equals the height of the substrate. The trenches cross at intersectio... | 01/31/2012 |
| 8026579 | Silicon pillars for vertical transistors In order to form a more stable silicon pillar which can be used for the formation of vertical transistors in DRAM cells, a multi-step masking process is used. In a preferred embodiment, an oxide layer and a nitride layer are used as masks to define trenches, pillars... | 09/27/2011 |
| 7737536 | Capacitive techniques to reduce noise in high speed interconnections Structures, in various embodiments, are provided using capacitive techniques to reduce noise in high speed interconnections, such as in CMOS integrated circuits. In an embodiment, a transmission line is disposed on a first layer of insulating material, where the fir... | 06/15/2010 |
| 7602049 | Capacitive techniques to reduce noise in high speed interconnections Improved methods and structures are provided using capacitive techniques to reduce noise in high speed interconnections, such as in CMOS integrated circuits. Embodiments of an electronic device having a transmission line circuit include a first layer of electrically... | 10/13/2009 |
| 7514766 | Semiconductor device A semiconductor device in which the threshold voltage of transistors is controlled through the applied substrate bias and having relatively small size. The semiconductor device includes: a clock signal line; a shield wiring for shielding the clock signal line from a... | 04/07/2009 |
| 7449769 | Superconducting system, superconducting circuit chip, and high-temperature superconducting junction device with a shunt resistor A superconducting system that includes an interface circuit capable of making the best use of a high-speed superconducting circuit and a high-speed semiconductor circuit. A multi-chip module in which an Nb superconducting circuit having Josephson junctions formed by... | 11/11/2008 |
| 7411279 | Component interconnect with substrate shielding An example of a circuit structure may include a first dielectric layer having first and second surfaces, and a channel extending at least partially between the first and second surfaces and along a length of the first dielectric layer. First and second conductive la... | 08/12/2008 |
| 7411277 | Semiconductor integrated circuit having shield wiring A shield wiring is provided on a boundary of a target region to be shielded of macros, an inner side of the boundary, an outer side of the boundary, or an inner side and an outer side of the boundary, each being as a black box, so as to surround the target region. T... | 08/12/2008 |
| 7391637 | Semiconductor memory device with high permeability composite films to reduce noise in high speed interconnects A memory device is provided with a structure for improved transmission line operation on integrated circuits. The structure for transmission line operation includes a first layer of electrically conductive material on a substrate. A first layer of insulating materia... | 06/24/2008 |
| 7375414 | High permeability layered films to reduce noise in high speed interconnects This invention provides a structure and method for improved transmission line operation on integrated circuits. One method of the invention includes forming transmission lines in an integrated circuit. The method includes forming a first layer of electrically conduc... | 05/20/2008 |
| 7361975 | Semiconductor integrated circuit having reduced cross-talk noise A semiconductor integrated circuit, includes a shielded wire line and a shielding wire line provided for the shielded wire line and divided into a plurality of segments in a longitudinal direction of the shielded wire line. ... | 04/22/2008 |
| 7335968 | High permeability composite films to reduce noise in high speed interconnects A transmission line circuit provides a structure for improved transmission line operation on integrated circuits. The transmission line circuit includes a first layer of electrically conductive material on a substrate. A first layer of insulating material is formed ... | 02/26/2008 |
| 7327016 | High permeability composite films to reduce noise in high speed interconnects An electronic system is provided with a structure for improved transmission line operation on integrated circuits. The structure for transmission line operation includes a first layer of electrically conductive material on a substrate. A first layer of insulating ma... | 02/05/2008 |
| 7323771 | Electronic circuit device An electronic circuit device has a high-density mount board (2), on which are disposed a microcomputer (3) and random access memory (7) which are connected to each other through an exclusive memory bus (12) for high-speed data transfer, a... | 01/29/2008 |
| 7321145 | Method and apparatus for operating nonvolatile memory cells with modified band structure A nonvolatile memory cell with a charge storage structure is read by measuring current (such as band-to-band current) between the substrate region of the memory cell and at least one of the current carrying nodes of the memory cell. To enhance the operation of the n... | 01/22/2008 |
| 7294906 | Wiring technique An apparatus for supplying electrical power to a movable member. The apparatus includes a fixed member, the movable member moving relative to the fixed member, a flexible wiring member having an end connected to the movable member and another end connected to the fi... | 11/13/2007 |
| 7279778 | Semiconductor package having a high-speed signal input/output terminal A semiconductor package including a flexible tape having a mounting portion and an extended portion, a plurality of arrayed connection electrodes provided on the mounting portion of the flexible tape, and a semiconductor chip mounted on the mounting portion of the f... | 10/09/2007 |
| 7265438 | RF seal ring structure Described is a method where a seal ring is formed by stacking interconnected conductive layers along the perimeter of an integrated circuit (IC). The seal ring is formed continuously around the IC perimeter using a conductive chain with two distinct widths. Each sec... | 09/04/2007 |
| 7239002 | Integrated circuit device In a temperature sensor section of a semiconductor integrated circuit device, first vias of tungsten are formed at the topmost layer of a multi-layer wiring layer and pads of titanium are provided on regions of the multi-layer wiring layer which covers the vias. An ... | 07/03/2007 |
| 7230319 | Electronic substrate A substrate for mounting a device is disclosed. The substrate includes at least one transition for providing an RF connection to a lead of the device, the lead extending from a device input to an otherwise free end. The transition comprises two spaced apart electric... | 06/12/2007 |
| 7221586 | Memory utilizing oxide nanolaminates Structures, systems and methods for transistors utilizing oxide nanolaminates are provided. One transistor embodiment includes a first source/drain region, a second source/drain region, and a channel region therebetween. A gate is separated from the channel region b... | 05/22/2007 |
| 7221017 | Memory utilizing oxide-conductor nanolaminates Structures, systems and methods for floating gate transistors utilizing oxide-conductor nanolaminates are provided. One floating gate transistor embodiment includes a first source/drain region, a second source/drain region, and a channel region therebetween. A float... | 05/22/2007 |
| 7214586 | Methods of fabricating nonvolatile memory device A method of fabricating nonvolatile memory devices. The method includes forming a tunnel oxide layer, a stacked oxide layer, a polysilicon layer for a control gate, a buffer oxide layer and a buffer nitride layer in order on the entire surface of a semiconductor sub... | 05/08/2007 |
| 7211887 | connection arrangement for micro lead frame plastic packages A connection arrangement for a micro lead frame plastic (MLP) package is provided that includes a paddle configured to be connected to a circuit board and a first ground pad and a second ground pad each connected to the paddle. The first and second ground pads toget... | 05/01/2007 |
| 7196387 | Memory cell with an asymmetrical area An asymmetric-area memory cell, and a fabrication method for forming an asymmetric-area memory cell, are provided. The method comprises: forming a bottom electrode having an area; forming a CMR memory film overlying the bottom electrode, having an asymmetric area; a... | 03/27/2007 |
| 7193893 | Write once read only memory employing floating gates Structures and methods for write once read only memory employing floating gates are provided. The write once read only memory cell includes a floating gate transistor formed in a modified dynamic random access memory (DRAM) fabrication process. The floating gate tra... | 03/20/2007 |
| 7190053 | Field device incorporating circuit card assembly as environmental and EMI/RFI shield A field hardened industrial device is described with a housing of the device having electrically conductive walls surrounding a cavity with an open end. An electronics assembly is adapted to fit within the cavity. The device includes a circuit card assembly, which i... | 03/13/2007 |
| 7187061 | Use of a down-bond as a controlled inductor in integrated circuit applications A Radio Frequency (RF) device includes a semi conductive die and a package in which the semi conductive die mounts. The semi conductive die includes a first portion of an RF circuit and a plurality of die pads formed thereon. The package includes a heat slug upon wh... | 03/06/2007 |
| 7170300 | Apparatus and method for inspecting interface between ground layer and substrate of microstrip by using scattering parameters An apparatus and method for detecting a defect on a ground layer of microstrip by using scattering parameters is disclosed. The apparatus includes: a providing unit for providing a signal to the microstrip by changing a frequency of the signal in a predetermined ran... | 01/30/2007 |
| 7166509 | Write once read only memory with large work function floating gates Structures and methods for write once read only memory employing floating gates are provided. The write once read only memory cell includes a floating gate transistor formed in a modified dynamic random access memory (DRAM) fabrication process. The floating gate tra... | 01/23/2007 |
| 7154140 | Write once read only memory with large work function floating gates Structures and methods for write once read only memory employing floating gates are provided. The write once read only memory cell includes a floating gate transistor formed in a modified dynamic random access memory (DRAM) fabrication process. The floating gate tra... | 12/26/2006 |
| 7149666 | Methods for modeling interactions between massively coupled multiple vias in multilayered electronic packaging structures Analyzing interactions between vias in multilayered electronic packages that include at least two spaced-apart conducting planes, and multiple vias that connect signal traces on different layers. Voltages at active via ports are represented as magnetic ring current ... | 12/12/2006 |
| 7135717 | Semiconductor switches and switching circuits for microwave The purpose of the present invention is to provide a small-sized switch attaining high isolation of not less than 80 dB, maintaining low insertion loss also in high frequencies not less than 60 GHz. A semiconductor switch according to the present invention utilizes ... | 11/14/2006 |
| 7122881 | Wiring board and circuit module A wiring board houses a bare radio-frequency IC. Shield wiring films are provided above and below the IC. A plurality of shield interlayer-connection conductor films, i.e., shield via-holes, is provided so as to surround the IC. The shield wiring films and the shiel... | 10/17/2006 |
| 7112870 | Semiconductor integrated circuit device including dummy patterns located to reduce dishing A large area dummy pattern DL is formed in a layer underneath a target T2 region formed in a scribe region SR of a wafer. A small area dummy pattern in a lower layer and a small area dummy pattern Ds2 in an upper layer are disposed in a region where th... | 09/26/2006 |
| 7112494 | Write once read only memory employing charge trapping in insulators Structures and methods for write once read only memory employing charge trapping in insulators are provided. The write once read only memory cell includes a metal oxide semiconductor field effect transistor having a first source/drain region, a second source/drain r... | 09/26/2006 |
| 7109569 | Dual referenced microstrip Structures and methods are provided for dual referenced microstrip structures having low reference discontinuities between a microstrip trace referenced to a primary reference plane as compared to a microstrip trace referenced to a secondary reference plane. A metho... | 09/19/2006 |
| 7087983 | Manufacturing methods of semiconductor devices and a solid state image pickup device A manufacturing method of manufacturing a semiconductor device having a plurality of wiring layers. The method includes the steps of forming a wiring by a first wiring layer as a pattern by dividing a desired pattern into a plurality of patterns, connecting the divi... | 08/08/2006 |
| 7075171 | Superconducting system, superconducting circuit chip, and high-temperature superconducting junction device with a shunt resistor A superconducting system that includes an interface circuit capable of making the best use of a high-speed superconducting circuit and a high-speed semiconductor circuit. A multi-chip module in which an Nb superconducting circuit having josephson junctions formed by... | 07/11/2006 |
