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| Number | Title | Issue Date |
| 7226875 | Method for enhancing FSG film stability A method for enhancing stability of a fluorinated silicon glass layer is disclosed. A fluorinated silicon glass layer provided on a substrate is subjected to a phosphorous-containing and hydrogen-containing gas such as phosphine (PH3), for example. The ga... | 06/05/2007 |
| 7180129 | Semiconductor device including insulating layer A method of manufacturing an insulating layer that ensures reproducibility across like manufacturing apparatus. The insulating layer is formed on the substrate by (a) flowing an oxidizing gas at an oxidizing gas flow rate, (b) flowing a first carrier gas at a first ... | 02/20/2007 |
| 7153776 | Method for reducing amine based contaminants A method for reducing resist poisoning is provided. The method includes forming a first structure in a dielectric on a substrate and reducing amine related contaminants from the dielectric and the substrate created after the formation of the first structure. The met... | 12/26/2006 |
| 7132219 | Polymeric antireflective coatings deposited by plasma enhanced chemical vapor deposition An improved method for applying polymeric antireflective coatings to substrate surfaces and the resulting precursor structures are provided. Broadly, the methods comprise plasma enhanced chemical vapor depositing (PECVD) a polymer on the substrate surfaces. The most... | 11/07/2006 |
| 7125741 | Rework process of patterned photo-resist layer A rework process of patterned photo-resist layer is provided. First, a substrate is provided with a first DARC, a first primer and a first patterned photo-resist layer being sequentially formed thereon. Next, remove the first patterned photo-resist layer and the fir... | 10/24/2006 |
| 7115956 | Conductive film as the connector for thin film display device In the manufacture of a semiconductor device, there are provided a method that enables reduction in the number of manufacturing steps thereof and a structure for realizing the method, to thereby realize improvement in yield and reduction in manufacturing cost. Wirin... | 10/03/2006 |
| 7084508 | Semiconductor device with multiple layer insulating film A lower portion of an interlayer insulating film is formed contiguous with a semiconductor wafer. The lower portion has a high impurity concentration and a high etching rate. An upper portion of an interlayer insulating film is formed over the lower portion apart fr... | 08/01/2006 |
| 7075187 | Coating material over electrodes to support organic synthesis There is disclosed a coating material formulation for layering a plurality of electrodes to provide a substrate for the electrochemical synthesis of organic oligomers. Specifically, there is disclosed a coating layer of from about 0.5 to about 100 microns thick and ... | 07/11/2006 |
| 7057271 | Apparatus for connecting an IC terminal to a reference potential A circuit chip has an apparatus for an electrically conductive connection of a terminal thereof to an external reference potential. The apparatus has a parallel connection of a bonding wire and a semiconductor area formed in a substrate of the circuit chip. The semi... | 06/06/2006 |
| 7005724 | Semiconductor device and a method of manufacture therefor The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the aforementioned semiconductor device. The semiconductor device, in accordance with the principles of the present invention, may include a ... | 02/28/2006 |
| 6989579 | Adhering layers to metals with dielectric adhesive layers The present invention provides a method for adhering dielectric layers to metals, in particular inert metals, using an adhesive layer comprising silicon-rich silicon nitride. Good adhesion is achieved at temperatures of less than 300° C., thereby facilitating the f... | 01/24/2006 |
| 6936405 | Organic polymeric antireflective coatings deposited by chemical vapor deposition An improved method for applying organic antireflective coatings to substrate surfaces and the resulting precursor structures are provided. Broadly, the methods comprise chemical vapor depositing (CVD) an antireflective compound on the substrate surface. In one embod... | 08/30/2005 |
| 6864562 | Semiconductor device having active element connected to an electrode metal pad via a barrier metal layer and interlayer insulating film A semiconductor device of the present invention has (1) an active element provided on a semiconductor substrate, (2) an interlayer insulating film formed so as to cover the active element, (3) a pad metal for an electrode pad which is provided on the interlayer insu... | 03/08/2005 |
| 6730619 | Method of manufacturing insulating layer and semiconductor device including insulating layer A method of manufacturing an insulating layer that ensures reproducibility across like manufacturing apparatus. The insulating layer is formed on the substrate by (a) flowing an oxidizing gas at an oxidizing gas flow rate, (b) flowing a first carrier gas at a first ... | 05/04/2004 |
| 6713390 | Barrier layer deposition using HDP-CVD A method is provided for depositing a barrier layer on a substrate using a gaseous mixture that includes a hydrocarbon-containing gas and a silicon-containing gas. The gaseous mixture is provided to a process chamber and is used to form a plasma for depositing the b... | 03/30/2004 |
| 6650002 | Semiconductor device having active element connected to an electrode metal pad via a barrier metal layer and interlayer insulating film A semiconductor device of the present invention has (1) an active element provided on a semiconductor substrate, (2) an interlayer insulating film formed so as to cover the active element, (3) a pad metal for an electrode pad which is provided on the inte... | 11/18/2003 |
| 6633076 | Methods and apparatus for producing stable low k FSG film for HDP-CVD Methods and apparatus of the present invention deposit fluorinated silicate glass (FSG) in such a manner that it strongly adheres to an overlying or underlying barrier layer or etch stop layer, and has a lower dielectric constant, among other benefits. In... | 10/14/2003 |
| 6614098 | Semiconductor devices and fabrication thereof A method of fabricating a tungsten contact in a semiconductor device comprises providing an oxide layer on a region of a silicon substrate; depositing a sealing dielectric layer over the oxide layer; and depositing an interlevel dielectric layer over the ... | 09/02/2003 |
| 6603192 | Scratch resistance improvement by filling metal gaps Passivation for capacitive sensor circuits, which overlies the capacitive sensor electrodes and is normally conformal to the electrodes and the underlying interlevel dielectric, is planarized by forming a layer of flowable oxide over the electrodes before... | 08/05/2003 |
| 6600228 | Keyhole at the top metal level prefilled with photoresist to prevent passivation damage even for a severe top metal rule A planarized surface of a photoresist layer is formed above a layer formed over a hole in a blanket, conformal, silicon nitride layer which in turn is formed above a keyhole in metallization with SOG layers therebetween on the surface of a semiconductor d... | 07/29/2003 |
| 6548873 | Semiconductor device and manufacturing method of the same A semiconductor device causes less element characteristic fluctuation and hardly causes parasitic actions even when a wire having a barrier metal made of a titanium material is provided. The semiconductor device includes a MOS transistor provided on the s... | 04/15/2003 |
| 6537902 | Method of forming a via hole in a semiconductor device A material layer which contains nitrogen atoms is formed on a first wiring or at a side surface of a first wiring. When etching for forming a via hole is carried out, nitrogen atoms contained in the material layer bind with CF molecules, CF2 mo... | 03/25/2003 |
| 6501141 | Self-aligned contact with improved isolation and method for forming A method for forming a self-aligned contact in a IC device is disclosed. In the method, a gate oxide layer, a polysilicon layer and a metal silicide layer are first deposited and patterned on a substrate. A first silicon dioxide layer is then deposited on... | 12/31/2002 |
| 6483173 | Solution to black diamond film delamination problem Low k dielectrics such as black diamond have a tendency to delaminate from the edges of a silicon wafer, causing multiple problems, including blinding of the alignment mark. This problem has been overcome by inserting a layer of silicon nitride between th... | 11/19/2002 |
| 6445072 | Deliberate void in innerlayer dielectric gapfill to reduce dielectric constant One aspect of the present invention relates to a method of forming an innerlayer dielectric, involving the steps of providing a substrate having at least two metal lines thereon; providing a conformal insulation layer over the substrate and metal lines; f... | 09/03/2002 |
| 6441467 | Semiconductor device having active element connected to an electrode metal pad via a barrier metal layer and interlayer insulating film A semiconductor device of the present invention has (1) an active element provided on a semiconductor substrate, (2) an interlayer insulating film formed so as to cover the active element, (3) a pad metal for an electrode pad which is provided on the inte... | 08/27/2002 |
| 6396122 | Method for fabricating on-chip inductors and related structure According to various disclosed embodiments, a conductor is patterned in a dielectric. The conductor can be patterned, for example, in the shape of a square spiral. The conductor can comprise, for example, copper, aluminum, or copper-aluminum alloy. The di... | 05/28/2002 |
| 6396078 | Semiconductor device with a tapered hole formed using multiple layers with different etching rates A semiconductor device having an improved contact hole through an interlayer insulator. A first insulating film comprising silicon nitride is deposited. A second insulating film comprising silicon oxide is deposited on the first insulating film. The depos... | 05/28/2002 |
| 6376911 | Planarized final passivation for semiconductor devices A final passivation structure for a semiconductor device having conductive lines formed on a surface of the semiconductor device, comprising a planarized layer covering the surface and also covering the conductive lines, and a diffusion barrier covering t... | 04/23/2002 |
| 6362508 | Triple layer pre-metal dielectric structure for CMOS memory devices A CMOS memory device includes source and drain regions diffused into a substrate, a polysilicon gate structure formed over a channel region located between the first and second diffusion regions, and a pre-metal dielectric structure formed over the polysi... | 03/26/2002 |
| 6335561 | Semiconductor device having a passivation film A semiconductor device comprises a semiconductor substrate having an area in which a circuit element is formed, and a passivation film formed on an upper surface of the semiconductor substrate, at least part of the passivation film being uneven shaped film, an... | 01/01/2002 |
| 6300672 | Silicon oxynitride cap for fluorinated silicate glass film in intermetal dielectric semiconductor fabrication A semiconductor device and method of forming a patterned conductive layer on a semiconductor substrate are provided so as to prevent fluorine substance outflow from a fluorinated silicate glass (FSG) layer thereon and simultaneously so as to suppress back... | 10/09/2001 |
| 6300667 | Semiconductor structure with air gaps formed between metal leads A semiconductor device is fabricated first by thermocompression-bonding a silicon oxide film onto a plurality of conductive films under vacuum using a film having the silicon oxide film formed thereon and then by separating the base film from the silicon ... | 10/09/2001 |
| 6246105 | Semiconductor device and manufacturing process thereof A semiconductor device having an insulation protection film with increased reliability and improved device characteristics, and a manufacturing method thereof which improves the planarization and reduces the interlayer capacitance of the device. The semic... | 06/12/2001 |
| 6246076 | Layered dielectric on silicon carbide semiconductor structures A dielectric structure is disclosed for silicon carbide-based semiconductor devices. In gated devices, the structure includes a layer of silicon carbide, a layer of silicon dioxide on the silicon carbide layer, a layer of another insulating material on th... | 06/12/2001 |
| 6165915 | Forming halogen doped glass dielectric layer with enhanced stability Within a method for forming a halogen doped glass layer, such as a fluorosilicate glass (FSG) layer, there is first provided a substrate. There is then formed over the substrate a first halogen doped glass layer. There is then formed upon the first haloge... | 12/26/2000 |
| 6147394 | Method of photolithographically defining three regions with one mask step and self aligned isolation structure formed thereby The preferred embodiment of the present invention provides a method for defining three regions on a semiconductor substrate using a single masking step. The preferred embodiment uses a photoresist material having, simultaneously, both a positive tone and ... | 11/14/2000 |
| 6104081 | Semiconductor device with semiconductor elements formed in a layer of semiconductor material glued on a support wafer A method of manufacturing a semiconductor device which starts with a semiconductor wafer (1) which is provided with a layer of semiconductor material (4) lying on an insulating layer (3) at a first side (2). Semiconductor elements (5) and conductor tracks... | 08/15/2000 |
| 6091121 | Semiconductor device and method for manufacturing the same In an LDD structure MOSFET, a protecting multilayer insulating film is formed to cover a gate electrode in order to protect the gate electrode and the gate oxide film from a moisture included in an upper level layer. The protecting multilayer insulating f... | 07/18/2000 |
| 6091082 | Electrostatic discharge protection for integrated circuit sensor passivation A structure and method for creating an integrated circuit passivation (24) comprising, a circuit (16), a dielectric (18), and metal plates (20) over which an insulating layer (26) is disposed that electrically and hermetically isolates the circuit (16), a... | 07/18/2000 |
