Combination Beverage Container and Spittoon
A combination beverage container and spittoon includes a bottom portion including outer wall and a first inner wall defining a spittoon space.
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8035195 | Semiconductor element A semiconductor element includes a semiconductor layer having a first doping density, a metallization, and a contact area located between the semiconductor layer and the metallization. The contact area includes at least one first semiconductor area that has a second... | 10/11/2011 |
| 7408206 | Method and structure for charge dissipation in integrated circuits Methods and structures and methods of designing structures for charge dissipation in an integrated circuit on an SOI substrate. A first structure includes a charge dissipation ring around a periphery of the integrated circuit chip and one or more charge dissipation ... | 08/05/2008 |
| 7391093 | Semiconductor device with a guard-ring structure and a field plate formed of polycrystalline silicon film embedded in an insulating film A semiconductor device has a semiconductor device chip with upper and lower terminal electrodes, and upper and lower frames bonded to the upper and lower terminal electrodes, respectively, with solder material, wherein the semiconductor device chip includes: a semic... | 06/24/2008 |
| 7361942 | Transient voltage suppression device A bi-directional transient voltage suppression (“TVS”) device (101) includes a semiconductor die (201) that has a first avalanche diode (103) in series with a first rectifier diode (104) connected cathode to cathode, electrically coup... | 04/22/2008 |
| 7279773 | Protection device for handling energy transients A protection device for handling energy transients includes a plurality of basic unit Zener diodes connected in series to achieve a desired breakdown voltage. Each of the basic unit Zener diodes is formed in a first-type substrate. Each of the basic unit Zener diode... | 10/09/2007 |
| 7135718 | Diode device and transistor device A semiconductor device having improved breakdown voltage is provided. A diode device of the present invention includes relay diffusion layers provided between guard ring portions. Therefore, a depletion layer expanded outward from the guard ring portions except the ... | 11/14/2006 |
| 7012304 | Diode and transistor design for high speed I/O An integrated circuit including a performance circuit occupying a first area of an integrated circuit substrate and a protection circuit coupled to the performance circuit and occupying a second area of an integrated circuit substrate separate from the first area. A... | 03/14/2006 |
| 6940131 | MOS ESD CDM clamp with integral substrate injection guardring and method for fabrication The present invention includes a MOS device (100) that has a P-type substrate (102) and an N-type drain region (104) formed within the substrate (102). An annular N-type source region (106) generally surrounds the drain region (... | 09/06/2005 |
| 6936868 | Sequential mesa avalanche photodiode capable of realizing high sensitization and method of manufacturing the same A sequential mesa type avalanche photodiode (APD) includes a semiconductor substrate and a sequential mesa portion formed on the substrate. In the sequential mesa portion, a plurality of semiconductor layers, including a light absorbing layer and a multiplying layer... | 08/30/2005 |
| 6936907 | Lateral high-voltage semiconductor devices with surface covered by thin film of dielectric material with high permittivity This invention provides a method or an auxiliary method to implement optimum variation lateral flux on a semiconductor surface. The method is to cover one or more thin films of high permittivity dielectric material on the semiconductor surface. The one or more films... | 08/30/2005 |
| 6933546 | Semiconductor component A semiconductor component comprises a first semiconductor region (110, 310), a second semiconductor region (120, 320) above the first semiconductor region, a third semiconductor region (130, 330) above the second semiconductor region, a fourth s... | 08/23/2005 |
| 6838771 | Semiconductor device having conductor layers stacked on a substrate As etch-stop films or Cu-diffusion barrier films used in insulation films constituting conductor layers of a stacked structure, films having smaller dielectric constant than silicon nitride films are used, and an insulation film at a lower-layer part of the stacked ... | 01/04/2005 |
| 6803644 | Semiconductor integrated circuit device and method of manufacturing the same A plurality of connection holes 24 for connecting n+ type semiconductor region 20 of zener diodes (D1, D2) and wires 21 and 22 to each other are not arranged in the center of the n+ type semicon... | 10/12/2004 |
| 6784520 | Semiconductor devices constitute constant voltage devices used to raise internal voltage A constant voltage device includes n-type and p-type doped layers. The n-type doped layer is formed by heavily doping with an n-type impurity an upper portion of a p-type silicon semiconductor substrate, in an active region defined by an isolating insulator film. Th... | 08/31/2004 |
| 6747294 | Guard ring structure for reducing crosstalk and latch-up in integrated circuits An integrated circuit having very low parasitic current gain includes a guard ring that is used to completely surround a device, such as a power device, that induces parasitic current. The guard ring is formed in a semiconductor body layer such as an epitaxial layer... | 06/08/2004 |
| 6734520 | Semiconductor component and method of producing it A semiconductor component includes a first layer and at least one adjacent semiconductor layer or metallic layer, which forms a rectifying junction with the first layer. Further semiconductor layers and metallic layers are provided for contacting the component. Insu... | 05/11/2004 |
| 6717229 | Distributed reverse surge guard A diode (20), having first and second conductive layers (24,26), a conductive pad (28), and a distributed reverse surge guard (22), provides increased protection from reverse current surges. The surge guard (22) includes an outer l... | 04/06/2004 |
| 6707128 | Vertical MISFET transistor surrounded by a Schottky barrier diode with a common source and anode electrode A semiconductor device comprises a first semiconductor layer of a first conductivity type provided on a semiconductor substrate of the first conductivity type, a base layer of a second conductivity type provided in the first semiconductor layer, for defining a verti... | 03/16/2004 |
| 6670685 | Method of manufacturing and structure of semiconductor device with floating ring structure A high voltage semiconductor device includes a drain region disposed within a semiconductor substrate. The semiconductor device further includes a field oxide layer disposed outwardly from the drain region of the semiconductor substrate. The semiconductor... | 12/30/2003 |
| 6639301 | Semiconductor device and manufacturing method thereof A semiconductor device embraces an n-type first semiconductor region, defined by first and second end surfaces and a first outer surface connecting the first and second end surfaces; a p-type second semiconductor region, defined by third and fourth end su... | 10/28/2003 |
| 6552413 | Diode Implemented is a diode which controls an energy loss produced during a reverse recovery operation and generates an oscillation of an applied voltage with difficulty even if a reverse bias voltage has a great value. An N layer 101 and a P layer 102 are for... | 04/22/2003 |
| 6531744 | Integrated circuit provided with overvoltage protection and method for manufacture thereof The invention concerns an integrated circuit, including a substrate (SBSTR) with sub-circuits provided with a number of terminals, including a substrate terminal or earthing point (GND), a Vcc power supply terminal, an input point (in) and an o... | 03/11/2003 |
| 6455910 | Cross guard-ring structure to protect the chip crack in low dielectric constant and copper process A structure of a cross guard ring along the edge of a semiconductor chip is disclosed. A first guard ring, a second guard ring and a third guard ring are formed along the edge of a semiconductor chip. Each guard ring comprises several rectangle shaped via... | 09/24/2002 |
| 6426511 | Gunn diode, NRD guide gunn oscillator, fabricating method of gunn diode and structure for assembly of the same A Gunn diode which is formed by sequentially laminating a first semiconductor layer, an active layer and a second semiconductor layer onto a semiconductor substrate. The Gunn diode comprises first and second electrodes arranged on the second semiconductor... | 07/30/2002 |
| 6410950 | Geometrically coupled field-controlled-injection diode, voltage limiter and freewheeling diode having the geometrically coupled field-controlled-injection diode A pin diode includes an inner zone, a cathode zone and an anode zone. A boundary surface between the inner zone and the anode zone is at least partly curved and/or at least one floating region having the same conduction type and a higher dopant concentrat... | 06/25/2002 |
| 6388308 | Semiconductor device and method for driving the same A field oxide surrounding an active region, an N-type doped layer formed in the active region, and an electrode formed on the field oxide in the vicinity of the active region are provided on a P-type semiconductor substrate. During the operation as a cons... | 05/14/2002 |
| 6274918 | Integrated circuit diode, and method for fabricating same An integrated circuit (10) includes a P-epi substrate (12) having therein an n-well isolation layer (13) and a p-well (14) within the n-well. The p-well includes adjacent an upper surface thereof a p+ layer (18) having several elongate parallel openings (... | 08/14/2001 |
| 6268640 | Forming steep lateral doping distribution at source/drain junctions A semiconductor device is fabricated by implanting into a semiconductor substrate non-doping ions at a tilt angle of at least about 10° to laterally extend preamorphization of the substrate portion and then implanting into the substrate dopants for provi... | 07/31/2001 |
| 6232642 | Semiconductor device having impurity region locally at an end of channel formation region There is provided a semiconductor device having a novel structure in which high reliability and high field effect mobility can be simultaneously achieved. In an insulated gate transistor formed on a single crystal silicon substrate, pinning regions 105 an... | 05/15/2001 |
| 6191466 | Semiconductor device containing a diode A semiconductor device which has few peripheral element malfunctions and superior performance is obtained. The semiconductor device includes a p-type buried layer on a main surface of a semiconductor substrate, an n-type cathode region provided on the p-t... | 02/20/2001 |
| 6127709 | Guard ring structure for semiconductor devices and process for manufacture thereof A semiconductor device includes a guard ring in the termination area that is formed using the same processing steps that form the active area of the device and without requiring additional masking steps or a passivation layer. The guard ring is formed in ... | 10/03/2000 |
| 6040617 | Structure to provide junction breakdown stability for deep trench devices The present invention is directed to an improved deep trench structure, for use in junction devices, which addresses junction breakdown voltage instabilities of the prior art. The primary, or metallurgical, junction where avalanche breakdown occurs is mov... | 03/21/2000 |
| 5994754 | Semiconductor device A multi guard ring structure for a reach-through type semiconductor device has at least first and second guard ring regions. The first guard ring region surrounds a main region with a predetermined first spacing. The second guard ring region surrounds the... | 11/30/1999 |
| 5986315 | Guard wall to reduce delamination effects within a semiconductor die A method of forming a guard wall for a semiconductor die is described. A dielectric layer is deposited over a semiconductor substrate. The dielectric layer is patterned to form a guard wall opening extending through the dielectric layer. The guard wall op... | 11/16/1999 |
| 5959345 | Edge termination for zener-clamped power device A semiconductor power device (100) that includes a number of bipolar or FET power devices (116), an over-voltage clamp (118), and an edge termination structure (110) that separates the power devices (116) and the over-voltage clamp (118). The power device... | 09/28/1999 |
| 5955766 | Diode with controlled breakdown A zapping diode concerned with a P-N junction diode provided in an integrated circuit, whose P-N junction is subjected to breakdown by an overvoltage to perform fine adjustment in the value of capacitance or resistance involved in the circuit. The diode h... | 09/21/1999 |
| 5869882 | Zener diode structure with high reverse breakdown voltage A zener diode capable of breakdown at much higher voltages than in the prior art is fabricated by providing a semiconductor substrate of a first conductivity type having an opposite conductivity type first tank disposed therein. The first tank includes re... | 02/09/1999 |
| 5866936 | Mesa-structure avalanche photodiode having a buried epitaxial junction A mesa-structure avalanche photodiode in which a buffer region in the surface of the mesa structure effectively eliminates the sharply-angled, heavily doped part of the cap layer that existed adjacent the lightly-doped n-type multiplication layer and p-ty... | 02/02/1999 |
| 5760417 | Semiconductor electron emission device In a semiconductor electron emission device for causing an avalanche breakdown by applying a reverse bias voltage to a Schottky barrier junction between a metallic material or metallic compound material and a p-type semiconductor, and externally emitting ... | 06/02/1998 |
| 5757057 | Large area avalanche photodiode array A large area avalanche photodiode device that has a plurality of contacts formed on a bottom side that are isolated from each other by various kinds of isolation structures. In one embodiment, a cavity is formed in one layer of the avalanche photodiode th... | 05/26/1998 |