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| Number | Title | Issue Date |
| 8159048 | Bipolar junction transistor geometry Embodiments of methods, apparatus, devices and/or systems associated with bipolar junction transistor are disclosed. ... | 04/17/2012 |
| 8129819 | Method of fabricating integrated circuit including at least six linear-shaped conductive structures at equal pitch including at least two linear-shaped conductive structures having non-gate portions of different length A layout of a cell of a semiconductor device is disclosed to include a diffusion level layout including a plurality of diffusion region layout shapes, including p-type and n-type diffusion regions. The layout of the cell also includes a gate electrode level layout i... | 03/06/2012 |
| 7968972 | High-frequency bipolar transistor and method for the production thereof A high-frequency bipolar transistor includes an emitter contact adjoining an emitter connection region, a base contact adjoining a base connection region, and a collector contact adjoining a collector connection region. A first insulation layer is disposed on the ba... | 06/28/2011 |
| 7880271 | Semiconductor device with emitter contact holes in a first layer not overlaid by emitter through holes in a second layer Emitter contact holes formed under emitter electrodes in a first layer and emitter through holes formed thereon are arranged so as not to overlap each other, and, for each emitter electrode, the multiple emitter contact holes and the multiple emitter through holes a... | 02/01/2011 |
| 7755168 | Semiconductor device provided with floating electrode A semiconductor device has a first conductivity-type first semiconductor region, a second conductivity-type second semiconductor region and a second conductivity-type third semiconductor region both located on or above the first semiconductor region, a second conduc... | 07/13/2010 |
| 7719088 | High-frequency bipolar transistor A high-frequency bipolar transistor includes an emitter contact adjoining an emitter connection region, a base contact adjoining a base connection region, and a collector contact adjoining a collector connection region. A first insulation layer is disposed on the ba... | 05/18/2010 |
| 7705425 | Solid-state high power device and method A high-power solid-state transistor structure comprised of a plurality of emitter or gate fingers arranged in a uniform or non-uniform manner to provide improved high power performance is disclosed. Each of the fingers is associated with a corresponding one of a plu... | 04/27/2010 |
| 7629669 | Semiconductor apparatus A semiconductor apparatus includes a first transistor having a first emitter electrode, a first base electrode, and a first collector electrode in a region over a first region. Base lead-out polysilicon connecting the first base electrode and a first base region pas... | 12/08/2009 |
| 7566947 | Semiconductor device with bipolar transistor and method of fabricating the same Disclosed is a semiconductor device with a bipolar transistor and method of fabricating the same. The device may include a collector region in a semiconductor substrate. A base pattern may be disposed on the collector region. A hard mask pattern may be disposed on t... | 07/28/2009 |
| 7554174 | Bipolar transistor having semiconductor patterns filling contact windows of an insulating layer Disclosed are a bipolar transistor comprising an emitter terminal and a base terminal having substantially equal heights, and a method of fabricating the same. The bipolar transistor comprises a silicon-germanium layer acting as a base and formed on a semiconductor ... | 06/30/2009 |
| 7498658 | Trench gate type insulated gate bipolar transistor A trench gate type IGBT includes: a first semiconductor layer; a second semiconductor on the first semiconductor layer; a third semiconductor on the second semiconductor layer; trenches for separating the third semiconductor layer into first regions and second regio... | 03/03/2009 |
| 7420227 | Cu-metalized compound semiconductor device The present invention is a compound semiconductor device characterized in that it is Cu-metalized to improved the reliability of the device and to greatly reduce the cost of production. ... | 09/02/2008 |
| 7375410 | Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereof The present invention provides a “collector-less” silicon-on-insulator (SOI) bipolar junction transistor (BJT) that has no impurity-doped collector. Instead, the inventive vertical SOI BJT uses a back gate-induced, minority carrier inversion layer as the intrins... | 05/20/2008 |
| 7368361 | Bipolar junction transistors and method of manufacturing the same A substrate has a collector region of a first conductivity type, and a base layer of a single crystalline structure and including impurities of a second conductivity type is located over the collector region. An emitter region is defined at least in part by impuriti... | 05/06/2008 |
| 7352051 | Cascode, cascode circuit and method for vertical integration of two bipolar transistors into a cascode arrangement A cascode of a high-frequency circuit, includes a first transistor having a first base semiconductor region, a first collector semiconductor region and a first emitter semiconductor region, and a second transistor having a second base semiconductor region, a second ... | 04/01/2008 |
| 7342294 | SOI bipolar transistors with reduced self heating A bipolar transistor includes a collector located over a substrate; and a heat conductive path connecting the substrate to the collector. The heat conductive path is filled with a heat conductive material such as metal or polysilicon. In one embodiment the heat cond... | 03/11/2008 |
| 7329941 | Creating increased mobility in a bipolar device The mobility of charge carriers in a bipolar (BJT) device is increased by creating compressive strain in the device to increase mobility of electrons in the device, and creating tensile strain in the device to increase mobility of holes in the device. The compressiv... | 02/12/2008 |
| 7323373 | Method of forming a semiconductor device with decreased undercutting of semiconductor material A semiconductor device is formed by patterning a semiconductor layer to create a vertical active region and a horizontal active region, wherein the horizontal active region is adjacent the vertical active region. The semiconductor layer overlies an insulating layer.... | 01/29/2008 |
| 7323728 | Semiconductor device Disclosed is a semiconductor device including an n+-type semiconductor layer formed on a substrate, a first n-type semiconductor layer formed on the n+-type semiconductor layer, a p-type semiconductor layer formed on the first n-type semiconduc... | 01/29/2008 |
| 7317240 | Redundant interconnect high current bipolar device and method of forming the device A device. The device includes two bipolar transistors electrically connected to each other. Each bipolar transistor of the two bipolar transistors may include a base contact and an emitter contact surrounding the base contact, wherein the emitters contacts of the tw... | 01/08/2008 |
| 7294871 | Top layers of metal for high performance IC's A method of closely interconnecting integrated circuits contained within a semiconductor wafer to electrical circuits surrounding the semiconductor wafer. Electrical interconnects are held to a minimum in length by making efficient use of polyimide or polymer as an ... | 11/13/2007 |
| 7288829 | Bipolar transistor with self-aligned retrograde extrinsic base implant profile and self-aligned silicide Disclosed is a method of forming a transistor in an integrated circuit structure that begins by forming a collector in a substrate and an intrinsic base above the collector. Then, the invention patterns an emitter pedestal for the lower portion of the emitter on the... | 10/30/2007 |
| 7282743 | Light-emitting device having light-emitting elements A light-emitting device operating on a high drive voltage and a small drive current. LEDs (1) are two-dimensionally formed on an insulating substrate (10) of e.g., sapphire monolithically and connected in series to form an LED array. Two such LED array... | 10/16/2007 |
| 7268413 | Bipolar transistors with low-resistance emitter contacts Many integrated circuits include a type of transistor known as a bipolar junction transistor, which has an emitter contact formed of polysilicon. Unfortunately, polysilicon has a relatively high electrical resistance that poses an obstacle to improving switching spe... | 09/11/2007 |
| 7259111 | Interface engineering to improve adhesion between low k stacks A method of depositing a organosilicate dielectric layer exhibiting high adhesion strength to an underlying substrate disposed within a single processing chamber without plasma arcing. The method includes positioning a substrate within a processing chamber having a ... | 08/21/2007 |
| 7247925 | Semiconductor device and method for fabricating the same A semiconductor device includes a semiconductor substrate of a first conductive type, a collector layer formed on the semiconductor substrate and made of a first semiconductor being of the first conductive type and having a higher resistance than that of the semicon... | 07/24/2007 |
| 7247892 | Imaging array utilizing thyristor-based pixel elements An improved imaging array (and corresponding method of operation) includes a plurality of heterojunction thyristor-based pixel elements disposed within resonant cavities formed on a substrate. Each thyristor-based pixel element includes complementary n-type and p-ty... | 07/24/2007 |
| 7226835 | Versatile system for optimizing current gain in bipolar transistor structures Disclosed are apparatus and methods for designing electrical contact for a bipolar emitter structure. The area of an emitter structure (106, 306, 400, 404) and the required current density throughput of an electrical contact structure (108, 308, 402, 406 | 06/05/2007 |
| 7226844 | Method of manufacturing a bipolar transistor with a single-crystal base contact A method forms a bipolar transistor in a semiconductor substrate of a first conductivity type. The method includes: forming on the substrate a single-crystal silicon-germanium layer; forming a heavily-doped single-crystal silicon layer of a second conductivity type;... | 06/05/2007 |
| 7224008 | Self-aligned production method for an insulated gate semiconductor device cell and insulated gate semiconductor device cell The invention relates to a manufacturing method for an insulated gate semiconductor device cell, comprising the steps of forming a cell window (3) in a layered structure that is located on top of a semiconductor substrate (1), forming at least one proc... | 05/29/2007 |
| 7214988 | Metal oxide semiconductor transistor A method for forming a metal oxide semiconductor (MOS) transistor is provided. First, a gate structure is formed over a substrate. Then, offset spacers are formed on respective sidewalls of the gate structure. A first ion implantation process is performed to form a ... | 05/08/2007 |
| 7202515 | Heterojunction bipolar transistor and manufacturing method thereof In the method for manufacturing a heterojunction bipolar transistor, a collector contact layer, a collector layer, a base layer, a base protection layer, an emitter layer, an emitter contact layer, and a WSi layer are sequentially formed on a substrate. A resist pat... | 04/10/2007 |
| 7196377 | MOS type semiconductor device having electrostatic discharge protection arrangement In a semiconductor device having an electrostatic discharge protection arrangement, a semiconductor substrate exhibits a first conductivity type. First and second impurity regions each exhibiting a second conductivity type are formed in the semiconductor substrate. ... | 03/27/2007 |
| 7187056 | Radiation hardened bipolar junction transistor A method of forming bipolar junction devices, including forming a mask to expose the total surface of the emitter region and adjoining portions of the surface of the base region. A first dielectric layer is formed over the exposed surfaces. A field plate layer is fo... | 03/06/2007 |
| 7170113 | Semiconductor device and method of manufacturing the same An aspect of a semiconductor device includes: a collector layer of first conductive type formed on a semiconductor substrate; a graft base layer of second conductive type formed in a surface region of the collector layer; a first base leading-out region of second co... | 01/30/2007 |
| 7166866 | Edge termination for silicon power devices A silicon semiconductor die comprises a heavily doped silicon substrate and an upper layer comprising doped silicon of a first conduction type disposed on the substrate. The upper layer comprises a well region of a second, opposite conduction type adjacent an edge t... | 01/23/2007 |
| 7148557 | Bipolar transistor and method for fabricating the same A bipolar transistor includes: a first semiconductor layer having an intrinsic base region and an extrinsic base region; and a second semiconductor layer having a portion located on the intrinsic base region to be an emitter region or a collector region. A capacitiv... | 12/12/2006 |
| 7141478 | Multi-stage EPI process for forming semiconductor devices, and resulting device The present invention is generally directed to a multi-stage epi process for forming semiconductor devices, and the resulting device. In one illustrative embodiment, the method comprises forming a first layer of epitaxial silicon above a surface of a semiconducting ... | 11/28/2006 |
| 7141865 | Low noise semiconductor amplifier A Low Noise semiconductor amplifier structure formed from layers of differently doped semiconductor material. This structure when properly biased will amplify voltage signals applied to the input terminal (Base1 or signal-base), and provide the same signal, a... | 11/28/2006 |
| 7141479 | Bipolar transistor and method for producing the same A method for producing a bipolar transistor is described, which comprises providing a layer sequence, which comprises a substrate, a first oxide layer and a SOI layer, generating a collector region in the substrate, generating a second oxide layer on the layer seque... | 11/28/2006 |
