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| Number | Title | Issue Date |
| 7439607 | Beta control using a rapid thermal oxidation A method of forming semiconductor device treating a surface of a substrate to produce a discontinuous growth of a material on the surface through rapid thermal oxidation of the substrate surface at a temperature of less than about 700° C. ... | 10/21/2008 |
| 7394113 | Self-alignment scheme for a heterojunction bipolar transistor Embodiments herein present a structure, method, etc. for a self-alignment scheme for a heterojunction bipolar transistor (HBT). An HBT is provided, comprising an extrinsic base, a first self-aligned silicide layer over the extrinsic base, and a nitride etch stop lay... | 07/01/2008 |
| 7323752 | ESD protection circuit with floating diffusion regions This invention discloses an electrostatic discharge (ESD) protection circuit that comprises a substrate of a predetermined type, at least one MOS transistor being coupled to a pad of an integrated circuit for dissipating an ESD current from the pad during an ESD eve... | 01/29/2008 |
| 7230324 | Strobe light control circuit and IGBT device As external connection terminals for an emitter electrode (12) of an IGBT chip, a first emitter terminal (151) for electrically connecting a light emitter in a strobe light control circuit to the emitter electrode (12) and a second emitter termi... | 06/12/2007 |
| 7214616 | Homojunction semiconductor devices with low barrier tunnel oxide contacts A homojunction bipolar transistor with performance characteristics similar to more costly heterojunction or retrograde base transistors. The high emitter resistivity found in prior homojunction devices is circumvented using a low work function material layer in form... | 05/08/2007 |
| 7193322 | Sacrificial shallow trench isolation oxide liner for strained-silicon channel CMOS devices A strained-silicon (Si) channel CMOS device shallow trench isolation (STI) oxide region, and method for forming same have been provided. The method forms a Si substrate with a relaxed-SiGe layer overlying the Si substrate, or a SiGe on insulator (SGOI) substrate wit... | 03/20/2007 |
| 7115973 | Dual-sided semiconductor device with a resistive element that requires little silicon surface area A dual-sided semiconductor device is formed on a wafer with a resistive element that is formed through the wafer. By forming the resistive element through the wafer, a resistive element, such as a large resistive element, can be formed on the wafer that requires ver... | 10/03/2006 |
| 6984593 | Beta control using a rapid thermal oxidation A method of forming semiconductor device treating a surface of a substrate to produce a discontinuous growth of a material on the surface through rapid thermal oxidation of the substrate surface at a temperature of less than about 700° C. ... | 01/10/2006 |
| 6975015 | Modulated trigger device An integrated circuit structure, a trigger device and a method of electrostatic discharge protection, the integrated circuit structure including: a substrate having a top surface defining a horizontal direction, the substrate of a first dopant type; a first horizont... | 12/13/2005 |
| 6913981 | Method of fabricating a bipolar transistor using selective epitaxially grown SiGe base layer Embodiments of a bipolar transistor are disclosed, along with methods for making the transistor. An exemplary transistor includes a collector region in a semiconductor substrate, a base layer overlying the collector region and bound by a field oxide layer, a dielect... | 07/05/2005 |
| 6879024 | Strobe light control circuit and IGBT device As external connection terminals for an emitter electrode (12) of an IGBT chip, a first emitter terminal (151) for electrically connecting a light emitter in a strobe light control circuit to the emitter electrode (12) and a second emitter termi... | 04/12/2005 |
| 6864538 | Protection device against electrostatic discharges An ESD protection device encompassing a vertical bipolar transistor that is connected as a diode and has an additional displaced base area. The assemblage has a space-saving configuration and a decreased difference between snapback voltage and breakdown voltage.... | 03/08/2005 |
| 6815801 | Vertical bipolar transistor and a method of manufacture therefor including two epitaxial layers and a buried layer The present invention provides a vertical bipolar transistor 110, a method of manufacture therefor, and an integrated circuit including the same. The vertical bipolar transistor 110 may include, in one embodiment, a second epitaxial layer 140 lo... | 11/09/2004 |
| 6806555 | Semiconductor component and method for fabricating it A semiconductor component and a method for fabricating it includes a substrate and an epitaxial layer situated thereon and integrating at least a first and a second bipolar component in the layer. The first and second bipolar components have a buried layer and diffe... | 10/19/2004 |
| 6777780 | Trench bipolar transistor The invention relates to a trench bipolar transistor structure, having a base 7, emitter 9 and collector 4, the latter being divided into a higher doped region 3 and a lower doped drift region 5. An insulated gate 11 is prov... | 08/17/2004 |
| 6759694 | Semiconductor phototransistor A phototransistor structure is disclosed. A sidewall is grown on the collector side and under the base. The surface of the sidewall is formed with a sidewall contact. When the contact is connected to an external voltage, the holes accumulated at the junction of the ... | 07/06/2004 |
| 6730981 | Bipolar transistor with inclined epitaxial layer In an element formation region, a surface of an N− epitaxial layer is inclined upward from an end of a field oxide film to a sidewall of an opening. An external base diffusion layer at the surface of the N− epitaxial layer is inclined upwar... | 05/04/2004 |
| 6703686 | Semiconductor device An n-type low impurity concentration semiconductor layer is provided, by epitaxial growth or the like, on a p-type semiconductor substrate. In order to vertically form a semiconductor device in the low impurity concentration semiconductor layer, at least ... | 03/09/2004 |
| 6215167 | Power semiconductor device employing field plate and manufacturing method thereof A power semiconductor device having an breakdown voltage improving structure and a manufacturing method thereof are provided. A collector region and a base region create a pn junction between them. At least one accelerating region of the same conductivity... | 04/10/2001 |
| 5965931 | Bipolar transistor having base region with coupled delta layers A bipolar transistor includes multiple coupled delta layers in the base region between the emitter and collector regions to enhance carrier mobility and conductance. The delta layers can be varied in number, thickness, and dopant concentration to optimize... | 10/12/1999 |
| 5886395 | Semiconductor device having bipolar transistor with unique ratio of base gummel number to impurity concentration of collector region To obtain both the highest possible maximum operating frequency fmax and early voltage VA, a semiconductor device provided with a bipolar transistor including a collector region, a base region formed on the collector region, an emitt... | 03/23/1999 |
| 5712505 | Bipolar transistor having ring shape base and emitter regions A ring-shaped emitter region is formed either in a region a little toward an inner periphery or in a region a little toward an outer periphery in an upper layer portion of a ring-shaped base region of a bipolar transistor. A conductive layer is laminated throu... | 01/27/1998 |
| 5593905 | Method of forming stacked barrier-diffusion source and etch stop for double polysilicon BJT with patterned base link A bipolar transistor (100) and a method for forming the same. A base-link diffusion source layer (118) is formed over a portion of the collector region (102). The base-link diffusion source layer (118) comprises a material that is capable of being used as... | 01/14/1997 |
| 5501992 | Method of manufacturing bipolar transistor having ring-shaped emitter and base A ring-shaped emitter region is formed either in a region a little toward an inner periphery or in a region a little toward an outer periphery in an upper layer portion of a ring-shaped base region of a bipolar transistor. A conductive layer is laminated ... | 03/26/1996 |
| 5471419 | Semiconductor device having a programmable memory cell A semiconductor device having a programmable memory cell which includes a bipolar transistor of which a base region (13) can be provided with a base current through a control transistor (7, 8, 9, 10). The bipolar transistor has an emitter region (12) conn... | 11/28/1995 |
| 5448104 | Bipolar transistor with base charge controlled by back gate bias A back gate bias voltage is applied to the underside of a lateral bipolar transistor to desensitize a portion of the collector-base depletion region to changes in the collector-base voltage. Emitter-collector current flows through an active base region by... | 09/05/1995 |
| 5319239 | Polysilicon-collector-on-insulator polysilicon-emitter bipolar A bipolar transistor is described having a thin subcollector formed from alternating polycrystalline semiconductor material and silicide material disposed over an insulating layer. Because the subcollector is thin the transistor is less sensitive to alpha... | 06/07/1994 |
| 5285101 | Semiconductor device A semiconductor device has an active region composed of an impurity diffused region formed in a substrate. The impurity diffused region is divided into a plurality of impurity diffused sub-regions formed separately from each other in the substrate but ele... | 02/08/1994 |
| 5256896 | Polysilicon-collector-on-insulator polysilicon-emitter bipolar transistor A bipolar transistor is described having a thin subcollector formed from alternating polycrystalline semiconductor material and silicide material disposed over an insulating layer. Because the subcollector is thin the transistor is less sensitive to alpha... | 10/26/1993 |
| 5250838 | Semiconductor device comprising an integrated circuit having a vertical bipolar transistor The invention relates to an integrated circuit having a vertical transistor. According to the invention, a transistor having a current amplification ଲ considerably higher than a conventional transistor is obtained due to the fact that the emitter (5... | 10/05/1993 |
| 5089873 | Integrated circuit having a vertical transistor The invention relates to an integrated circuit including a vertical transistor having an emitter having at least one zone (12), a base (2) having a base contacting region (15) adjoining a major surface of the integrated circuit, and a collector (5). The b... | 02/18/1992 |
| 5021863 | Semiconductor quantum effect device having negative differential resistance characteristics A semiconductor quantum effect device having negative differential resistance characteristics includes a composite potential barrier layer including a first potential barrier layer and a second potential barrier layer; a carrier injection side semiconduct... | 06/04/1991 |
| 4956681 | Ternary logic circuit using resonant-tunneling transistors A logic gate including a resonant-tunneling transistor and a resistor connected in series thereto. The resonant-tunneling transistor has a superlattice structure. The resonant-tunneling transistor may be a resonant-tunneling hot electron transistor or a r... | 09/11/1990 |
| 4935800 | Semiconductor integrated circuit This invention discloses a semiconductor integrated circuit in which an analog circuit and a digital circuit are formed on a single chip. The semiconductor integrated circuit includes a p-type semiconductor region, an n+ -type buried region for... | 06/19/1990 |
| 4916505 | Composite unipolar-bipolar semiconductor devices A composite unipolar-bipolar semiconductor device in which a sourceless field-effect transistor structure is fabricated upon the outer face of one member of a junction diode structure. In some embodiments the gate portion of the sourceless field-effect tr... | 04/10/1990 |
| 4907196 | Semiconductor memory device using resonant-tunneling transistor A semiconductor memory device comprises a transistor having such a current characteristic that a base current has a differential negative resistance characteristic and a collector current greatly flows after the differential negative resistance characteri... | 03/06/1990 |
| 4902912 | Apparatus including resonant-tunneling device having multiple-peak current-voltage characteristics A semiconductor integrated resonant-tunneling device having multiple negative-resistance regions, and having essentially equal current peaks in such regions, is useful as a highly compact element, e.g., in apparatus designed for ternary logic operations, ... | 02/20/1990 |
| 4881111 | Radiation hard, high emitter-base breakdown bipolar transistor A vertical bipolar transistor including a base having impurity concentration equal in order of magitude to and being formed in the surface of an emitter, a collector having impurity concentration at least two orders of magnitude greater than and being for... | 11/14/1989 |
| 4812890 | Bipolar microwave integratable transistor A method of fabricating bipolar intergratable transistors includes a recrystallization step. A monocrystalline epitaxial layer is deposited upon a highly doped substrate and impurities are introduced into a portion of the epitaxial layer to form a first t... | 03/14/1989 |
| 4805004 | Semiconductor device with a planar junction and self-passivating termination A semiconductor device with a planar junction and self-passivating termination includes: a silicon substrate of one type of conductivity; an epitaxial layer of a second type of conductivity which is opposite to the first type of conductivity, lying on the... | 02/14/1989 |
