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| Number | Title | Issue Date |
| 7679164 | Bipolar transistor with silicided sub-collector Embodiments of the invention provide a semiconductor device including a collector in an active region; a first and a second sub-collector, the first sub-collector being a heavily doped semiconductor material adjacent to the collector and the second sub-collector bei... | 03/16/2010 |
| 7569911 | Semiconductor device having an improved wiring or electrode structure An ohmic electrode is formed by stacking a lower Ti layer, a diffusion preventing layer, an upper Ti layers and a metallic (Au) layer on a p-type GaAs layer. The diffusion preventing layer includes tantalum (Ta) or niobium (Nb). Thus, interdiffusion of Ga and As in ... | 08/04/2009 |
| 7239009 | Lead frame and semiconductor device having the same as well as method of resin-molding the same A lead frame structure includes: at least a die pad for mounting a semiconductor chip thereon; a plurality of suspension members mechanically connected with the die pad; and a plurality of supporting members. Each supporting member has a connection region mechanical... | 07/03/2007 |
| 7199038 | Method for fabricating semiconductor device According to an aspect of the invention, there is provided a method for fabricating a semiconductor device. The method may include forming at least one interconnection layer having a low dielectric constant insulating film and an interconnection buried in the low di... | 04/03/2007 |
| 7145205 | Semiconductor device A semiconductor device includes: a semiconductor substrate having two types of active regions that are a PMOS region and an NMOS region separated from each other in plan view by a PN separation film; and a dual-gate electrode extending linearly across the PMOS regio... | 12/05/2006 |
| 7109567 | Semiconductor device and method of manufacturing such device The invention relates to a semiconductor device with a heterojunction bipolar, in particular npn, transistor with an emitter region (1), a base region (2), and a collector region (3), which are provided with respectively a first, a second, and a... | 09/19/2006 |
| 7087979 | Bipolar transistor with an ultra small self-aligned polysilicon emitter The intrinsic base region of a bipolar transistor is formed to avoid a chemical interaction between the chemicals used in a chemical mechanical polishing step and the materials used to form the base region. The method includes the step of forming a trench in a layer... | 08/08/2006 |
| 7064417 | Semiconductor device including a bipolar transistor A semiconductor device includes a bipolar transistor formed on a semiconductor substrate 1, in which a collector region 13 is formed on the semiconductor substrate 1; a first insulating layer 31 having a first opening 51 formed in ... | 06/20/2006 |
| 7038249 | Horizontal current bipolar transistor and fabrication method A bipolar transistor structure for use in integrated circuits where the active device is processed on the sidewall of an n-hill so that the surface footprint does not depend on the desired area of active device region (emitter area). This structure, which is referre... | 05/02/2006 |
| 6979884 | Bipolar transistor having self-aligned silicide and a self-aligned emitter contact border The present invention provides a bipolar transistor having a raised extrinsic base silicide and an emitter contact border that are self-aligned. The bipolar transistor of the present invention exhibit reduced parasitics as compared with bipolar transistors that do n... | 12/27/2005 |
| 6967144 | Low doped base spacer for reduction of emitter-base capacitance in bipolar transistors with selectively grown epitaxial base A bipolar transistor structure includes a collector region having a first conductivity type formed in a semiconductor substrate. A base region is formed over the collector region; the base region includes a highly doped lower layer having a second conductivity type ... | 11/22/2005 |
| 6949806 | Electrostatic discharge protection structure for deep sub-micron gate oxide The present disclosure provides a deep submicron electrostatic discharge (ESD) protection structure for a deep submicron integrated circuit (IC) and a method for forming such a structure. The structure includes at least two electrodes separated by a dielectric mater... | 09/27/2005 |
| 6943428 | Semiconductor device including bipolar transistor and buried conductive region A semiconductor device and a method for manufacturing the device using a semiconductor substrate of a high resistance with improved Q value of a passive circuit element. Leakage current due to an impurity fluctuation, in the high resistance semiconductor substrate a... | 09/13/2005 |
| 6919615 | Semiconductor device for integrated injection logic cell and process for fabricating the same A semiconductor device for an integrated injection logic cell having a pnp bipolar transistor structure formed on a semiconductor substrate, wherein at least one layer of insulating films formed on a base region of the pnp bipolar transistor structure is comprised o... | 07/19/2005 |
| 6897545 | Lateral operation bipolar transistor and a corresponding fabrication process The transistor includes an emitter region 17 disposed in a first isolating well 11, 150 formed in a semiconductor bulk. An extrinsic collector region 16 is disposed in a second isolating well 3, 150 formed in the semiconductor bulk SB and... | 05/24/2005 |
| 6787880 | ESD parasitic bipolar transistors with high resistivity regions in the collector A method and a structure for a parasitic bipolar silicided ESD device that has high resistivity regions within the collector of the parasitic NPN. The device has the structure of a N-MOS transistor and a substrate contact. The device preferably has silicide regions ... | 09/07/2004 |
| 6744105 | Memory array having shallow bit line with silicide contact portion and method of formation A core memory array having a plurality of charge trapping dielectric memory devices. The core memory array can include a substrate having a first semiconductor bit line and a second semiconductor bit line formed therein and a body region interposed between the first... | 06/01/2004 |
| 6737710 | Transistor structure having silicide source/drain extensions A MOSFET includes a double silicided source/drain structure wherein the source/drain terminals include a silicided source/drain extension, a deep silicided source/drain region, and a doped semiconductor portion that surrounds a portion of the source/drain structure ... | 05/18/2004 |
| 6594172 | Method of selectively forming local interconnects using design rules The invention includes a method of fabricating a circuit in a manner to place certain structures within a predefined distance of one another. Electrical connections are formed between certain structures of silicon, by annealing a conductive material to ca... | 07/15/2003 |
| 6589833 | ESD parasitic bipolar transistors with high resistivity regions in the collector A method and a structure for a parasitic bipolar silicided ESD device that has high resistivity regions within the collector of the parasitic NPN. The device has the structure of a N-MOS transistor and a substrate contact. The device preferably has silici... | 07/08/2003 |
| 6576973 | Schottky diode on a silicon carbide substrate A vertical Schottky diode including an N-type silicon carbide layer of low doping level formed by epitaxy on a silicon carbide substrate of high doping level. The periphery of the active area of the diode is coated with a P-type epitaxial silicon carbide ... | 06/10/2003 |
| 6570240 | Semiconductor device having a lateral bipolar transistor and method of manufacturing same In order to form a semiconductor device including a lateral bipolar transistor which is a match in the device performance for a vertical bipolar transistor, an electrically conductive film which is formed by filling a trench reaching a buried oxide film i... | 05/27/2003 |
| 6495904 | Compact bipolar transistor structure A bipolar transistor structure that includes a semiconductor material substrate that has a bottom substrate and base region of a first conductivity type and a buried layer, collector region and sink region of a second conductivity type. The substrate has ... | 12/17/2002 |
| 6476506 | Packaged semiconductor with multiple rows of bond pads and method therefor A semiconductor die has three rows or more of bond pads with minimum pitch. The die is mounted on a package substrate having three rows or more of bond fingers and/or conductive rings. The bond pads on the outermost part of the die (nearest the perimeter ... | 11/05/2002 |
| 6441462 | Self-aligned SiGe NPN with improved ESD robustness using wide emitter polysilicon extension A semiconductor bipolar transistor structure having improved electrostatic discharge (ESD) robustness is provided as well as a method of fabricating the same. Specifically, the inventive semiconductor structure a semiconductor structure comprises a bipola... | 08/27/2002 |
| 6414370 | Semiconductor circuit preventing electromagnetic noise A semiconductor circuit or a semiconductor device has the current-voltage characteristic that, in a blocking-state of the semiconductor circuit or the semiconductor device, a current gently flows for values of a voltage equal to or greater than a first vo... | 07/02/2002 |
| 6306758 | Multipurpose graded silicon oxynitride cap layer A graded cap layer that reduces the overall height of a layer stack and provides for increased process control during subsequent patterning of the layer stack, is described with a method of making the same. The graded cap layer is configured to function a... | 10/23/2001 |
| 6225679 | Method and apparatus for protecting a device against voltage surges A structure for the protection of a high-voltage pad includes a lateral bipolar transistor, an N-type diffusion of which, connected to the pad to be protected, is made in an N-type tub with a zone that extends laterally outside the tub in the base. A P-ty... | 05/01/2001 |
| 6215160 | Semiconductor device having bipolar transistor and field effect transistor and method of manufacturing the same A semiconductor device with a reduced insulating capacitance between an emitter electrode and a base layer, and a manufacturing method thereof are disclosed. In the semiconductor device, at least first and second insulating layers are interposed between t... | 04/10/2001 |
| 6198154 | PNP lateral bipolar electronic device A lateral PNP bipolar electronic device integrated monolithically on a semiconductor substrate together with other NPN bipolar devices capable of being operated at high frequencies. The PNP device is incorporated to an electrically insulated multilayer st... | 03/06/2001 |
| 6157068 | Semiconductor device with local interconnect of metal silicide A first metal silicide film is formed on an exposed silicon region of a substrate on which the silicon region and an insulating region are exposed. A metal film is deposited over the whole surface of the substrate covering the first metal silicide film, t... | 12/05/2000 |
| 6140694 | Field isolated integrated injection logic gate An integrated injection logic device is provided in which each collector of an I2L gate is isolated by a field oxide ("FOX"), or by other suitable isolation such as, for example, an isolation trench. The connection of the base to the collectors, between t... | 10/31/2000 |
| 6049131 | Device formed by selective deposition of refractory metal of less than 300 Angstroms of thickness A method and the device produced by the method of selective refractory metal growth/deposition on exposed silicon, but not on the field oxide is disclosed. The method includes preconditioning a wafer in a DHF dip followed by the steps of 1) selectively de... | 04/11/2000 |
| 6040589 | Semiconductor device having larger contact hole area than an area covered by contact electrode in the hole There is disclosed an active matrix liquid crystal display comprising pixels having an improved aperture ratio. A metallization layer makes contact with an active layer through openings. Inside the openings, the active layer is patterned into the same geo... | 03/21/2000 |
| 6008524 | Integrated injection logic semiconductor device A logic circuit is formed of an I2 L cell structure in which a difference of switching speeds at every collector in a multi-collector structure is small. In a semiconductor device in which an integrated injection logic cell including a constant... | 12/28/1999 |
| 6005284 | Semiconductor device and its manufacturing method A bipolar semiconductor device includes an npn transistor using a base outlet electrode in the form of a polycrystalline Si film and one or more other devices using an electrode in the form of a polycrystalline Si film supported on a common p-type Si subs... | 12/21/1999 |
| 5986323 | High-frequency bipolar transistor structure A high-frequency bipolar transistor structure includes a base region of a first conductivity type formed in a silicon layer of a second conductivity type, the base region comprising an intrinsic base region surrounded by an extrinsic base region, an emitt... | 11/16/1999 |
| 5939759 | Silicon-on-insulator device with floating collector In a semiconductor device including a silicon substrate, an insulating layer on the silicon substrate, a silicon layer on the insulating layer, the silicon layer being weakly doped with impurities of a first conduction type, a base region extending into t... | 08/17/1999 |
| 5917223 | Semiconductor device having salicide layer A semiconductor device has a metal silicide on silicon conductor formed using a salicide process. The metal silicide layer of the conductor includes boron which improves the morphology and conductivity of the metal silicide layer. Implanting boron into th... | 06/29/1999 |
| 5917244 | Integrated circuit inductor structure formed employing copper containing conductor winding layer clad with nickel containing conductor layer A method for fabricating a copper containing integrated circuit structure within an integrated circuit, and the copper containing integrated circuit structure formed through the method. There is first provided a substrate layer. There is then formed throu... | 06/29/1999 |
