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Wearable Device For Feeding and Observing Birds and Other Flying Animals
A device for feeding and observing flying animals comprising a hat, a support mounted on the hat and extending outward from the hat, and a feeder mounted on the support.
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| Number | Title | Issue Date |
| 7952165 | Heterojunction bipolar transistor (HBT) with self-aligned sub-lithographic metal-semiconductor alloy base contacts A heterojunction bipolar transistor structure with self-aligned sub-lithographic extrinsic base region including a self-aligned metal-semiconductor alloy and self-aligned metal contacts made to the base is disclosed. The lateral dimension of the extrinsic base regio... | 05/31/2011 |
| 7425754 | Structure and method of self-aligned bipolar transistor having tapered collector A bipolar transistor is provided which includes a tapered, i.e. frustum-shaped, collector pedestal having an upper substantially planar surface, a lower surface, and a slanted sidewall extending between the upper surface and the lower surface, the upper surface havi... | 09/16/2008 |
| 7319254 | Semiconductor memory device having resistor and method of fabricating the same A semiconductor device having resistors in a peripheral area and fabrication method thereof are provided. A mold layer is formed on a semiconductor substrate. The mold layer is patterned to form first molding holes and a second molding hole in the mold layer. A stor... | 01/15/2008 |
| 7271019 | Lateral heat spreading layers for epi-side up ridge waveguide semiconductor lasers Disclosed are a semiconductor device and method of manufacturing the same comprising a substrate, a mesa region adjacent to the substrate, an electroplated metal layer, for reducing the thermal resistance of the device, surrounding the mesa region, an insulator laye... | 09/18/2007 |
| 7256433 | Bipolar transistor and a method of manufacturing the same A bipolar transistor having enhanced characteristics is fabricated by etching a base mesa, which is formed below an emitter mesa (upper emitter layer) and a base electrode, so as to have jut regions on the edges of its generally rectangular region. A mask film, e.g.... | 08/14/2007 |
| 7253498 | Bipolar transistor with geometry optimized for device performance, and method of making same The present invention is generally directed to bipolar transistors with geometry optimized for device performance and various methods of making same. In one illustrative embodiment, the device includes a substrate, an intrinsic base region formed in the substrate, a... | 08/07/2007 |
| 7247533 | Method of fabricating semiconductor device using selective epitaxial growth A method of fabricating a semiconductor device uses selective epitaxial growth (SEG), by which leakage current generation is minimized using lateral SEG growth in case a contact intrudes a shallow track isolation feature. The method includes steps of forming a sidew... | 07/24/2007 |
| 7190047 | Transistors and methods for making the same Apparatus comprising: a first compound semiconductor composition layer doped to have a first charge carrier polarity; a second compound semiconductor composition layer doped to have a second charge carrier polarity and located on the first layer; a third compound se... | 03/13/2007 |
| 7141856 | Multi-structured Si-fin Disclosed is a semiconductor fin construction useful in FinFET devices that incorporates an upper region and a lower region with wherein the upper region is formed with substantially vertical sidewalls and the lower region is formed with inclined sidewalls to produc... | 11/28/2006 |
| 7126171 | Bipolar transistor A bipolar transistor of the present invention comprises a collector layer made of an n-type semiconductor and an emitter layer made of an n-type semiconductor provided on this collector layer. A gate layer for injecting p-type carriers (holes) into the emitter layer... | 10/24/2006 |
| 7087979 | Bipolar transistor with an ultra small self-aligned polysilicon emitter The intrinsic base region of a bipolar transistor is formed to avoid a chemical interaction between the chemicals used in a chemical mechanical polishing step and the materials used to form the base region. The method includes the step of forming a trench in a layer... | 08/08/2006 |
| 7067857 | Semiconductor device having led out conductor layers, manufacturing method of the same, and semiconductor module The gist of the present invention is as follows: In a monolithic microwave integrate circuit (MMIC) using a heterojunction bipolar transistor (HBT), via holes are respectively formed from the bottom of the MMIC for the emitter, base and collector. Of the via holes, ... | 06/27/2006 |
| 7064417 | Semiconductor device including a bipolar transistor A semiconductor device includes a bipolar transistor formed on a semiconductor substrate 1, in which a collector region 13 is formed on the semiconductor substrate 1; a first insulating layer 31 having a first opening 51 formed in ... | 06/20/2006 |
| 7061022 | Lateral heat spreading layers for epi-side up ridge waveguide semiconductor lasers Disclosed are a semiconductor device and method of manufacturing the same comprising a substrate, a mesa region adjacent to the substrate, an electroplated metal layer, for reducing the thermal resistance of the device, surrounding the mesa region, an insulator laye... | 06/13/2006 |
| 7061074 | Visible imaging device using Darlington phototransistors The present invention is a modified darlington phototransistor wherein a phototransistor is coupled to a Bipolar Junction Transistor (BJT). This design provides a high sensitivity and a fast response and effectively increases the gain of the photocurrent. This circu... | 06/13/2006 |
| 7034379 | Carbide emitter mask etch stop Bipolar transistors and methods for fabricating bipolar transistors are disclosed wherein an emitter-base dielectric stack is formed between emitter and base structures, comprising a carbide layer situated between first and second oxide layers. The carbide layer pro... | 04/25/2006 |
| 6962842 | Method of removing a sacrificial emitter feature in a BICMOS process with a super self-aligned BJT A method of removing a sacrificial emitter feature in a bipolar complementary metal oxide semiconductor (BICMOS) process with a super self-aligned bipolar junction transistor (BJT) is disclosed. According to the new method, a mask layer, such as an oxide deposited u... | 11/08/2005 |
| 6812545 | Epitaxial base bipolar transistor with raised extrinsic base An epitaxial base bipolar transistor comprising an epitaxial single crystal layer on a single crystal single substrate; a raised emitter on the semiconductor surface; a raised extrinsic base on the surface of the semiconductor substrate; an insulator between the rai... | 11/02/2004 |
| 6803642 | Bipolar device having non-uniform depth base-emitter junction A non-uniform depth base-emitter junction, with deeper junction at the lateral portions of the emitter, preferably coupled with a recessed and raised extrinsic base, bipolar transistor, and a method of making the same. The bipolar transistor includes a substrate, a ... | 10/12/2004 |
| 6797995 | Heterojunction bipolar transistor with InGaAs contact and etch stop layer for InP sub-collector A thin InGaAs contact layer is provided for the collector of a heterojunction bipolar transistor (HBT) above an InP sub-collector. The contact layer provides a low resistance contact mechanism and a high thermal conductivity path for removing device heat though the ... | 09/28/2004 |
| 6777782 | Method for fabricating base-emitter self-aligned heterojunction bipolar transistors A transistor and method for making the same are disclosed. The transistor is constructed from a collector layer, a base layer, and an emitter layer in a stacked arrangement. The emitter layer is etched to form a mesa on an etched surface, the mesa having a top surfa... | 08/17/2004 |
| 6680236 | Ion-implantation and shallow etching to produce effective edge termination in high-voltage heterojunction bipolar transistors A method is provided for improving edge terminations in a semiconductor device while maintaining breakdown voltage of said semiconductor device at or near its theoretical limit. The method comprises: employing ion-implantation to create a compensated regi... | 01/20/2004 |
| 6627925 | Transistor having a novel layout and an emitter having more than one feed point A transistor with a novel compact layout is provided. The transistor has an emitter layout having a track with a first feed point and a second feed point whereby current flows through both the first feed point and the second feed point. A base terminal, a... | 09/30/2003 |
| 6600179 | Power amplifier with base and collector straps A semiconductor amplifier includes collector straps that form air bridges over a set of transistors and make parallel electrical connections between the collectors of the transistor and collector contact pad. Base straps establish base bias and electrical... | 07/29/2003 |
| 6600211 | Bipolar transistor constructions The invention includes a bipolar transistor construction having a collector region, emitter region, and base region extending within a semiconductive material substrate. The construction further comprises separate access regions associated with the base r... | 07/29/2003 |
| 6593604 | Heterojunction bipolar transistor, manufacturing method therefor, and communication device therewith An emitter of a heterojunction bipolar transistor has a double-layer protrusion formed of a first emitter layer and a second emitter layer and protruded outside an external base region. The protrusion of 50 nm in total thickness is enough to prevent damag... | 07/15/2003 |
| 6586782 | Transistor layout having a heat dissipative emitter Various embodiments of a novel transistor layout having improved electrical and heat dissipation characteristics are disclosed. Several embodiments include various intrinsic components contoured to the shape of the emitter. The various intrinsic component... | 07/01/2003 |
| 6486532 | Structure for reduction of base and emitter resistance and related method According to one embodiment, a semiconductor device including a base, an emitter, and an emitter contact on top of the emitter is disclosed. For example, the semiconductor device can be a silicon-germanium heterojunction bipolar transistor, in which the b... | 11/26/2002 |
| 6376897 | Lateral bipolar transistor formed on an insulating layer In a bipolar transistor improved to exhibit an excellent high-frequency property by decreasing the width of the intrinsic base with without increasing the base resistance, an emitter region, intrinsic base region and collector region are closely aligned o... | 04/23/2002 |
| 6310368 | Semiconductor device and method for fabricating same A semiconductor device includes: a semiconductor layered structure including a predetermined mesa portion, formed on a semiconductor substrate; a support member formed so as to bury the mesa portion; and an interconnection layer formed on a top surface of... | 10/30/2001 |
| 6245628 | Method of manufacturing a resistor in a semiconductor device A resistive area 7 is formed selectively on a semi-insulating substrate 1, and ohmic electrodes 10 are formed on both ends of the resistive area. Then a photo resist 14 having an opening 13 between the electrodes 10 is so formed as not completely across t... | 06/12/2001 |
| 6236071 | Transistor having a novel layout and an emitter having more than one feed point A transistor with a novel compact layout is provided. The transistor has an emitter layout having a track with a first feed point and a second feed point whereby current flows through both the first feed point and the second feed point. A base terminal, a... | 05/22/2001 |
| 6222249 | Semiconductor device A number of npn and pnp bipolar transistors is formed in a single chip of silicon, so that some of the transistors have a greater frequency response than others. The higher frequency transistors have their emitters located closer to the collectors, by pos... | 04/24/2001 |
| 6159414 | Large composite core structures formed by vacuum assisted resin transfer molding Large composite structures are produced using a vacuum assisted resin transfer molding process. The structures incorporate cores, which may be hollow cells or foam blocks. A plurality of cores, each of which may be wrapped with a fiber material, is arrang... | 12/12/2000 |
| 6137154 | Bipolar transistor with increased early voltage An improved bipolar transistor (202) has an increased Early voltage and can be integrated on a semiconductor die with MOS transistors (201) and other types of devices to form an integrated circuit (200). A p-type base region (240) is disposed in an n-type... | 10/24/2000 |
| 6051871 | Heterojunction bipolar transistor having improved heat dissipation A heterojunction bipolar transistor has a mesa including collector 604, base 603, and emitter 602 layers. The mesa has first and second sidewalls 606. An improved heat dissipation structure comprises a layer of electrically insulative and thermally conduc... | 04/18/2000 |
| 6040617 | Structure to provide junction breakdown stability for deep trench devices The present invention is directed to an improved deep trench structure, for use in junction devices, which addresses junction breakdown voltage instabilities of the prior art. The primary, or metallurgical, junction where avalanche breakdown occurs is mov... | 03/21/2000 |
| 5861640 | Mesa bipolar transistor with sub base layer A mesa bipolar transistor comprising a collector layer formed on a surface of a substrate, a base layer disposed on the substrate so as to be joined to the collector layer, an emitter layer disposed on the base layer is further provided with a sub base la... | 01/19/1999 |
| 5859469 | Use of tungsten filled slots as ground plane in integrated circuit structure A semiconductor device having the base and collector surrounded by a continuous tungsten filled slot as ground plane. The portion of the tungsten filled slot over the buried layer extends beyond the surface of the buried layer and the portion of the tungs... | 01/12/1999 |
| 5783966 | Reducing junction capacitance and increasing current gain in collector-up bipolar transistors This is a method of fabricating a bipolar transistor on a wafer. The method can comprise: forming a doped emitter contact layer 31 on a substrate 30; forming a doped emitter layer 32 on top of the emitter contact layer, the emitter layer doped same conduc... | 07/21/1998 |
