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| Number | Title | Issue Date |
| 7847374 | Non-volatile memory cell array and logic A semiconductor device comprising a memory region including one or more transistor string arrays, a logic region including one or more logic transistors and an isolation region for isolating the logic transistors. The string array includes a plurality, T, of bipolar... | 12/07/2010 |
| 7576409 | Group III-V compound semiconductor based heterojuncton bipolar transistors with various collector profiles on a common wafer A wafer comprising at least one high Ft HBT and at least one high BVceo HBT having various collector profiles on a common III-V compound semiconductor based wafer. The N+ implant in the collector varies the collector profiles of individual HBTs on the waf... | 08/18/2009 |
| 7414298 | Super self-aligned collector device for mono-and hetero bipolar junction transistors, and method of making same The invention relates to a process of forming a compact bipolar junction transistor (BJT) that includes forming a self-aligned collector tap adjacent the emitter stack and an isolation structure. A base layer is formed from epitaxial silicon that is disposed in the ... | 08/19/2008 |
| 7329925 | Device for electrostatic discharge protection A device for electrostatic discharge (ESD) protection is disclosed. The device for electrostatic discharge protection includes a lateral bipolar transistor and a diode. The semiconductor transistor has an emitter, a base and a collector electrically connected to a f... | 02/12/2008 |
| 7276744 | Semiconductor device and method of manufacturing the same This invention is intended to provide an HBT capable of achieving, if the HBT is a collector-up HBT, the constriction of the emitter layer disposed directly under an external base layer, and reduction in base-emitter junction capacity, or if the HBT is an emitter-up... | 10/02/2007 |
| 7239007 | Bipolar transistor with divided base and emitter regions A modified bipolar transistor defined for providing a larger emitter current than a basic emitter current from a basic bipolar transistor is provided. The modified transistor has an improved emitter structure comprising plural divided sub-emitter regions electricall... | 07/03/2007 |
| 7235860 | Bipolar transistor including divided emitter structure A modified bipolar transistor defined for providing a larger emitter current than a basic emitter current from a basic bipolar transistor is provided. The modified transistor has an improved emitter structure comprising plural divided sub-emitter regions electricall... | 06/26/2007 |
| 7226835 | Versatile system for optimizing current gain in bipolar transistor structures Disclosed are apparatus and methods for designing electrical contact for a bipolar emitter structure. The area of an emitter structure (106, 306, 400, 404) and the required current density throughput of an electrical contact structure (108, 308, 402, 406 | 06/05/2007 |
| 7173320 | High performance lateral bipolar transistor A lateral bipolar transistor includes an emitter region, a base region, a collector region, and a gate disposed over the base region. A bias line is connected to the gate for applying a bias voltage thereto during operation of the transistor. The polarity of the bia... | 02/06/2007 |
| 7098113 | Method and system for providing a power lateral PNP transistor using a buried power buss A power lateral PNP device is disclosed which includes an epitaxial layer; a first and second collector region embedded in the epitaxial layer; an emitter region between the first and second collector regions. Therefore slots are placed in each of the regions. Accor... | 08/29/2006 |
| 7075156 | Collector structure for electrostatic discharge protection circuits Electrostatic discharge (ESD) devices for protection of integrated circuits are described. ESD devices may be configured to provide uniform breakdown of finger regions extending through a first region of a substrate having a first conductivity type and into a second... | 07/11/2006 |
| 7071500 | Semiconductor device and manufacturing method for the same A bipolar semiconductor device including a collector layer covered at a portion of an outer periphery thereof with an insulating film and having a shape extending in an upper direction and a horizontal direction, with a gap being formed between the collector layer a... | 07/04/2006 |
| 6998818 | Charging circuit with two levels of safety A battery charging circuit having two levels of safety protection is provided. The circuit is said to have “two levels” of safety because if any one component fails (either as a short circuit or as an open circuit) the remainder of the charging circuit ensures t... | 02/14/2006 |
| 6962842 | Method of removing a sacrificial emitter feature in a BICMOS process with a super self-aligned BJT A method of removing a sacrificial emitter feature in a bipolar complementary metal oxide semiconductor (BICMOS) process with a super self-aligned bipolar junction transistor (BJT) is disclosed. According to the new method, a mask layer, such as an oxide deposited u... | 11/08/2005 |
| 6937071 | High frequency differential power amplifier A differential CMOS amplifier includes two CMOS inverters and biasing circuitry providing feedback loops across the output and input of each inverter. The biasing circuitry provides linear biasing so that the inverters can apply a desired gain to a pair of high freq... | 08/30/2005 |
| 6906410 | Semiconductor device and method for manufacturing same A semiconductor device includes a power supply semiconductor chip that has a plurality of current passing electrodes and a plurality of control electrodes. Conductive plates are disposed on the current electrodes and the control electrodes, and extend to regions for... | 06/14/2005 |
| 6870242 | Method for manufacturing and structure of semiconductor device with polysilicon definition structure A method including a buried layer formed on a semiconductor substrate, an active region formed adjacent to at least a portion of the buried layer, an isolation structure formed adjacent to at least a portion of the active region, and a gate oxide formed adjacent to ... | 03/22/2005 |
| 6864538 | Protection device against electrostatic discharges An ESD protection device encompassing a vertical bipolar transistor that is connected as a diode and has an additional displaced base area. The assemblage has a space-saving configuration and a decreased difference between snapback voltage and breakdown voltage.... | 03/08/2005 |
| 6841829 | Self protecting bipolar SCR In a BSCR and method of making a BSCR, a npn BJT structure is created and a p+ region is provided that is connected to the collector of the BJT, and one or more of the NBL, sinker and n+ collector of the BJT are partially blocked. In this way the NBL is formed into ... | 01/11/2005 |
| 6798040 | Power semiconductor switch An IGBT structure includes successive regions whose conductivities have alternating signs. The structure is dimensioned for punch-through and is provided with two buffer layers. As a result, the component becomes symmetrically blocking and is suitable as a semicondu... | 09/28/2004 |
| 6770953 | Bipolar transistor A bipolar transistor is provided in which the product of base-collector capacitance and collector resistance can be reduced through a layout optimization, which leads to an improvement of the critical transistor parameters. The bipolar transistor has an emitter form... | 08/03/2004 |
| 6768183 | Semiconductor device having bipolar transistors An NPN bipolar transistor and a PNP bipolar transistor are formed in a semiconductor substrate. The NPN bipolar transistor has a p type emitter region, a p type collector region and an n type base region and is formed in an NPN forming region. The PNP bipolar transi... | 07/27/2004 |
| 6753592 | Multi-technology complementary bipolar output using polysilicon emitter and buried power buss with low temperature processing A dual polysilicon emitter, complementary output is provided which utilizes a buried power buss. While providing these advantages, the process is not complicated. The process has the speed performance of the ASSET technology with an easier process to produce. In add... | 06/22/2004 |
| 6703685 | Super self-aligned collector device for mono-and hetero bipolar junction transistors The invention relates to a process of forming a compact bipolar junction transistor (BJT) that includes forming a self-aligned collector tap adjacent the emitter stack and an isolation structure. A base layer is formed from epitaxial silicon that is dispo... | 03/09/2004 |
| 6703647 | Triple base bipolar phototransistor A high gain phototransistor uses lateral and vertical transistor structures and a triple base. The base regions of two vertical structures are in the bulk of a semiconductor substrate while the base of a single lateral structure is adjacent a light receiv... | 03/09/2004 |
| 6674147 | Semiconductor device having a bipolar transistor structure Formed on the surface of an n-type semiconductor layer (21) taken as a collector region is a base region (22) consisting of a p-type region, and formed in the p-type region is an emitter region (23) consisting of an n+ -type region. Further, pr... | 01/06/2004 |
| 6664609 | High frequency differential amplification circuit with reduced parasitic capacitance Disclosed is a circuit layout of a differential amplification circuit that constitutes a Gilbert cell, in which two multiple finger bipolar transistors forming a differential amplifier are positioned substantially axially symmetrical to each other. The lo... | 12/16/2003 |
| 6624502 | Method and device for limiting the substrate potential in junction isolated integrated circuits A substrate potential limiting device for an integrated circuit that includes a semiconductor substrate is provided. The device includes at least one unidirectional element connected between a substrate contact on the semiconductor substrate and a referen... | 09/23/2003 |
| 6570240 | Semiconductor device having a lateral bipolar transistor and method of manufacturing same In order to form a semiconductor device including a lateral bipolar transistor which is a match in the device performance for a vertical bipolar transistor, an electrically conductive film which is formed by filling a trench reaching a buried oxide film i... | 05/27/2003 |
| 6566733 | Method and system for providing a power lateral PNP transistor using a buried power buss A power lateral PNP device is disclosed which includes an epitaxial layer; a first and second collector region embedded in the epitaxial layer; an emitter region between the first and second collector regions. Therefore slots are placed in each of the reg... | 05/20/2003 |
| 6384433 | Voltage variable resistor from HBT epitaxial layers A voltage variable resistor formed on heterojunction bipolar transistor epitaxial material includes a current channel made on emitter material. Emitter mesas separated by a recess provide the contacts for the voltage variable resistor. Each mesa is topped... | 05/07/2002 |
| 6365957 | Lateral bipolar transistor An object of the present invention is to provide a lateral bipolar transistor having a high current driving capacity and a high current amplification factor as well as a high cut-off frequency. A device area 13 surrounded by an isolating insulation layer is fo... | 04/02/2002 |
| 6323538 | Bipolar transistor and method for fabricating the same An n-type first single crystal silicon layer is provided as collector region over a silicon substrate with a first insulating film interposed therebetween. A p-type first polysilicon layer is provided as an extension of a base region over the first single... | 11/27/2001 |
| 6245609 | High voltage transistor using P+ buried layer A new design for a high voltage bipolar transistor is disclosed. Instead of a buried subcollector (which would be N+ in an NPN device), a buried P+ layer is used. The presence of this P+ layer results in pinch-off between itself and the bipolar base. This... | 06/12/2001 |
| 6236072 | Method and system for emitter partitioning for SiGe RF power transistors A power transistor includes a plurality of emitter regions and a plurality of base contacts. In order to decrease base resistance, each of the plurality of emitter regions is adjacent to at least four base contacts. The entire transistor includes multiple... | 05/22/2001 |
| 6225679 | Method and apparatus for protecting a device against voltage surges A structure for the protection of a high-voltage pad includes a lateral bipolar transistor, an N-type diffusion of which, connected to the pad to be protected, is made in an N-type tub with a zone that extends laterally outside the tub in the base. A P-ty... | 05/01/2001 |
| 6060761 | Lateral type transistor A lateral transistor includes a semiconductor substrate of a first conductivity type having a major surface; an emitter region of a second conductivity type in the semiconductor substrate on the major surface of the semiconductor substrate; a collector re... | 05/09/2000 |
| 6043555 | Bipolar silicon-on-insulator transistor with increased breakdown voltage In a bipolar silicon-on-insulator transistor having a substrate having a major surface, an oxide layer on the major surface, a silicon layer of a first conductivity type on the oxide layer, a base region of a second conductivity type extending into the si... | 03/28/2000 |
| 5939759 | Silicon-on-insulator device with floating collector In a semiconductor device including a silicon substrate, an insulating layer on the silicon substrate, a silicon layer on the insulating layer, the silicon layer being weakly doped with impurities of a first conduction type, a base region extending into t... | 08/17/1999 |
| 5932922 | Uniform current density and high current gain bipolar transistor A bipolar transistor designed to support a substantially uniform current density in base and collector regions to prevent the characteristic early fall-off of bipolar transistor current gain, and to improve the forward safe operating area performance. The... | 08/03/1999 |
