Did You Know...
...that the Band-Aid Bandage was invented by a Johnson & Johnson employee whose wife had cut herself? Earl Dickson's wife was rather accident prone, so he set out to develop a bandage that she could apply without help. He placed a small piece of gauze in the center of a small piece of surgical tape, and what we know today as the Band Aid bandage was born!
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8018028 | Semiconductor device and method for manufacturing the same A semiconductor device includes a semiconductor substrate, a cell region, an outer peripheral region, a field plate, an outermost peripheral ring, outer peripheral region layer, an insulator film, and a Zener diode. The semiconductor substrate has a superjunction st... | 09/13/2011 |
| 7928533 | Nano-multiplication region avalanche photodiodes and arrays An avalanche photodiode with a nano-scale reach-through structure comprising n-doped and p-doped regions, formed on a silicon island on an insulator, so that the avalanche photodiode may be electrically isolated from other circuitry on other silicon islands on the s... | 04/19/2011 |
| 7863708 | Power device edge termination having a resistor with one end biased to source voltage A field effect transistor (FET) includes a source electrode for receiving an externally-provided source voltage. The FET further includes an active region and a termination region surrounding the active region. A resistive element is coupled to the termination regio... | 01/04/2011 |
| 7521773 | Power device with improved edge termination A field effect transistor includes an active region and a termination region surrounding the active region. A resistive element is coupled to the termination region, wherein upon occurrence of avalanche breakdown in the termination region an avalanche current starts... | 04/21/2009 |
| 7511357 | Trenched MOSFETs with improved gate-drain (GD) clamp diodes A MOSFET device that includes a first Zener diode connected between a gate metal and a drain metal of said semiconductor power device for functioning as a gate-drain (GD) clamp diode. The GD clamp diode includes multiple back-to-back doped regions in a polysilicon l... | 03/31/2009 |
| 7432555 | Testable electrostatic discharge protection circuits A semiconductor die has a bonding pad for a MOSFET such as a power MOSFET and a separate bonding pad for ESD protection circuitry. Connecting the bonding pads together makes the ESD protection circuitry functional to protect the MOSFET. Before connecting the bonding... | 10/07/2008 |
| 7384854 | Method of forming low capacitance ESD robust diodes A method of forming a diode having a capacitance below 0.1 pF and a breakdown voltage of at least 500V. The method including forming an anode of a first conductivity type and a cathode of a second conductivity type disposed below the anode. At least one of the catho... | 06/10/2008 |
| 7381998 | Semiconductor integrated circuit device A semiconductor integrated circuit device according to the present invention includes a diode in a second island region. The anode region of the diode and the dividing region in a first island region having a horizontal PNP transistor are electrically connected to e... | 06/03/2008 |
| 7335915 | Image displaying device and method for manufacturing same A technique for improving the manufacturing yield of an image displaying device is disclosed. A fabrication method of the image displaying device includes the steps of forming on an insulative substrate a plurality of island-like semiconductor layers, forming a gate... | 02/26/2008 |
| 7321138 | Planar diac The invention concerns an asymmetric diac comprising a highly-doped substrate (21) of a first type of conductivity, a lightly-doped epitaxial layer (22) of the second type of conductivity on the upper surface of the substrate (21), a highly-dope... | 01/22/2008 |
| 7309638 | Method of manufacturing a semiconductor component A semiconductor component comprises a first semiconductor region (110, 310), a second semiconductor region (120, 320) above the first semiconductor region, a third semiconductor region (130, 330) above the second semiconductor region, a fourth s... | 12/18/2007 |
| 7238582 | Semiconductor device and process of producing the same The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same... | 07/03/2007 |
| 7227204 | Structure for improved diode ideality A device is provided which includes a single-crystal semiconductor region disposed in a substrate. The single-crystal region includes a first semiconductor material and a diode disposed in the single-crystal region. The diode includes an anode region including a fir... | 06/05/2007 |
| 7227235 | Electrowetting battery having a nanostructured electrode surface A method and apparatus are disclosed wherein a battery comprises an electrode having at least one nanostructured surface. The nanostructured surface is disposed in a way such that an electrolyte fluid of the battery is prevented from contacting the electrode, thus p... | 06/05/2007 |
| 7199403 | Semiconductor arrangement having a MOSFET structure and a zener device The invention relates to a semiconductor arrangement having a MOSFET structure and an active zener function. A n+-doped zone and a p+-doped zone are provided at the bottom of a trench for the purpose of forming zener diodes, the n+-d... | 04/03/2007 |
| 7195987 | Methods of forming CMOS integrated circuit devices and substrates having buried silicon germanium layers therein CMOS integrated circuit devices include an electrically insulating layer and an unstrained silicon active layer on the electrically insulating layer. An insulated gate electrode is also provided on a surface of the unstrained silicon active layer. A Si1-x... | 03/27/2007 |
| 7154129 | Semiconductor arrangement with a p-n transition and method for the production of a semiconductor arrangement A semiconductor system (200), particularly a diode, having a p-n junction is proposed, that is formed as a chip having an edge area, which includes a first layer (2) of a first conductivity type and a second layer (1, 3) of a second conductivity... | 12/26/2006 |
| 7094500 | Secondary battery A secondary battery comprising: a substrate; a first current collector; a first electrode; a solid electrolyte; a second electrode; and a second current collector; the first current collector being formed on the substrate and serving as a current collector of the fi... | 08/22/2006 |
| 7078781 | High-breakdown-voltage semiconductor device A high-breakdown-voltage semiconductor device includes a high-resistance semiconductor layer, first trenches formed on the surface thereof in a longitudinal plane shape and in parallel, a Schottky electrode formed thereon and sandwiched between adjacent first trench... | 07/18/2006 |
| 7038248 | Diverse band gap energy level semiconductor device Hetero-structure semiconductor devices having first and second-type semiconductor junctions are disclosed. The hetero-structures are incorporated into pillar and rail-stack memory circuits improving the forward-to-reverse current ratios thereof. ... | 05/02/2006 |
| 7002210 | Semiconductor device including a high-breakdown voltage MOS transistor On a semiconductor substrate, a well is formed. In the well, one MOS transistor including a gate electrode, a source region, a source field limiting layer and a source/drain region, and another MOS transistor including a gate electrode, a drain electrode, a drain fi... | 02/21/2006 |
| 6936904 | Photo sensing integrated circuit device and related circuit adjustment A light-receiving element having a light-receiving portion is formed on a chip surface. A digital circuit element, an analog circuit element and a circuit adjusting element are provided for cooperatively processing a detection signal produced from the light-receivin... | 08/30/2005 |
| 6936868 | Sequential mesa avalanche photodiode capable of realizing high sensitization and method of manufacturing the same A sequential mesa type avalanche photodiode (APD) includes a semiconductor substrate and a sequential mesa portion formed on the substrate. In the sequential mesa portion, a plurality of semiconductor layers, including a light absorbing layer and a multiplying layer... | 08/30/2005 |
| 6914301 | CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same CMOS integrated circuit devices include an electrically insulating layer and an unstrained silicon active layer on the electrically insulating layer. An insulated gate electrode is also provided on a surface of the unstrained silicon active layer. A Si1-x... | 07/05/2005 |
| 6894324 | Silicon-on-insulator diodes and ESD protection circuits A silicon-on-insulator (SOI) gated diode and non-gated junction diode are provided. The SOI gated diode has a PN junction at the middle region under the gate, and which has more junction area than a normal diode. The SOI non-gated junction diode has a PN junction at... | 05/17/2005 |
| 6861680 | Silicon-on-insulator diodes and ESD protection circuits A silicon-on-insulator (SOI) gated diode and non-gated junction diode are provided. The SOI gated diode has a PN junction at the middle region under the gate, which has more junction area than a normal diode. The SOI non-gated junction diode has a PN junction at the... | 03/01/2005 |
| 6803644 | Semiconductor integrated circuit device and method of manufacturing the same A plurality of connection holes 24 for connecting n+ type semiconductor region 20 of zener diodes (D1, D2) and wires 21 and 22 to each other are not arranged in the center of the n+ type semicon... | 10/12/2004 |
| 6791161 | Precision Zener diodes The present invention is directed to a novel semiconductor device, which can be efficiently fabricated for use in Zener diode applications. Precision Zener diodes and the method for manufacturing the same are provided. The Zener diodes of the present invention are m... | 09/14/2004 |
| 6762461 | Semiconductor element protected with a plurality of zener diodes A protective circuit for protecting an IGBT from a stress due to application of an overvoltage which is induced by a surge such as static electricity is provided. The protective circuit allows for improvement in a voltage tolerance to a stress due to application of ... | 07/13/2004 |
| 6717229 | Distributed reverse surge guard A diode (20), having first and second conductive layers (24,26), a conductive pad (28), and a distributed reverse surge guard (22), provides increased protection from reverse current surges. The surge guard (22) includes an outer l... | 04/06/2004 |
| 6713937 | Minitab rectifier for alternators A diode for use in an under-the-hood automotive application has a TO 220 outline and consists of a diode die on a two piece lead frame which has a thick section to which the bottom of the die is soldered, and a thinner section which extends through a plastic housing... | 03/30/2004 |
| 6706606 | Buried zener diode structure and method of manufacture A buried Zener diode structure and method of manufacture requires no additional process steps beyond those required in a basic standard bipolar flow with up-down isolation. The buried Zener diode has its N++/P+ junction removed from the silicon surface. ... | 03/16/2004 |
| 6696702 | Silicon carbide semiconductor switching device An object of the present invention is to improve the relationship between the switching loss and the conduction loss in a semiconductor device comprising a diode and a switching device made of silicon carbide, while suppressing occurrence of voltage oscil... | 02/24/2004 |
| 6653670 | Silicon-on-insulator diodes and ESD protection circuits A silicon-on-insulator (SOI) gated diode and non-gated junction diode are provided. The SOI gated diode has a PN junction at the middle region under the gate, and which has more junction area than a normal diode. The SOI non-gated junction diode has a PN ... | 11/25/2003 |
| 6650000 | Apparatus and method for forming a battery in an integrated circuit A method and structure that provides a battery within an integrated circuit for providing voltage to low-current electronic devices that exist within the integrated circuit. The method includes Front-End-Of-Line (FEOL) processing for generating a layer of... | 11/18/2003 |
| 6649944 | Silicon-on-insulator diodes and ESD protection circuits A silicon-on-insulator (SOI) gated diode and non-gated junction diode are provided. The SOI gated diode has a PN junction at the middle region under the gate, thus providing more junction area than a normal diode. The SOI non-gated junction diode has a PN... | 11/18/2003 |
| 6627975 | Minitab rectifying diode package with two different types of diodes for alternators A diode for use in an under-the-hood automotive application has a TO 220 outline and consists of a diode die on a two piece lead frame which has a thick section to which the bottom of the die is soldered, and a thinner section which extends through a plas... | 09/30/2003 |
| 6605859 | Buried Zener diode structure and method of manufacture A buried Zener diode structure and method of manufacture requires no additional process steps beyond those required in a basic standard bipolar flow with up-down isolation. The buried Zener diode has its N++/P+ junction removed from the silicon surface.... | 08/12/2003 |
| 6603153 | Fast recovery diode and method for its manufacture A soft recovery diode is made by first implanting helium into the die to a location below the P/N junction and the implant annealed. An E-beam radiation process then is applied to the entire wafer and is also annealed. The diode then has very soft recover... | 08/05/2003 |
| 6579772 | Discrete semiconductor device and manufacturing method thereof A semiconductor device is provided, which prevents the development of localized breakdowns at the semiconductor sidewall, having a stabilized, desired breakdown voltage. It embraces a p-type third semiconductor region formed on a first main surface of an ... | 06/17/2003 |
