"I hate what they've done to my child...I would never let my own children watch it. "
Vladimir Zworykin, television pioneer ; Talking about an invention in which he played a critical role.
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| Number | Title | Issue Date |
| 7319254 | Semiconductor memory device having resistor and method of fabricating the same A semiconductor device having resistors in a peripheral area and fabrication method thereof are provided. A mold layer is formed on a semiconductor substrate. The mold layer is patterned to form first molding holes and a second molding hole in the mold layer. A stor... | 01/15/2008 |
| 7288430 | Method of fabricating heteroepitaxial microstructures An efficient method of fabricating a high-quality heteroepitaxial microstructure having a smooth surface. The method includes detaching a layer from a base structure to provide a carrier substrate having a detached surface, and then forming a heteroepitaxial microst... | 10/30/2007 |
| 7211494 | Semiconductor structures utilizing thin film resistors and tungsten plug connectors and methods for making the same Semiconductor structures and methods for fabricating semiconductor structures are provided. The method comprises forming a first insulating layer having a substantially planar surface overlying a first conductive layer of an interconnect stack. A thin film resistor ... | 05/01/2007 |
| 7208814 | Resistive device and method for its production A resistive device includes a resistive region of a semiconductor material that includes a first region and a second region, wherein the first region has a higher dopant concentration than the second region, and wherein a resistance-determining width of a current pa... | 04/24/2007 |
| 7135755 | Integrated semiconductor device providing for preventing the action of parasitic transistors An electric motor drive system is disclosed which includes a required number of motor driver circuits connected one to each motor armature coil. Fabricated in the form of an integrated circuit, each such motor driver circuit has a parasitic transistor unavoidably cr... | 11/14/2006 |
| 7136299 | High-density phase change cell array and phase change memory device having the same A phase change memory device and, more particularly, to a phase change memory cell array suitable for the implementation of a high-density memory device. The phase change memory cell array includes a first access transistor pair and a second access transistor pair f... | 11/14/2006 |
| 7064413 | Fin-type resistors A method of forming a Fin structure including a resistor present in the thin vertically oriented semiconductor body is provided. The method includes the steps of forming at least one vertically-oriented semiconductor body having exposed vertical surfaces on a substr... | 06/20/2006 |
| 7053463 | High-voltage integrated vertical resistor and manufacturing process thereof The manufacturing process comprises the steps of growing epitaxially a first layer from a semiconductor material substrate, forming in the first layer a first and a second buried region spaced from one another and having conductivity of the type opposite that of the... | 05/30/2006 |
| 7026690 | Memory devices and electronic systems comprising integrated bipolar and FET devices The invention includes BIFETRAM devices. Such devices comprise a bipolar transistor in combination with a field effect transistor (FET) in a three-dimensional stacked configuration. The memory devices can be incorporated within semiconductor-on-insulator (SOI) const... | 04/11/2006 |
| 6979879 | Trim zener using double poly process In a zener zap diode device and a system for making such a device using a double poly process, p+ and n+regions are formed in a tub by means of p-doped and n-doped polysilicon regions, and a p-n junction is formed between the p+ region and an n-tub or between the n+... | 12/27/2005 |
| 6946317 | Method of fabricating heteroepitaxial microstructures An efficient method of fabricating a high-quality microstructure having a smooth surface. The method includes detaching a layer from a base structure to provide a carrier substrate having a detached surface, and then forming a microstructure on the detached surface ... | 09/20/2005 |
| 6878976 | Carbon-modulated breakdown voltage SiGe transistor for low voltage trigger ESD applications Selectively implanting carbon in a transistor lowers the collector-to-emitter breakdown (BVCEO) of the transistor. This transistor, with the lowered BVCEO, is then used as a “trigger” device in an Electrostatic Discharge (ESD) power clamp c... | 04/12/2005 |
| 6849921 | Semiconductor device A semiconductor device includes: a semiconductor substrate; a first insulating film formed on the semiconductor substrate; a polysilicon resistor film formed on the first insulating film; a second insulating film formed on the resistor film; a high heat conductor fi... | 02/01/2005 |
| 6642604 | Semiconductor device with resistor layer having heat radiation path to semiconductor substrate A resistor layer (5) is formed on an isolation insulating film (4) selectively formed in a major surface (1S) of a semiconductor substrate (1). An interlayer insulation film (7) covering the resistor layer (5) has first and second plugs (9, 19) buried the... | 11/04/2003 |
| 6639300 | Semiconductor integrated circuit having an integrated resistance region A semiconductor integrated circuit device comprises an active device and a resistance element formed monolithically on a common substrate wherein the resistance element includes a dummy pattern having a layered structure identical with a layered structure... | 10/28/2003 |
| 6590272 | Structure for a semiconductor resistive element, particularly for high voltage applications A structure for a semiconductor resistive element, applicable in particular to power components, having a high concentration substrate of the n type, a first epitaxial layer of the n type, a region of the p type arranged on said first epitaxial layer so t... | 07/08/2003 |
| 6545340 | Semiconductor device A semiconductor device of the invention in the form of a superlattice-heterojunction bipolar transistor (SL-HBT) 10 incorporates a superlattice region 16 within an emitter mesa 21. The superlattice region 16 provides a non-linear response to a sufficientl... | 04/08/2003 |
| 6107671 | Film device provided with a resistance-adjustable resistive element A film device provided with a resistance-adjustable resistive element comprises a base film, a resistive element, a conductive circuit pattern wherein the resistive element is formed on and connected to the conductive circuit pattern, and a corrective lay... | 08/22/2000 |
| 5880513 | Asymmetric snubber resistor An asymmetric snubber resistor in accordance with the present invention includes a cathode, an N+ region, an N- region, a plurality of P+ regions, and an anode. The N+ region is disposed over the cathode, the N- region is disposed over the N+ region, the ... | 03/09/1999 |
| 5736755 | Vertical PNP power device with different ballastic resistant vertical PNP transistors Disclosed are devices having emitters having resistive emitter diffusion sections are in a radial pattern. Such devices include vertical PNP power devices. The radial pattern of holes defines resistive emitter diffusion sections between adjacent holes. Th... | 04/07/1998 |
| 5652460 | Integrated resistor networks having reduced cross talk An integrated circuit for implementing a resistor network on a die of the integrated circuit. The integrated circuit includes a common conductor, which is disposed on a first side of the die and coupled to resistors of the resistor network. The integrated... | 07/29/1997 |
| 5321279 | Base ballasting Generally, and in one form of the invention a semiconductor device is presented comprising: a transistor comprising an emitter finger and a base finger; and a ballast impedance connected to the base finger. Other devices and methods are also disclosed.... | 06/14/1994 |
| 5304838 | Vertical resistive element for integrated circuit miniaturization A semiconductor device comprises a semiconductor substrate of a first conductivity type; an epitaxial layer of a second conductivity type formed on the semiconductor substrate; an impurity diffusion layer of the second conductivity type embedded between t... | 04/19/1994 |
| 5138417 | High-frequency semiconductor device In a light-frequency transistor a base electrode extends from at lease two portions of a transistor region toward the outside, and the extension portions are connected to each other. Thus, a margin of a current density of a base electrode is not decreased... | 08/11/1992 |
| 4782378 | Transistor having integrated stabilizing resistor and method of making thereof A resistively stabilized transistor in which secondary breakdown is prevented by the insertion of a floating emitter protection region around only one end of a stabilizing resistive region. The transistor includes an ordinary emitter region located within... | 11/01/1988 |
| 4604640 | Darlington transistors In a darlington transistor having an integrated resistor connected from base to emitter of the output transistor element, the effect of the diode between collector and emitter formed when the resistor consists of an extension to the base region is reduced... | 08/05/1986 |
| 4599631 | Semiconductor apparatus having a zener diode integral with a resistor-transistor combination A semiconductor apparatus includes a p+ -type region formed in the surface area of an n- -type semiconductor layer formed on a p-type semiconductor substrate, and an n+ -type region which is formed in a contact relationshi... | 07/08/1986 |
| 4416055 | Method of fabricating a monolithic integrated circuit structure Method of fabricating monolithic integrated circuit structure incorporating a bipolar transistor and a high value resistor. First and second N-type sectors are formed in an N-type epitaxial layer by junction isolation. A silicon oxide layer is formed on t... | 11/22/1983 |
| 4413237 | Sawtooth wave oscillator A sawtooth wave oscillator is disclosed which includes a series connection consisting of a charging circuit and a first capacitor, a voltage dependent capacitor connected in parallel to the first capacitor, and a discharging circuit connected in parallel ... | 11/01/1983 |
| 4316319 | Method for making a high sheet resistance structure for high density integrated circuits A high sheet resistance structure for high density integrated circuits and the method for manufacturing such structure is given. The structure includes a silicon region separated from other silicon regions by a dielectric barrier surrounding the region. A... | 02/23/1982 |
| 4196228 | Fabrication of high resistivity semiconductor resistors by ion implanatation This disclosure relates to a low power write-once, read-only semiconductor memory (PROM or programmable read only memory) array wherein the semiconductor resistors located in the word line decoder and driver and also in the bit line decoder and sense ampl... | 04/01/1980 |
| 4134124 | Semiconductor devices and circuit arrangements including such devices A circuit arrangement is at least partially embodied in a collector-diffusion-isolation (CDI) type device, in a semiconductor body comprising a thin layer initially wholly of one conductivity type on a substrate of the same conductivity type, and the devi... | 01/09/1979 |
| 4013971 | Integrated amplifier A monolitic transistor amplifier includes a negative feedback network between the output stage and an input stage. The network comprises one or more resistive voltage divider L-link with shunt elements which have a higher temperature coefficient than its ... | 03/22/1977 |
| 4011580 | Integrated circuit Improved epitaxial resistor for use in integrated circuits in which for the lateral boundary boundary zones projecting beyond the isolation zones are provided at the surface with a depth of penetration which is smaller than the thickness of the epitaxial ... | 03/08/1977 |
| 3933528 | Process for fabricating integrated circuits utilizing ion implantation A self-aligning process for fabrication of integrated circuits utilizing ion implantation to effect doping. A composed masking technique is used to define self-aligned areas in a silicon oxide layer for definition of isolation, base, resistor and collecto... | 01/20/1976 |