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| Number | Title | Issue Date |
| 8178945 | Programmable PN anti-fuse Structure and method for providing a programmable anti-fuse in a FET structure. A method of forming the programmable anti-fuse includes: providing a p− substrate with an n+ gate stack; implanting an n+ source region and an n+ drain region in the p− substrate; fo... | 05/15/2012 |
| 8159042 | Adopting feature of buried electrically conductive layer in dielectrics for electrical anti-fuse application An anti-fuse structure that included a buried electrically conductive, e.g., metallic layer as an anti-fuse material as well as a method of forming such an anti-fuse structure are provided. According to the present invention, the inventive anti-fuse structure compri... | 04/17/2012 |
| 8125048 | Antifuse structure for in line circuit modification An antifuse structure and methods of forming contacts within the antifuse structure. The antifuse structure includes a substrate having an overlying metal layer, a dielectric layer formed on an upper surface of the metal layer, and a contact formed of contact materi... | 02/28/2012 |
| 8115275 | Electrical antifuse An antifuse having a link including a region of unsilicided semiconductor material may be programmed at reduced voltage and current and with reduced generation of heat by electromigration of metal or silicide from a cathode into the region of unsilicided semiconduct... | 02/14/2012 |
| 8097931 | Fuse part in semiconductor device and method for forming the same A fuse part in a semiconductor device has a plurality of fuse lines extended along a first direction with a given width along a second direction. The fuse part includes a first conductive pattern having a space part formed in a fuse line region over a substrate, whe... | 01/17/2012 |
| 8067815 | Aluminum copper oxide based memory devices and methods for manufacture Memory devices are described along with methods for manufacturing. A memory device as described herein includes a first electrode and a second electrode. The memory device further includes a diode and an anti-fuse metal-oxide memory element comprising aluminum oxide... | 11/29/2011 |
| 8058701 | Antifuse structures, antifuse array structures, methods of manufacturing the same Antifuse structures, antifuse arrays, methods of manufacturing, and methods of operating the same are provided. An antifuse structure includes bitlines formed as first diffusing regions within a semiconductor substrate, an insulation layer formed on the bitlines, an... | 11/15/2011 |
| 8049299 | Antifuses with curved breakdown regions An antifuse (40, 80, 90′) comprises, first (22′, 24′) and second (26′) conductive regions having spaced-apart curved portions (55, 56), with a first dielectric region (44) therebetween, forming in combination with the curve... | 11/01/2011 |
| 8030736 | Fin anti-fuse with reduced programming voltage A method forms an anti-fuse structure comprises a plurality of parallel conductive fins positioned on a substrate, each of the fins has a first end and a second end. A second electrical conductor is electrically connected to the second end of the fins. An insulator ... | 10/04/2011 |
| 8026574 | Anti-fuse memory cell An anti-fuse memory cell having a variable thickness gate oxide. The variable thickness gate oxide has a thick gate oxide portion and a thin gate oxide portion, where the thing gate oxide portion has at least one dimension less than a minimum feature size of a proce... | 09/27/2011 |
| 8022503 | Anti-fusse structure and method of fabricating the same An anti-fuse structure and a method of fabricating the same are described. The anti-fuse structure is disposed over a substrate having at least one device and a copper layer therein. The anti-fuse structure includes a bottom conductive layer, an insulating layer and... | 09/20/2011 |
| 8018025 | Nonvolatile memory cell comprising a reduced height vertical diode A nonvolatile memory cell includes: a rail-shaped first conductor formed at a first height above a substrate; a rail-shaped second conductor formed above the first conductor; and a vertically oriented first pillar comprising a p-i-n first diode; wherein the first pi... | 09/13/2011 |
| 8018024 | P-i-n diode crystallized adjacent to a silicide in series with a dielectric antifuse A method is described for forming a nonvolatile one-time-programmable memory cell having reduced programming voltage. A contiguous p-i-n diode is paired with a dielectric rupture antifuse formed of a high-dielectric-constant material, having a dielectric constant gr... | 09/13/2011 |
| 7994607 | Semiconductor device and manufacturing method thereof It is an object of the present invention to provide a semiconductor device mounted with a memory which can be driven in the ranges of a current value and a voltage value which can be generated from a wireless signal. It is another object to provide a write-once read... | 08/09/2011 |
| 7989914 | Anti-fuse cell and its manufacturing process An anti-fuse cell includes a standard MOS transistor of an integrated circuit, with source and drain regions covered with a metal silicide layer and at least one track of a resistive layer at least partially surrounding the MOS transistor, and adapted to pass a heat... | 08/02/2011 |
| 7982285 | Antifuse structure having an integrated heating element The present invention provides antifuse structures having an integrated heating element and methods of programming the same, the antifuse structures comprising first and second conductors and a dielectric layer formed between the conductors, where one or both of the... | 07/19/2011 |
| 7977766 | Trench anti-fuse structures for a programmable integrated circuit Trench anti-fuse structures, design structures embodied in a machine readable medium for designing, manufacturing, or testing a programmable integrated circuit. The anti-fuse structure includes a trench having a plurality of sidewalls that extend into a substrate, a... | 07/12/2011 |
| 7968967 | One-time-programmable anti-fuse formed using damascene process A semiconductor structure includes a semiconductor substrate, a power source, and a stacked structure over the semiconductor substrate and coupled to the power source. The stacked structure includes a bottom electrode, a top electrode, and an insulation layer betwee... | 06/28/2011 |
| 7923813 | Anti-fuse memory device A One Time Programmable (OTP) memory cell (10) comprising a first, metallic layer (12) coated with a second, conductive stable transition compound (14) with an insulating layer (16) there-between. The first and second layers (12, 14 | 04/12/2011 |
| 7911025 | Fuse/anti-fuse structure and methods of making and programming same Techniques are provided for fuse/anti-fuse structures, including an inner conductor structure, an insulating layer spaced outwardly of the inner conductor structure, an outer conductor structure disposed outwardly of the insulating layer, and a cavity-defining struc... | 03/22/2011 |
| 7880266 | Four-terminal antifuse structure having integrated heating elements for a programmable circuit The present invention provides antifuse structures having an integrated heating element and methods of programming the same, the antifuse structures comprising first and second conductors and a dielectric layer formed between the conductors, where one or both of the... | 02/01/2011 |
| 7834417 | Antifuse elements An antifuse element (102, 152, 252, 302, 352, 402, 602, 652, 702) includes a substrate material (101) having an active area (106) formed in an upper surface, a gate electrode (104) having at least a portion positioned above the active are... | 11/16/2010 |
| 7825491 | Light-emitting device using voltage switchable dielectric material A voltage switchable dielectric material (VSD) material as part of a light-emitting component, including LEDs and OLEDs. ... | 11/02/2010 |
| 7786549 | Antifuse structure and system for closing thereof A structure and method for providing an antifuse which is closed by laser energy with an electrostatic assist. Two or more metal segments are formed over a semiconductor structure with an air gap or a porous dielectric between the metal segments. Pulsed laser energy... | 08/31/2010 |
| 7777298 | Semiconductor device and method of manufacturing the same A semiconductor device includes a semiconductor substrate, and an electrical fuse provided on the semiconductor substrates. The electrical fuse includes a first fuse link and a second fuse link mutually connected in series, a first current inlet/outlet terminal (fir... | 08/17/2010 |
| 7755163 | Antifuse element and semiconductor device including same To provide an antifuse element comprising a gate electrode, a depletion channel region, a gate insulating film between the gate electrode and the channel region, and a diffusion layer region forming a junction with the channel region. An end of the gate electrode co... | 07/13/2010 |
| 7755162 | Anti-fuse memory cell An anti-fuse memory cell having a variable thickness gate oxide. The variable thickness gate oxide has a thick gate oxide portion and a thin gate oxide portion, where the thing gate oxide portion has at least one dimension less than a minimum feature size of a proce... | 07/13/2010 |
| 7741697 | Semiconductor device structure for anti-fuse The present invention discloses a semiconductor device, the device comprising a semiconductor layer on a substrate. A gate oxide and a gate electrode are formed on the semiconductor substrate. A gate conductive layer is formed on the gate electrode. A first doped re... | 06/22/2010 |
| 7723820 | Transistor based antifuse with integrated heating element The present invention provides structures for an integrated antifuse that incorporates an integrated sensing transistor with an integrated heater. Two terminals connected to the upper plate allow the heating of the upper plate, accelerating the breakdown of the anti... | 05/25/2010 |
| 7714408 | Semiconductor device and manufacturing method thereof An object is to provide a semiconductor device mounted with memory which can be driven in the ranges of a current value and a voltage value which can be generated from a wireless signal. Another object is to provide write-once read-many memory to which data can be w... | 05/11/2010 |
| 7687882 | Methods and apparatus for integrated circuit having multiple dies with at least one on chip capacitor An integrated circuit comprises a plurality of layers including a first substrate with an on chip capacitor and a second substrate. In one embodiment, the second substrate has an on chip capacitor. The first and/or second substrate can include a sensor element, such... | 03/30/2010 |
| 7687883 | Electronically programmable antifuse and circuits made therewith An antifuse device (120) that includes a bias element (124) and an programmable antifuse element (128) arranged in series with one another so as to form a voltage divider having an output node (F) located between the bias and antifuse elements. ... | 03/30/2010 |
| 7683456 | Semiconductor devices, capacitor antifuses, dynamic random access memories, and cell plate bias connection methods In one aspect, a semiconductor device includes an array of memory cells. Individual memory cells of the array include a capacitor having first and second electrodes, a dielectric layer disposed between the first and second electrodes. Select individual capacitors ar... | 03/23/2010 |
| 7667291 | FPGA structure provided with multi parallel structure and method for forming the same In an FPGA of a semiconductor device and a method of forming the FPGA, a first pattern having a voltage selectable conductivity is formed to connect first vias of the semiconductor device in parallel. ... | 02/23/2010 |
| 7656006 | Antifuse circuit with well bias transistor An antifuse circuit includes a terminal, an antifuse transistor, and a bias transistor. The antifuse transistor is formed on a substrate. The antifuse transistor is coupled to the terminal and includes a first gate terminal coupled to receive a first select signal. ... | 02/02/2010 |
| 7649241 | Semiconductor device and method of manufacturing the same A semiconductor device having a variable capacitance capacitor and a method of manufacturing the same are disclosed. An example semiconductor device includes a capacitor having a bottom electrode, a dielectric layer and an upper electrode, formed on a semiconductor ... | 01/19/2010 |
| 7638855 | Anti-fuse one-time-programmable nonvolatile memory An anti-fuse one-time-programmable (OTP) nonvolatile memory cell has a P well substrate with two P− doped regions. Another N+ doped region, functioning as a bit line, is positioned adjacent and between the two P− doped regions on... | 12/29/2009 |
| 7602042 | Nonvolatile memory device, array of nonvolatile memory devices, and methods of making the same A nonvolatile memory device including a lower electrode, a resistor structure disposed on the lower electrode, a diode structure disposed on the resistor structure, and an upper electrode disposed on the diode structure. A nonvolatile memory device wherein the resis... | 10/13/2009 |
| 7550818 | Method of manufacture of a PCRAM memory cell The invention provides a method of forming a resistance variable memory element and the resulting element. The method includes forming an insulating layer having an opening therein; forming a metal containing layer recessed in the opening; forming a resistance varia... | 06/23/2009 |
| 7531886 | MOSFET fuse programmed by electromigration A one-time programmable field effect transistor (FET) e-fuse has a silicided gate connected to the drain while the source is grounded. A voltage stimulus applied to the drain forces current to flow through the channel coupling the drain to the source. The magnitude ... | 05/12/2009 |
