Did You Know...
...that several people are credited with the invention of the flush toilet? Most people have heard of Thomas Crapper (1837-1910), the sanitary engineer who invented the valve-and-siphon arrangement that made the modern toilet possible. Another claimant to "the throne" was British inventor Alexander Cumming who patented a toilet in 1775. Then there's a nameless Minoan (a native of ancient Crete) who lived 4,000 years ago who supposedly was ahead of his time and created the first flush toilet!
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8188569 | Phase change random access memory device with transistor, and method for fabricating a memory device The invention relates to a memory device, in particular to a resistively switching memory device such as a Phase Change Random Access Memory (“PCRAM”). In one disclosed method, a nanowire of non-conducting material is formed serving as a mould for producing a na... | 05/29/2012 |
| 8183665 | Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same A high-density memory array. A plurality of word lines and a plurality of bit lines are arranged to access a plurality of memory cells. Each memory cell includes a first conductive terminal and an article in physical and electrical contact with the first conductive ... | 05/22/2012 |
| 8178942 | Electrically alterable circuit for use in an integrated circuit device An electrically alterable circuit (EAC), suitable for use in an integrated circuit, includes a first interconnect, a link element, and a second interconnect. A first set of interconnect vias provides an electrically conductive connection between the first interconne... | 05/15/2012 |
| 8178943 | Electrical fuse, semiconductor device and method of disconnecting electrical fuse An electrical fuse including a polysilicon layer; a silicide layer formed over the polysilicon layer; and a first metal contact and a second metal contact arranged over the silicide layer, while being spaced from each other, the electrical fuse being configured so t... | 05/15/2012 |
| 8178944 | Method for forming a one-time programmable metal fuse and related structure According to one exemplary embodiment, a method for forming a one-time programmable metal fuse structure includes forming a metal fuse structure over a substrate, the metal fuse structure including a gate metal segment situated between a dielectric segment and a pol... | 05/15/2012 |
| 8174091 | Fuse structure An electrical fuse and a method of forming the same are presented. A first-layer conductive line is formed over a base material. A via is formed over the first-layer conductive line. The via preferably comprises a barrier layer and a conductive material. A second-la... | 05/08/2012 |
| 8169049 | Semiconductor device with fuse portion A semiconductor device includes: a plurality of NAND memory dies each including: a first wiring layer formed in the NAND memory die; a second wiring layer formed in the NAND memory die; a first insulation layer formed between the first wiring layer and the second wi... | 05/01/2012 |
| 8164156 | Fuse structure for high integrated semiconductor device A semiconductor device comprises a fuse having a blowing region at a center part for selectively connecting different two terminals; and a dummy contact positioned under the blowing region for forming empty space by being removed together with the blowing region in ... | 04/24/2012 |
| 8159040 | Metal gate integration structure and method including metal fuse, anti-fuse and/or resistor A semiconductor structure and a method for fabricating the semiconductor structure provide a field effect device located and formed upon an active region of a semiconductor substrate and at least one of a fuse structure, an anti-fuse structure and a resistor structu... | 04/17/2012 |
| 8159041 | Semiconductor device and manufacturing method thereof A semiconductor device includes: a lower layer interconnection formed on a chip; an upper layer interconnection formed in an upper layer above the lower layer interconnection above the chip; an interconnection via formed to electrically connect the lower layer inter... | 04/17/2012 |
| 8143693 | Semiconductor device including redistribution line structure and method of fabricating the same The invention provides a semiconductor device. The semiconductor device includes a semiconductor chip having an active surface on which pads are disposed, a passivation layer pattern disposed to cover the active surface of the semiconductor chip and to expose the pa... | 03/27/2012 |
| 8143695 | Contact fuse one time programmable memory A fuse structure for a semiconductor integrated circuit (IC) can include a first node comprising a region of a metal layer of an IC manufacturing process and a second node comprising a region of a conductive layer residing on a layer of the IC manufacturing process ... | 03/27/2012 |
| 8143692 | Capacitance trimming circuit of semiconductor device having vertically stacked capacitor layers and operation method thereof A capacitance trimming circuit of a semiconductor device may include a plurality of capacitor layers and/or a plurality of fuses. The plurality of capacitor layers may be vertically stacked. The plurality of fuses may be arranged to correspond to the plurality of ca... | 03/27/2012 |
| 8143694 | Fuse device Implementations are presented herein that relate to a fuse device, an integrated circuit including a fuse device, a method of implementing a fuse device and a method of programming a fuse device. ... | 03/27/2012 |
| 8134220 | Two-terminal nanotube devices including a nanotube bridge and methods of making same Nanotube switching devices having nanotube bridges are disclosed. Two-terminal nanotube switches include conductive terminals extending up from a substrate and defining a void in the substrate. Nantoube articles are suspended over the void or form a bottom surface o... | 03/13/2012 |
| 8120141 | Method and structure to prevent circuit network charging during fabrication of integrated circuits An integrated circuit and method of fabricating the integrated circuit. The integrated circuit, including: one or more power distribution networks; one or more ground distribution networks; one or more data networks; and fuses temporarily and electrically connecting... | 02/21/2012 |
| 8115274 | Fuse structure and method for manufacturing same A fuse structure includes a substrate, a fuse conductive trace disposed closer to a first chip surface than to a second chip surface facing away from the first chip surface, a metallization layer on the substrate disposed on a side of the fuse conductive trace facin... | 02/14/2012 |
| 8110893 | Semiconductor device mounted with fuse memory A fuse element utilizing a reaction between two layers by feeding current is manufactured. A fuse element including a first layer formed of an oxide or a nitride and a second layer that becomes high resistant by nitridation or oxidation, in which the first layer and... | 02/07/2012 |
| 8110892 | Semiconductor device having a plurality of repair fuse units A semiconductor device includes a plurality of stacked semiconductor chips; and a plurality of through-silicon vias (TSVs) including first TSVs and redundant TSVs and configured to commonly transfer a signal to the plurality of stacked semiconductor chips. At least ... | 02/07/2012 |
| 8106476 | Semiconductor die with fuse window and a monitoring window over a structure which indicates fuse integrity According to one exemplary embodiment, a method for monitoring structural integrity of at least one fuse in semiconductor wafer, which includes at least one electrical monitoring structure, includes forming a monitoring window in a dielectric layer overlying the at ... | 01/31/2012 |
| 8102018 | Nonvolatile resistive memories having scalable two-terminal nanotube switches A non-volatile resistive memory is provided. The memory includes at least one non-volatile memory cell and selection circuitry. Each memory cell has a two-terminal nanotube switching device having and a nanotube fabric article disposed between and in electrical comm... | 01/24/2012 |
| 8102019 | Electrically programmable diffusion fuse A fuse structure for a semiconductor integrated circuit (IC) includes an anode comprising conductive material overlaying a diffusion material disposed within a substrate layer of the IC, wherein the diffusion material is electrically isolated from the substrate laye... | 01/24/2012 |
| 8093680 | Metal-insulator-metal-insulator-metal (MIMIM) memory device The present memory device includes first and second electrodes, first and second insulating layers between the electrodes, the first insulating layer being in contact with the first electrode, the second insulating layer being in contact with the second electrode, a... | 01/10/2012 |
| 8080860 | Semiconductor device and method of blowing fuse thereof A semiconductor device comprises an active region including a core circuit forming region and a buffer forming region, and a fuse element forming region arranged on a corner of the active region and to be able to be electrically fused. It is possible to arrange the ... | 12/20/2011 |
| 8080861 | Semiconductor device A semiconductor device includes an electric fuse and first and second large area wirings for applying a voltage to the electric fuse. The electric fuse includes a fuse unit which includes an upper-layer fuse wiring, a lower-layer fuse wiring, and a via connecting th... | 12/20/2011 |
| 8076751 | Circuit protection device including resistor and fuse element An integral circuit protection device includes a substrate disposed between first and second terminals. The substrate is composed of a resistive material. A first conductive layer is disposed on a first surface of the substrate and in electrical contact with the fir... | 12/13/2011 |
| 8053862 | Integrated circuit fuse An integrated circuit and a fuse therefore are disclosed. The integrated circuit fuses includes a plurality of terminals coupled by a fuse element, wherein the fuse element is located in a non-last metal layer and/or wherein each terminal is fully-landed on an upper... | 11/08/2011 |
| 8053863 | Electrical fuse and semiconductor device An electrical fuse comprises: an interconnect to be cut; and a first terminal and a second terminal which are respectively provided at both ends of the interconnect to be cut. The interconnect to be cut comprises: a first orientation film which contains copper as a ... | 11/08/2011 |
| 8044489 | Semiconductor device with fluorine-containing interlayer dielectric film to prevent chalcogenide material layer from exfoliating from the interlayer dielectric film and process for producing the same A semiconductor device having a phase-change memory cell comprises an interlayer dielectric film formed of, for example, SiOF formed on a select transistor formed on a main surface of a semiconductor substrate, a chalcogenide material layer formed of, for example, G... | 10/25/2011 |
| 8044490 | Semiconductor device including fuse Provided is a semiconductor device including a fuse, in which a insulating layer surrounding the fuse or metal wiring is prevented from being damaged due to the cut of a fuse, which can occur when a repair process is performed. The semiconductor device includes a co... | 10/25/2011 |
| 8035191 | Contact efuse structure A contact efuse structure includes a silicon layer and a contact contacting the silicon layer with one end. When a voltage is applied to the contact, a void is formed at the end of the contact, and thus the contact is open. Such structure may be utilized in an efuse... | 10/11/2011 |
| 8030734 | Forming phase change memories with a breakdown layer sandwiched by phase change memory material A phase change memory cell may be formed with a pair of chalcogenide phase change layers that are separated by a breakdown layer. The breakdown layer may be broken down prior to use of the memory so that a conductive breakdown point is defined within the breakdown l... | 10/04/2011 |
| 8030733 | Copper-compatible fuse target A copper-compatible fuse target is fabricated by forming a copper target structure at the same time that the copper traces are formed. After the copper target structure and the copper traces have been formed, a conductive target, such as an aluminum target, is forme... | 10/04/2011 |
| 8026573 | Electrical fuse structure An electrical fuse structure is disclosed. The electrical fuse structure includes a fuse element disposed on surface of a semiconductor substrate, a cathode electrically connected to one end of the fuse element, and an anode electrically connected to another end of ... | 09/27/2011 |
| 8022502 | Nonvolatile memory element, manufacturing method thereof, and nonvolatile semiconductor apparatus using the nonvolatile memory element A nonvolatile memory element comprises a first electrode layer (103), a second electrode (107), and a resistance variable layer (106) which is disposed between the first electrode layer (103) and the second electrode layer (107), a... | 09/20/2011 |
| 8013420 | Electrical fuse device The invention relates generally to a fuse device of a semiconductor device, and more particularly, to an electrical fuse device of a semiconductor device. Embodiments of the invention provide a fuse device that is capable of reducing programming error caused by non-... | 09/06/2011 |
| 8013419 | Structure and method to form dual silicide e-fuse An e-fuse structure and method has anode, a fuse link, and a cathode. The first end of the fuse link is connected to the anode and the second end of the fuse link opposite the first end is connected to the cathode. This structure also includes a first silicide layer... | 09/06/2011 |
| 8013421 | Semiconductor device A semiconductor device has an electrical fuse formed on a substrate, having a first interconnect, a second interconnect respectively formed in different layers, and a via provided in a layer between the first interconnect and the second interconnect, connected to on... | 09/06/2011 |
| 8013422 | Fuse corner pad for an integrated circuit A fuse corner pad is part of an integrated circuit that includes a built-in fuse contact and a plurality of auxiliary pads. The fuse contact is a conductive metallic or metalloid structure that is connected to a fuse element. The fuse contact and fuse element are us... | 09/06/2011 |
| 8008745 | Latch circuits and operation circuits having scalable nonvolatile nanotube switches as electronic fuse replacement elements A non-volatile latch circuit is provided. The non-volatile latch circuit includes a nanotube switching element capable of switching between resistance states and non-volatilely retaining the resistance state. The non-volatile latch circuit includes a volatile latch ... | 08/30/2011 |
